NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: Machinery Directive. Bezeichnung des Sicherheitsbauteils: Name of the safety component: AES 1135 / AES 1136 / AES 1145 / AES 1146 / AES 1165 / AES 1166 / AES 1185 c)/ AES 1185.3 b)/ AES 1235 a)/ AES 1236 a)/ AES 2135 / AES 2136 / AES 2165 / AES 2166 / AES 2335 b)/ AES 2336 b)/ AES 3335 / AES 3336 / AES 3365 / AES 3366 / AES 3535 / AES 3536 / AES 3565 / AES 3566 / Beschreibung des Sicherheitsbauteils ... | Original |
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aes 1235 sicherheits Schmersal EC uPC 1185 transistor c 2335 Schmersal aes 1185 aes 1136 transistor b 1185 b 1185 Schmersal aes 3335 AES 1185 aes 3335 Schmersal aes 2165 98/37/EG 98/37/EC 98/37/EG abstract |
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| Abstract: Watts AES / EBU to Analog Audio Converter Program stream AES / EBU to analog audio conversion with 24-bit DAC resolution. The RossGear DAC-8516 DAC-8516 AES / EBU to Analog Audio Converter is a broadcast quality modular product used to convert 20 or 24-bit AES-3id (coaxial) signals to analog audio. The DAC-8516 DAC-8516 accepts one 32, 44.1 or 48 kHz sample rate unbalanced AES signal and provides two outputs of stereo (A, B) analog audio. Digital AES / EBU audio is input through a BNC connector on the rear of the frame. The ... | Original |
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AES/DARS AES EBU CONVERTER ADC-8532 adc & dac audio conversion Leitch Video DAC-8516 DAC-8516 abstract |
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| Abstract: , derate current by 20% Symbol AES AES AES AES AES AES AES AES Units Type Number 1A Maximum Recurrent ... | Original |
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marking code AES SOD-323F marking code 1b datasheet abstract |
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| Abstract: RAID Network Offload Engine Boot Option Encryption GPIO (#) AES-256/ SHA-1/2 50 AES-256/ SHA-1/2 50 HDD NOR UART AES-128 35 DDR2 DRAM Boot Option Encryption GPIO (#) AES-256/ SHA-1/2 50 AES-128 35 HDD NAND (MLC/SLC) SPI NOR UART Single , quality media files, remote access, back-up, security (including AES-128/256 bit encryption and hashing , 2 Yes 0, 1 AES-128 24* OXUFS936QSE OXUFS936QSE 1 x USB 2.0 FW800 FW800 1 4 Yes 0, 3 ... | Original |
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SATA 3 to PCIe 1x OXUFS936DSE OXU931DS OXUFS946DSE AES128 OXUFS936QSE OXUF943SE ARM11 USB to SATA OXU3101 OXUF934DSB ARM9 AES OXU3102 oxu931sf datasheet abstract |
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| Abstract: Safety sensors AES 1135 Technical data Standards: · Control Category 3 to EN 954-1 · , preparation Ordering details AES 113 - No. Replace Description 5 6 2185 Without , output: AES 1135/36 Y1 Y2 AES 1135/36-2185 Y1 Y2 Function / Switching condition: Authorized , , enabling paths closed Status NO contact input Safety sensors · AES to monitor a guard door to , Note AES 1135/1136 K2 A2 Y1 Y2 X1 14 K3 K4 3 M Note The wiring diagram ... | Original |
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relay failure analysis LED monitor circuit diagram DC-13 AES 1185 BG-GS-ET-14 BG-GS-ET-20 AC-15 BG-GS-ET-14 abstract |
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| Abstract: 367 impedance matching transformers from Switchcraft® are used to convert 110 Ohm AES/EBU digital , transmission of AES/EBU digital audio over standard 75 Ohm coaxial lines. The adapters can also be used to connect AES/EBU digital audio signals to high-definition, broadcast quality video patchbays for secure and lossless patching. -Enable long distance runs of AES/EBU digital audio over standard coaxial cable -Allow easy connection of AES/EBU digital audio signals to HD patchbays. Built by hand in ... | Original |
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datasheet abstract |
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| Abstract: Cryptography Interface Process ST23YS02 ST23YS02 36 KB 2 KB 2 KB EDES, AES ISO 7816, IART 0.13 um ST23YS08 ST23YS08 108 KB 8 KB 2 KB EDES, AES ISO 7816, IART 0.13 um ST23YL18 ST23YL18 196 KB 18 KB 4+2 KB EDES, AES, RSA, ECC ISO 7816, IART 0.13 um ST23ZL18 ST23ZL18 300 KB 18 KB 6+2 KB EDES, AES, RSA, ECC ISO 7816, IART 90 nm ST23ZL34 ST23ZL34 300 KB 34 KB 6+2 KB EDES, AES, RSA, ECC ISO 7816, IART 90 nm ST23ZL48 ST23ZL48 300 KB 48 KB 6+2 KB ... | Original |
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ST23YL80 ST23YL18 ST23YR80 ST23YS02 ST23YS08 ST23 rsa SMARTCARD SMARTCARD ST23ZL48 ST23ZL18 ST23ZL34 iso 7816 ST23YR18 datasheet abstract |
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| Abstract: 0.7 0.7 3 3 3 I/O I2S,AES/EBU I2S,AES/EBU I2S,AES/EBU Temperature Range 0 +70 J ... | Original |
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AD1893 AD1891 AD1890 datasheet abstract |
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| Abstract: Helion Technology OVERVIEW DATASHEET Ultra-Low Resource AES (Rijndael) cores for Actel FPGA plaintext in ciphertext out 128-bits 128-bits Features · Implements AES (Rijndael) to · key in 128/192/256-bits · · key-size select Helion Tiny AES Encryption & Decryption Core , hardware AES solution available Data throughput up to 25Mbps Full dynamic support for all AES key sizes , All AES operating modes easily implemented (eg. ECB, CBC, OFB, CFB, CTR) Simple external interface ... | Original |
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key expansion for aes algorithm datasheet abstract |
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| Abstract: · · · · Converts AES/EBU digital audio between balanced 110 XLR and unbalanced 75 BNC , designed to connect AES/EBU signals from XLR output equipment into standard 75 coax cabling systems. These baluns perform precise impedance matching and signal balancing, allowing AES/EBU signals to be , AES/EBU Balun, FBNC to MXLR AES/EBU Balun, FBNC to FXLR AES/EBU Balun, FBNC to MXLR, 10dB [atten 1Vp-p] AES/EBU Balun, F-BNC to F-XLR, PAD to 1 VP-P AES/EBU Panel, (8) FXLR to FBNC, PAD to 1 VP-P ... | Original |
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balun 75 ohm audio xlr patch panel "XLR" wiring audio balun PA810 PA810 abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| : - This program is a sample implementation of the AES algorithm. Customizible Options: - CIPHER_KEY_LENGTH in F326_AES_Parameters.h CIPHER_KEY in F326_AES_KeyExpander.h How To Test breakpoint after the InvCipher() function, which is called in F326_AES_Main.c. Add the variables Encrypted Laboratories IDE version 2.91 Project Name: F326_AES Command Line Options: - Assembler : Default Compiler : Default Linker : Default File List: - F326_AES www.datasheetarchive.com/download/25013906-761248ZC/an324sw.zip (Readme.txt) |
Silicon Laboratories | 07/02/2008 | 19.91 Kb | ZIP | an324sw.zip |
| (name) LPCTSTR pszFname = (name) // register offsets #define AES_CONTROLA 0x00000000 #define AES_CONTROLB 0x00000004 #define AES_INTERRUPT 0x00000008 #define AES_SRC_A 0x00000010 #define AES_DST_A 0x00000014 #define AES_LEN_A 0x00000018 #define AES_SRC_B 0x00000020 #define AES_DST_B 0x00000024 #define AES_LEN_B 0x00000028 #define AES_WRITEABLE_KEY_0 0x00000030 #define AES_WRITEABLE_KEY_1 0x00000034 #define AES_WRITEABLE_KEY_2 0x00000038 #define AES www.datasheetarchive.com/download/53119630-72921ZC/ce6.zip (aes_defs.h) |
Digital Logic | 18/06/2007 | 502.7 Kb | ZIP | ce6.zip |
| AMD AES Encryption Module Interface * DESCRIPTION * The AES encryption module provides two calculated. Both methods use the key specified by the AES_IOCTL_SETKEY ioctl() call. * IOCTL * - AES_IOCTL_SETMODE (0x01) - Arguments: AES_MODE_ENCRYPT (0x01) AES . - AES_IOCTL_SETKEY (0x02) - Argument: 16 byte AES key Description: Set the AES key for subsequent operations (both synchronous and asynchronous www.datasheetarchive.com/download/55429351-72918ZC/bsp_linux_2.6.11_board_support_package.zip (interface.txt) |
Digital Logic | 18/06/2007 | 954.19 Kb | ZIP | bsp_linux_2.6.11_board_support_package.zip |
| AMD AES Encryption Module Interface * DESCRIPTION * The AES encryption module provides two calculated. Both methods use the key specified by the AES_IOCTL_SETKEY ioctl() call. * IOCTL * - AES_IOCTL_SETMODE (0x01) - Arguments: AES_MODE_ENCRYPT (0x01) AES . - AES_IOCTL_SETKEY (0x02) - Argument: 16 byte AES key Description: Set the AES key for subsequent operations (both synchronous and asynchronous www.datasheetarchive.com/download/59450573-72917ZC/linux_2.4.24_lx5536_b0_1.0beta.zip (interface.txt) |
Digital Logic | 18/06/2007 | 65032.21 Kb | ZIP | linux_2.4.24_lx5536_b0_1.0beta.zip |
| , support, or make ; any further information available to you. ; ; END_AMD_COPYRIGHT LIBRARY AES EXPORTS DllEntry AES_Init AES_Deinit AES_Open AES_Close AES_Read AES_Write AES_Seek AES_IOControl AES_PowerDown AES_PowerUp www.datasheetarchive.com/download/53119630-72921ZC/ce6.zip (lxaes.def) |
Digital Logic | 18/06/2007 | 502.7 Kb | ZIP | ce6.zip |
| //- // F326_AES : See Readme.txt // Project Name: F326_AES // // // Release 1.0 // -Initial Revision (CG/GP) // -11 JUN 2007 // #ifndef _F326_AES_PARAMETERS_H_ #define _F326_AES //- #define CIPHER_KEY_LENGTH 128 // AES allows for 128, 192 and 256 bits (Nr) // - // AES-128 | 4 www.datasheetarchive.com/download/25013906-761248ZC/an324sw.zip (F326_AES_Parameters.h) |
Silicon Laboratories | 07/02/2008 | 19.91 Kb | ZIP | an324sw.zip |
| // interface.h - device interface classes for AESWDMDriver // This GUID identifies the device interface class used by the AesWdmDevice device // TODO: If your driver supports a standard interface, use the GUID that identifies // the interface class, rather than using the one defined below #define AesWdmDevice_CLASS_GUID \ { 0x4677a303, 0xbe1d, 0x4264, { 0x86, 0x18, 0x41, 0x55, 0xd3, 0xcb, 0xc, 0xf1 } } www.datasheetarchive.com/download/8359987-72923ZC/base_driver_for_utilizing_the_aes_security_block_in_hardware.zip (AesWdmDeviceInterface.h) |
Digital Logic | 18/06/2007 | 70.95 Kb | ZIP | base_driver_for_utilizing_the_aes_security_block_in_hardware.zip |
| //- // F326_AES_Cipher.h //- // Copyright 2007 Silicon Laboratories, Inc. // http://www.silabs.com // // Program Description : See Readme.txt // Project Name: F326_AES // // // Release 1.0 // -Initial Revision (CG/GP) // -11 JUN 2007 // #ifndef _F326_AES_CIPHER_H_ #define _F326_AES _AES www.datasheetarchive.com/download/25013906-761248ZC/an324sw.zip (F326_AES_Cipher.h) |
Silicon Laboratories | 07/02/2008 | 19.91 Kb | ZIP | an324sw.zip |
| AES_STATUS_OK 0x00000000 #define AES_STATUS_INVALID_PARAMS 0x00000001 #define AES_STATUS_HARDWARE_BUSY 0x00000002 #define AES_STATUS_KEY_INVALID 0x00000004 // user exposed values #define AES_SRC_COHERENCY 0x00000001 #define AES_DST_COHERENCY 0x00000002 #define AES_USE_HIDDEN_KEY 0x00000001 #define AES_USE_WRITEABLE_KEY 0x00000002 #define AES_TASK_A 0x00000001 #define AES_TASK_B 0x00000002 #define AES_TASK_ANY 0x00000004 #define AES_START_A 0x00000001 #define www.datasheetarchive.com/download/53119630-72921ZC/ce6.zip (aes_ioctl.h) |
Digital Logic | 18/06/2007 | 502.7 Kb | ZIP | ce6.zip |
| - Cimarron is 156 */ #define GEODE_EEPROM_MINOR_DEV 157 #define AES_CONTROLA_REG 0x0000 #define AES_CONTROLB_REG 0x0004 /* Ctrl register bits */ #define AES_CTRL_START 0x01 #define AES_CTRL_DECRYPT 0x00 /* Default - but defined for simplicity */ #define AES_CTRL_ENCRYPT 0x02 #define AES_CTRL_WRKEY 0x04 #define AES_CTRL_DCA 0x08 #define AES_CTRL_SCA 0x10 #define AES_CTRL_CBCA 0x20 #define AES_INTERRUPT_REG 0x0008 #define AES_INTR_EEPROM_PENDING 0x40000 #define AES_INTR_B_PENDING 0x20000 #define AES www.datasheetarchive.com/download/59450573-72917ZC/linux_2.4.24_lx5536_b0_1.0beta.zip (geode_crypto.h) |
Digital Logic | 18/06/2007 | 65032.21 Kb | ZIP | linux_2.4.24_lx5536_b0_1.0beta.zip |