NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Part | Manufacturer | Description | Samples | Ordering |
| Part | Manufacturer | Description | Type | Ordering |
| ADSP21061 | Analog Devices | 32 BIT, 40 BIT EXTENDED, IEEE FLOATING, 1MBIT RAM, 33.3-40-50MHZ, +5V |
44 pages, |
Original | |
| ADSP-21061 | Analog Devices | SHARC, 50 MHz, 150 MFLOPS, 5v, floating point |
47 pages, |
Original | |
| ADSP-21061KS-133 | Analog Devices | ADSP-2106x SHARC DSP Microcomputer Family |
47 pages, |
Original | |
| ADSP-21061KS-160 | Analog Devices | ADSP-2106x SHARC DSP Microcomputer Family |
47 pages, |
Original | |
| ADSP-21061KS-200 | Analog Devices | ADSP-2106x SHARC DSP Microcomputer Family |
47 pages, |
Original | |
| ADSP21061L | Analog Devices | 32 BIT, 40 BIT EXTENDED, IEEE FLOATING, 1MBIT RAM, 40-44MHZ, +3.3V |
44 pages, |
Original | |
| ADSP-21061L | Analog Devices | ADSP-2106x SHARC DSP Microcomputer Family |
47 pages, |
Original | |
| ADSP-21061LAS-160 | Analog Devices | ADSP-2106x SHARC DSP Microcomputer Family |
47 pages, |
Original | |
| ADSP-21061LAS-176 | Analog Devices | ADSP-2106x SHARC DSP Microcomputer Family |
47 pages, |
Original | |
| ADSP-21061LKB-160 | Analog Devices | ADSP-2106x SHARC DSP Microcomputer Family |
47 pages, |
Original | |
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: · The ADSP-21061 does not have DMA channels 8 and 9. · The ADSP-21061's modify registers , , which is scheduled for January 1997, will have emulator support for the ADSP21061. ADSP-21061 (Two , ADSP-21061 Executables. functional differences of the two DSPs and accommodate these differences within your code and system architecture file. As described in the ADSP-21061 Data Sheet, the ADSP-21061 differs from the ADSP-21062 ADSP-21062 in the following ways: · The ADSP-21061 has one Megabit on -chip SRAM ... | Original |
3 pages, |
ADSP21062 ADSP21061 ADSP21000 ADSP-21061 ADSP-21000 0x21000 00FF ADSP-21062 0x0002 ADSP-210601 ADSP-21061 abstract |
| Abstract: the ADSP-21061 and ADSP-21061L ideal for applications such as audio mixing consoles, performance , ADSP-21061 ADSP-21061L 33/40/50 40/44 5.0 3.3 © 1998 Analog Devices, Inc. SHARC and SHARC logo , ADSP-21061 LOW COST SHARC® DSP 32-Bit Processing for Real-time Embedded Systems OVERVIEW and , Compiler, Only $179 US The ADSP-21061 and ADSP- (40 Mbit/sec bidirectional). 32-bit Single , , voice processing systems, video conferenc- The ADSP-21061 (5.0 volt) and ing, portable medical ... | Original |
2 pages, |
diode IN 5402 ADSP21062 ADSP21061L ADSP-21062 ADSP-21061L ADSP-21061 ADSP-21060 ADSP-21000 ADSP-21061 abstract |
| Abstract: Ethernet host platforms EZ-KIT LiteTM for Analog Devices ADSP-2106x family of DSPs The ADSP-21061 , well as the complete toolset for the ADSP-2106x DSP family. The ADSP-21061 EZ-KIT Lite product includes an ADSP-21061 DSP desktop evaluation board and fundamental debugging software to facilitate , features of the ADSP2106X ADSP2106X SHARC DSP family. Features: ADSP-21061 40 MHz SHARC DSP RS-232 RS-232 interface with ... | Original |
2 pages, |
ADSP-2106X ADSP-21061 AD1847 27C010 sharc ADSP-2106x architecture ADSP2106X RS-232 ADSP-2106X abstract |
| Abstract: (NC on the ADSP-21061) L5ACK (NC on the ADSP-21061) L5CLK (NC on the ADSP-21061) L5CLK (NC on the ADSP-21061) L5DAT0 (NC on the ADSP-21061) L5DAT0 (NC on the ADSP-21061) L5DAT1 (NC on the ADSP-21061) L5DAT1 (NC on the ADSP-21061) L5DAT2 (NC on the ADSP-21061) L5DAT2 (NC on the ADSP-21061) L5DAT3 (NC on the ADSP-21061) L5DAT3 (NC on the ADSP-21061) L5ACK output enable (NC on the ADSP-21061) L5DATx, L5CLK output enable (NC on the ADSP-21061) L4ACK (NC on the ADSP-21061) L4ACK (NC on the ADSP-21061 ... | Original |
14 pages, |
sma e1017 ADSP-21061 L4D* transistor L0DA adsp jtag br5 166 datasheet abstract |
| Abstract: DSP, the H.263 video compression/decompression algorithms on its on-board ADSP-21061 SHARC , ADSP21061 Audio Codec/AEC ADSP-2181 ADSP-2181 Multimedia Codec AD1843 AD1843 The reference design includes a , DMA Boot Control Diags and Kernel Routines TM H.263 Video Encoder ADSP-21061 Audio , decoded by the ADSP-21061 and passed in 4:2:0 format to the host using DMA channel 6. YUV to RGB format , ADSP-1843 ADSP-1843. Communication between the ADSP21061 and AD2181 AD2181 is through the IDMA port of the ADSP-2181 ADSP-2181. y ... | Original |
3 pages, |
2181 AD1843 ADSP-21061 ADSP-2181 ADSP21061 H-233 dsp based echo cancellation VideoCon H.324 ADSP-2181 applications ADSP-2181 abstract |
| Abstract: DIGITAL SIGNAL PROCESSING: FLOATING POINT ADSP21020 ADSP21020 ADSP21020 ADSP21020 ADSP21020 ADSP21020 ADSP21020 ADSP21020 133 120 100 80 33 30 25 20 CYLCE TIME nsec 30 33.3 40 50 ADSP21060 ADSP21060 ADSP21060 ADSP21060 ADSP21060L ADSP21060L ADSP21060L ADSP21060L ADSP21061 ADSP21061 ADSP21061 ADSP21061L ADSP21061L ADSP21062 ADSP21062 ADSP21062 ADSP21062 ADSP21062L ADSP21062L ADSP21062L ADSP21062L ADSP21160 ADSP21160 ADSP21065L ADSP21065L Quad ADSP21060 ADSP21060 AD14060 AD14060 AD14060L AD14060L AD14160 AD14160 AD14160L AD14160L 133 160 133 160 200 133 160 160 176 133 160 133 160 33 40 33 40 50 33 40 40 44 33 40 33 40 ... | Original |
1 pages, |
ADSP21160 256KX32 64Kx32 AD14060 ADSP21020 ADSP21060 ADSP21060L ADSP21061 ADSP21061L ADSP21062 ADSP21062L 16Kx32 ADSP21020 abstract |
| Abstract: : dsp_applications@analog.com PORTING CODE FROM THE ADSP-21061 TO THE ADSP-21065L ADSP-21065L INTRODUCTION The introduction of Analog , leverage their previous SHARC development experience and code. The ADSP-21061 is the SHARC variant most , code developed for the ADSP-21061 to the ADSP-21065L ADSP-21065L. Considerations on choosing whether an application on the ADSP-21061 can be converted to the ADSP-21065L ADSP-21065L are also reviewed. FUNCTIONAL DIFFERENCES OF THE ADSP-21065L ADSP-21065L AND ADSP-21061 The ADSP-21065L ADSP-21065L is the newest member of the ADSP-2106x family. ... | Original |
6 pages, |
digital countdown timer countdown timer ADSP21061 ADSP-21065L ADSP-21061 digital count up and countdown timer ADSP21065L ADSP-21060/62/61 ADSP-21061 abstract |
| Abstract: 6(5,$/32576 Figure 13-0. Table 13-0. Listing 13-0. 2YHUYLHZ The ADSP-21160 ADSP-21160 serial ports support the protocols and functions of the ADSP-21061 serial ports. The only changes to this chapter are: Clock cycle time is derived from the DSP core clock frequency. The core clock can switch at a significantly higher frequency than with the ADSP-2106x (up to 100MHz ADSP-21160 ADSP-21160). The higher input frequency , the ADSP-21061. The electrical characteristics of the off chip interfaces of the serial ports have ... | Original |
2 pages, |
ADSP-21160 ADSP-21061 transistor Comparison Tables ADSP-21160 abstract |
| Abstract: ADSP21061. The ADSP-21065L ADSP-21065L is capable of handling direct reads and writes to its memory mapped IOP , , EMAIL: dsp.support@analog.com Porting Code from the ADSP21061 to the ADSP-21065L ADSP-21065L Last Modified: 4/15 , familiar with this family can leverage their previous SHARC development experience. The ADSP-21061 is , ADSP-21065L ADSP-21065L and the ADSP-21061 processors. It discusses how to port code currently developed for the ADSP-21061 to the ADSP-21065L ADSP-21065L. Considerations necessary to choose whether an application on the ADSP-21061 ... | Original |
6 pages, |
EE 65 ADSP21061 ADSP-21065L ADSP-21061 EE-65 EE65 core EE-65 abstract |
| Abstract: AN1427 AN1427 APPLICATION NOTE Interfacing the PSD813F5 PSD813F5 with the ADSP-21061 SHARC DSP CONTENTS s , 6.0 Interfacing the PSD813F5 PSD813F5 with the ADSP-21061. 5 6.1 , Interface. 5 ADSP-21061 Bus Interface Timing Calculation. 6 ADSP-21061 Memory Map. 8 Interfacing to the ADSP-21061 External Memory Map. 9 Define the ADSP-21061 Interface in PSDsoft Express ... | Original |
22 pages, |
ADDR15-ADDR0 ADSP-21061 AN1427 h41C000 PSD813F PSD813F1 PSD813F2 PSD813F3 PSD813F4 PSD813F5 PSD833F2 PSD834F2 PSD913F2 reading schematic diagram of laptop AN1427 abstract |
| Abstract: ADSP-21061 EZ-KIT Lite Evaluation System Manual Part Number: 82-000570-01 Revision 3.0 , compiling the ADSP-21061 EZ-KIT Lite operational software (one copy may be made for back-up purposes only). , Mark Notice The Analog Devices logo, ADSP-21061 SHARC, the ADSP-21061 SHARC logo, JTAG, and EZICE are , respective owners. Limited Warranty The ADSP-21061 EZ-KIT Lite hardware is warranted against defects in , . 25 3.3.1. ADSP-21061 SHARC Processor Memory ... | Original |
81 pages, |
27C010 27C256 PC16550D AD1847 ADSP21061 ADSP-21061 ADSP-21xxx sharc ADSP-21xxx architecture diagram sharc 21xxx architecture block diagram ADSP-21061 abstract |
| Abstract: ADSP-21061 SHARC Preliminary Data Sheet October 1996 For current information contact Analog Devices at (617) 461-3881 ADSP-21060/62 ADSP-21060/62 SHARC ADSP-21061 ADSP-21061 SHARC Super Harvard Architecture , Execution · Performs Transfers Between ADSP-21061 Internal Memory and External Memory, External Peripherals , Microprocessors · Host can Directly Read/Write ADSP-21061 Internal Memory Multiprocessing: · Glueless , manufacturing unless otherwise agreed to in writing. 1 October 1996 ADSP-21061 SHARC Preliminary Data ... | Original |
55 pages, |
ADSP-21062 ADSP-21061 ADSP-21060 ADSP-21020 ADSP-21000 00FF ADSP-21060/62 ADSP-21061 abstract |
| Abstract: a ADSP-21061 SHARC®* DSP Microcomputer Family ADSP-21061 Pin-Compatible with ADSP-21060 ADSP-21060 (4 , BUFFERS SERIAL PORTS (2) 6 I/O PROCESSOR Figure 1. ADSP-21061 Block Diagram *SHARC is a , Wide Web Site: http://www.analog.com Fax: 617/326-8703 © Analog Devices, Inc., 1997 ADSP-21061 , Transfers at 40 MHz, in Parallel with Full-Speed Processor Execution Performs Transfers Between ADSP-21061 , Microprocessors Host can Directly Read/Write ADSP-21061 Internal Memory Figures TABLE OF CONTENTS GENERAL ... | Original |
40 pages, |
ADSP-21062 ADSP-21061 ADSP-21060 ADSP-21000 datasheet abstract |
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| SHARC, 44MHz, 150 MFLOPS, 3.3v, floating point General Description The ADSP-21061L is the newest microcomputers that offer new capabilities and levels of integration and performance. The ADSP-21061L is the low power (3.3 volt) version of the ADSP-21061. The ADSP-21061L is a 32-bit processor optimized for high performance DSP applications. The ADSP-21061L combines the ADSP-21000 ADSP-21000 ADSP-21000 ADSP-21000 DSP core with a dual-ported on -in-a-chip. Fabricated in a high-speed, low-power CMOS process, the ADSP-21061L has a 25 ns instruction cycle time www.datasheetarchive.com/files/analog-devices/doc/productdescriptions/1533.html |
Analog Devices | 1.12 Kb | HTML | 1533.html | |
| Description= SHARC, 44MHz, 150 MFLOPS, 3.3v, floating point General Description The ADSP-21061L is . The ADSP-21061L is the low power (3.3 volt) version of the ADSP-21061. The ADSP-21061L is a 32-bit processor optimized for high performance DSP applications. The ADSP-21061L combines the ADSP-21000 ADSP-21000 ADSP-21000 ADSP-21000 DSP core system-in-a-chip. Fabricated in a high-speed, low-power CMOS process, the ADSP-21061L has a 25 ns every instruction in a single cycle. The ADSP-21061L SHARC combines a high-performance floating www.datasheetarchive.com/files/analog-devices/gendesc/1524.htm |
Analog Devices | 11/06/2003 | 1.17 Kb | HTM | 1524.htm |
| Description= SHARC, 50 MHz, 150 MFLOPS, 5v, floating point General Description The ADSP-21061 is a integration and performance. The ADSP-21061 is a 32-bit processor optimized for high performance DSP applications. The ADSP-21061 combines the ADSP-21000 ADSP-21000 ADSP-21000 ADSP-21000 DSP core with a dual-ported on-chip SRAM and an I -power CMOS process, the ADSP-21061 has a 20 ns instruction cycle time operating at 50 MIPS. With its on-chip instruction cache, the processor can execute every instruction in a single cycle. The ADSP-21061 SHARC www.datasheetarchive.com/files/analog-devices/gendesc/1523.htm |
Analog Devices | 11/06/2003 | 1.14 Kb | HTM | 1523.htm |
| SHARC, 50 MHz, 150 MFLOPS, 5v, floating point General Description The ADSP-21061 is a member of the powerful SHARC family of floating point processors. The SHARC Super Harvard Architecture Computerare . The ADSP-21061 is a 32-bit processor optimized for high performance DSP applications. The ADSP-21061 , the ADSP-21061 has a 20 ns instruction cycle time operating at 50 MIPS. With its on-chip instruction cache, the processor can execute every instruction in a single cycle. The ADSP-21061 SHARC www.datasheetarchive.com/files/analog-devices/doc/productdescriptions/1532.html |
Analog Devices | 1.08 Kb | HTML | 1532.html | |
| Description= DSP Development Tools for the ADSP-21061 SHARC DSP General Description CROSSCORE debugging. EZ-KIT Lite for Analog Devices ADSP-2106x SHARC family of DSPs The ADSP-21061 EZ-KIT Lite DSPs. The ADSP-21061 EZ-KIT Lite includes an ADSP-21061 DSP desktop evaluation board and fundamental , users can learn more about ADI's ADSP-21061 DSP hardware and software development and prototype applications. The ADSP-21061 EZ-KIT Lite provides an evaluation suite of the VisualDSP%2B%2B development www.datasheetarchive.com/files/analog-devices/gendesc/10.htm |
Analog Devices | 12/06/2003 | 3.32 Kb | HTM | 10.htm |
| DSP Development Tools for the ADSP-21061 SHARC DSP General Description CROSSCORE, Analog Devices The ADSP-21061 EZ-KIT Lite provides developers with a cost-effective method for initial evaluation of the ADSP-2106x family of SHARC DSPs. The ADSP-21061 EZ-KIT Lite includes an ADSP-21061 DSP desktop -hosted tool set. With this EZ-KIT Lite, users can learn more about ADI's ADSP-21061 DSP hardware and software development and prototype applications. The ADSP-21061 EZ-KIT Lite provides an evaluation suite of the Visual www.datasheetarchive.com/files/analog-devices/doc/productdescriptions/19.html |
Analog Devices | 2.92 Kb | HTML | 19.html | |
| ADSP-21061 www.datasheetarchive.com/download/53942376-27963ZC/1523.xml |
Analog Devices | 05/06/2003 | 6.16 Kb | XML | 1523.xml |
| ADSP-21061L www.datasheetarchive.com/download/40740562-27964ZC/1524.xml |
Analog Devices | 05/06/2003 | 6.19 Kb | XML | 1524.xml |
| .3 - - - - - - MQFP, PBGA MQFP~,~PBGA ADSP-21061 ADSP-21061 http://www.analog.com/en/prod/0 - - - - - - MQFP, PBGA MQFP~,~PBGA ADSP-21061L ADSP-21061L http www.datasheetarchive.com/download/1455445-29669ZC/67.xml |
Analog Devices | 12/04/2005 | 33.61 Kb | XML | 67.xml |
| SRAM memory (2 Mbit on the ADSP-21062 ADSP-21062 ADSP-21062 ADSP-21062, 1 Mbit on the ADSP-21061), host processor interface, DMA www.datasheetarchive.com/files/analog-devices/doc/productdescriptions/1535.html |
Analog Devices | 1.12 Kb | HTML | 1535.html | |
| Part | Manufacturer | Description | Shortform Datasheet | Ordering |
| ADSP21061KS133 | Analog Devices | Digital Signal Processor - 32-bit Floating-Point DSP,DMA | ||
| ADSP21061KS160 | Analog Devices | Digital Signal Processor - 32-bit Floating-Point DSP,DMA | ||
| ADSP21061KS200 | Analog Devices | Digital Signal Processor - 32-bit Floating-Point DSP,DMA | ||
| ADSP21061KS200X | Analog Devices | Digital Signal Processor - 32-bit Floating-Point DSP,DMA | ||
| ADSP21061LAS176 | Analog Devices | Digital Signal Processor - 32-bit Floating-Point DSP,DMA | ||
| ADSP21061LKS133X | Analog Devices | Digital Signal Processor - 32-bit Floating-Point DSP,DMA | ||
| ADSP21061LKS160 | Analog Devices | Digital Signal Processor - 32-bit Floating-Point DSP,DMA | ||
| ADSP21061LKS160X | Analog Devices | Digital Signal Processor - 32-bit Floating-Point DSP,DMA | ||
| ADSP21061LKS176 | Analog Devices | Digital Signal Processor - 32-bit Floating-Point DSP,DMA |
| Analog Devices Part | Industry Part | Manufacturer | Description | Type |
| ADSP-21061 Buy | DSP56300 Buy | |||
| ADSP-21061 Buy | TMS320C3X Buy | |||
| ADSP-21061 Buy | TMS320C4X Buy | |||
| ADSP-21061L Buy | DSP56300 Buy | |||
| ADSP-21061L Buy | TMS320C3X Buy | |||
| ADSP-21061L Buy | TMS320C4X Buy |