NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Part | Manufacturer | Description | Samples | Ordering |
| Part | Manufacturer | Description | Type | Ordering |
| ADSP21060 | Analog Devices | 32 BIT, 40 BIT EXTENDED, IEEE FLOATING, 4MBIT RAM, 33.3>60MHz |
44 pages, |
Original | |
| ADSP-21060 | Analog Devices | SHARC, 40 MHz, 120 MFLOPS, 5v, floating point |
48 pages, |
Original | |
| ADSP-21060 | Analog Devices | ADSP-2106x SHARC DSP Microcomputer Family |
47 pages, |
Original | |
| ADSP-21060C | Analog Devices | ADSP-21060 Industrial SHARC DSP Microcomputer Family |
48 pages, |
Original | |
| ADSP-21060CW-133 | Analog Devices | Industrial SHARC DSP Microcomputer |
48 pages, |
Original | |
| ADSP-21060CW-133 | Analog Devices | DSP,SHARC DSP Family,Super Harvard Architecture,33.3 MIPS |
48 pages, |
Original | |
| ADSP-21060CW-160 | Analog Devices | DSP,SHARC DSP Family,Super Harvard Architecture,40 MIPS |
48 pages, |
Original | |
| ADSP-21060CZ-133 | Analog Devices | Industrial SHARC DSP Microcomputer |
48 pages, |
Original | |
| ADSP-21060CZ-133 | Analog Devices | DSP,SHARC DSP Family,Super Harvard Architecture,33.3 MIPS |
48 pages, |
Original | |
| ADSP-21060CZ-160 | Analog Devices | DSP,SHARC DSP Family,Super Harvard Architecture,40 MIPS |
48 pages, |
Original | |
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: DIGITAL SIGNAL PROCESSING: FLOATING POINT ADSP21020 ADSP21020 ADSP21020 ADSP21020 ADSP21020 ADSP21020 ADSP21020 ADSP21020 133 120 100 80 33 30 25 20 CYLCE TIME nsec 30 33.3 40 50 ADSP21060 ADSP21060 ADSP21060L ADSP21060L ADSP21061 ADSP21061 ADSP21061 ADSP21061 ADSP21061 ADSP21061 ADSP21061L ADSP21061L ADSP21061L ADSP21061L ADSP21062 ADSP21062 ADSP21062 ADSP21062 ADSP21062L ADSP21062L ADSP21062L ADSP21062L ADSP21160 ADSP21160 ADSP21065L ADSP21065L Quad ADSP21060 AD14060 AD14060 AD14060L AD14060L AD14160 AD14160 AD14160L AD14160L 133 160 133 160 200 133 160 160 176 133 160 133 160 33 40 33 40 50 33 40 40 44 33 40 33 40 ... | Original |
1 pages, |
ADSP21160 256KX32 64Kx32 AD14060 ADSP21020 ADSP21060 ADSP21060L ADSP21061 ADSP21061L ADSP21062 ADSP21062L 16Kx32 ADSP21020 abstract |
| Abstract: HD SHARC DVD Processor Digital Signal A V SHARC SHARC HD SHARC SHARCAV 122 SHARC 1 3 SHARC 1983 1991 1999 2003 2006 DSP ADSP-2100 ADSP-2100 SHARC ADSP-21020 ADSP-21020 SHARC(ADSP-21060) SHARC(ADSP-2126x/36x) 300 ... | Original |
2 pages, |
ADSP 2100 signal processor harvard architecture dvd processor datasheet abstract |
| Abstract: in a DMACx register during active DMA transfer. The ADSP-21060 does not let you do this, so the simulator flags any attempt to do this. For more information on the ADSP-21060 and DMA transfers, see the ADSP-21060 User's Manual. "DMA target outside internal memory space" This message indicates that the , set for an internal memory target. The ADSP-21060 does not let you do this, so the simulator flags any attempt to do this. For more information on the ADSP-21060 and DMA, see the ADSP-21060 User's ... | Original |
14 pages, |
ADSP21060 ADSP21020 ADSP21000 ADSP-21060 ADSP-21020 ADSP-21000 datasheet abstract |
| Abstract: V. ADSP-2106x Variations All Use 40 MHz Clock) ADSP-21060 ADSP-21060L ADSP-21062 ADSP-21062 ADSP-21062L ADSP-21062L , ADSP-21060-160 vs. TMS320C40-80 TMS320C40-80 Digital Signal Processor Math Operations Supported . . . ADSP-21060 , ADSP-21060? (The Analog Devices ADSP-21060 SHARC vs. Texas Instruments TMS320C40 TMS320C40) INTRODUCTION Rich , TMS320C4x. Table I shows a comparison for two of the DSPs. The ADSP21060 SHARC DSP beats the TMS320C40 TMS320C40 with , sequencing control options in the ADSP-21060's computational core provide many advantages over the TMS320C40 TMS320C40. ... | Original |
20 pages, |
ADSP21060 ADSP-21060 ADSP-21060L ADSP-21062 ADSP-21062L TMS320C44 4 bit barrel shifter circuit diagram tms320c40 instruction set barrel shifter block diagram ADSP-21060 reference manual block diagram of of TMS320C4X TMS320C40 1993 TMS320C40 AN-403 AN-403 abstract |
| Abstract: a Computer Products Division ADSP-21060 & ADSP-21060L Anomaly List for Revision 3.0 June 27, 2000 This document lists the anomalies expected to be in the revision 3.0 ADSP-21060/ADSP-21060L. These anomalies represent differences between this revision of silicon and the functionality specified in the ADSP-21060 data sheet dated April 1998 and the ADSP-2106x User's Manual dated May 1997. , ADSP-2106x products. Summary of Anomalies in ADSP-21060/21060L rev. 3.0: 1) DAG2 BITREV() instruction with ... | Original |
3 pages, |
ADSP-21065L ADSP-21060L ADSP-21060 ADSP-21060/ADSP-21060L ADSP-21060/21060L ADSP-21060 abstract |
| Abstract: 4 x ADSP-21060, (14060, Quad SHARC MCM), 40 MHz 2 MB SHARC Internal + 512K x 32, zero waitstate 64 , Interfaces 8 x ADSP-21060 (2 x 14060 Quad SHARC MCM), 40 MHz 4 MB SHARC Internal + 2 x 512K x 32, zero , Off-Board Interfaces 16 x ADSP-21060 (4 x 14060 Quad SHARC MCM), 40 MHz 8 MB SHARC Internal Link Ports , core (@40MHz), two independent memory buses, 4Mbit (ADSP-21060) on-chip dual ported SRAM, 32-bit FPU ... | Original |
2 pages, |
RS170 RS-170 ADSP-21060 AD14060 30FPS balboa 1 balboa controller ISCVIP2/B10 ISCVIP2/B10 abstract |
| Abstract: architecture and programming details are found in each processor's data sheet, the ADSP-21060 SHARC User's , Why ADSP-21000 ADSP-21000 Family? The ADSP-21020 ADSP-21020 and ADSP-21060 are the first members of Analog Devices' , basic features of the ADSP-21020 ADSP-21020 architecture. These features are also common to the ADSP-21060 SHARC , members of the ADSP-21000 ADSP-21000 Family have the same base architecture. The ADSP-21060 has advanced features , Introduction 1.4.3 ADSP-21060 SHARC The ADSP-21060 SHARC (Super Harvard Architecture Computer) is a ... | Original |
10 pages, |
ADSP21000 Application of dsp in military sonar circular connector datasheet line interactive ups design Digital Signal Processing Architectures spectron spox microprocessor architecture programming 32-bit microprocessor architecture ADSP filter algorithm implementation circuit diagram of speech recognition how dsp is used in radar ADSP-21000 ADSP-21000 ADSP-21000 abstract |
| Abstract: : #ifndef _ADSP21060_ #error \ Expecting an ADSP-21060. \ Check the linker description file! #endif , : #ifdef _ADSP21060_ && text_if_ADSP21060 ADSP21060_defined /* tests for ADSP-21060 code */ #endif úLIQGHI , _ADSP21060_ text_if_ADSP21060 ADSP21060_NOT_defined /* tests for non-ADSP-21060 code */ #endif úLQFOXGH The , : #ifdef _ADSP21060_ #include /* tests for non-ADSP-21060 code */ #endif , message. syntax: #warning message example: #ifndef _ADSP21060_ #warning \ Expecting an ... | Original |
16 pages, |
ADSP-21060 C PREPROCESSOR assembly coding ADSP21060 datasheet abstract |
| Abstract: industryleading ADSP-21060 and ADSP21062 ADSP21062 SHARC DSPs at a fraction of the price. These DSPs feature 1 Mbit , performance, I/O, memory integra- Pin and Code Compatiblity Enables Easy Upgrade Path to ADSP-21060 and ... | Original |
2 pages, |
diode IN 5402 ADSP21062 ADSP21061L ADSP-21062 ADSP-21061L ADSP-21061 ADSP-21060 ADSP-21000 ADSP-21061 abstract |
| Abstract: preserves much of the ADSP-21060 programming model, while extending performance and functionality. For , ADSP-21060. ADSP-21160 ADSP-21160 SHARC Technical Specification, Rev 3.0 1-1 2YHUYLHZ )HDWXUHV The following list outlines the feature deltas from the ADSP-21060. Each of these features are briefly , feature deltas from the ADSP-21060 are the addition of the 2nd execution complex (computation units and , resources available in the ADSP-21060 core programming model are available in ADSP-21160 ADSP-21160. Deviations: New ... | Original |
12 pages, |
ADSP-21160 ADSP-21060 ADSP-21000 4 bit barrel shifter circuit diagram 4 bit barrel shifter interrupt Assembly sharc Frequency multiplier 100MHz ADSP-21060 reference manual ADSP-21160 abstract |
| Abstract: a ADSP-2106x SHARC® DSP Microcomputer Family ADSP-21060/ADSP-21060L IEEE JTAG Standard 1149.1 , ://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2000 ADSP-21060/ADSP-21060L Multiprocessing , . . 3 ADSP-21000 ADSP-21000 FAMILY CORE ARCHITECTURE . . . . . . . 3 ADSP-21060/ADSP-21060L FEATURES . . . . , ADSP-21060 (5 V) . . . . . . . . . . . . 14 RECOMMENDED OPERATING CONDITIONS (3.3 V) 15 ELECTRICAL , Capacitance (at Maximum Case Temperature) (VDD = 3.3 V) . . . . . . . . 42 FIGURES Figure 1. ADSP-21060 ... | Original |
47 pages, |
ADSP21000 ADSP-21062 ADSP-21061 ADSP-21060L ADSP-21060 ADSP-21000 ADSP-21060 reference manual 21060 hardware reference ADSP-21060/ADSP-21060L ADSP-21060/ADSP-21060L abstract |
| Abstract: a ADSP-2106x SHARC® DSP Microcomputer Family ADSP-21060/ADSP-21060L IEEE JTAG Standard 1149.1 , ://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999 ADSP-21060/ADSP-21060L Multiprocessing , . . 3 ADSP-21000 ADSP-21000 FAMILY CORE ARCHITECTURE . . . . . . . 3 ADSP-21060/ADSP-21060L FEATURES . . . . , ADSP-21060 (5 V) . . . . . . . . . . . . 14 RECOMMENDED OPERATING CONDITIONS (3.3 V) 15 ELECTRICAL , Capacitance (at Maximum Case Temperature) (VDD = 3.3 V) . . . . . . . . 42 FIGURES Figure 1. ADSP-21060 ... | Original |
47 pages, |
ADSP21000 ADSP-21062 ADSP-21061 ADSP-21060L ADSP-21060 ADSP-21000 ADSP-21060 reference manual ADSP-21060/ADSP-21060L ADSP-21060/ADSP-21060L abstract |
| Abstract: a ADSP-2106x SHARC® DSP Microcomputer Family ADSP-21060/ADSP-21060L IEEE JTAG Standard 1149.1 , ://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999 ADSP-21060/ADSP-21060L Multiprocessing , . . 3 ADSP-21000 ADSP-21000 FAMILY CORE ARCHITECTURE . . . . . . . 3 ADSP-21060/ADSP-21060L FEATURES . . . . , ADSP-21060 (5 V) . . . . . . . . . . . . 14 RECOMMENDED OPERATING CONDITIONS (3.3 V) 15 ELECTRICAL , Capacitance (at Maximum Case Temperature) (VDD = 3.3 V) . . . . . . . . 42 FIGURES Figure 1. ADSP-21060 ... | Original |
48 pages, |
ADSP-21000 ADSP-21060 ADSP-21060L ADSP-21061 ADSP-21062 ADSP21000 SIMULATOR 4...20 mA ADSP-21060 reference manual ADSP-21060 simulator program download ADSP-21060/ADSP-21060L ADSP-21060/ADSP-21060L abstract |
| Abstract: a ADSP-2106x SHARC® DSP Microcomputer Family ADSP-21060/ADSP-21060L SUMMARY High , Fax: 781/326-8703 © Analog Devices, Inc., 1998 ADSP-21060/ADSP-21060L Multiprocessing Glueless , FAMILY CORE ARCHITECTURE . . . . . . . 4 ADSP-21060/ADSP-21060L FEATURES . . . . . . . . . . . . . . 4 , ELECTRICAL CHARACTERISTICS (5 V) . . . . . . . . . . . 13 POWER DISSIPATION ADSP-21060 (5 V) . . . . . . . . , ) (VDD = 3.3 V) . . . . . . . . 42 FIGURES Figure 1. ADSP-21060/ADSP-21060L Block Diagram . . . . 1 ... | Original |
44 pages, |
ADSP21000 ADSP-21062 ADSP-21061 ADSP-21060L ADSP-21060 reference manual ADSP-21060 ADSP-21000 64 point FFT radix-4 datasheet abstract |
| Abstract: a ADSP-2106x SHARC® DSP Microcomputer Family ADSP-21060/ADSP-21060L SUMMARY High , © Analog Devices, Inc., 1998 ADSP-21060/ADSP-21060L Multiprocessing Glueless Connection for Scalable , ARCHITECTURE . . . . . . . 4 ADSP-21060/ADSP-21060L FEATURES . . . . . . . . . . . . . . 4 DEVELOPMENT TOOLS , Maximum Case Temperature) (VDD = 3.3 V) . . . . . . . . 42 Figures Figure 1. ADSP-21060/ADSP-21060L , Figure 3. Shared Memory Multiprocessing System . . . . . . . . 6 Figure 4. ADSP-21060/ADSP-21060L Memory ... | Original |
44 pages, |
ADSP21000 ADSP-21062 ADSP-21061 ADSP-21060 reference manual ADSP-21000 ADSP-21060 datasheet abstract |
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| 480-MFLOP 480-MFLOP 480-MFLOP 480-MFLOP, Quad DSP, 5v, CBGA Package Features ADSP-21060 Core Processor (.x4) 480 MFLOPS Peak, 320 MFLOPS Sustained 25 ns Instruction Rate, Single-Cycle Instruction Execution-Each of Four . The core of the multiprocessor is the ADSP-21060 The modules embed several hundred feet of highly -in multiprocessing features of the ADSP-21060, to achieve 480 peak MFLOPS with a single chip type, in a single /or other peripherals. The ADSP-21060 link ports are interconnected to provide direct communication www.datasheetarchive.com/files/analog-devices/doc/productdescriptions/152.html |
Analog Devices | 2.35 Kb | HTML | 152.html | |
| 480-MFLOP 480-MFLOP 480-MFLOP 480-MFLOP, Quad DSP, 3.3v, CBGA Package Features ADSP-21060 Core Processor (.x4) 480 MFLOPS Peak, 320 MFLOPS Sustained 25 ns Instruction Rate, Single-Cycle Instruction Execution-Each of Four of the multiprocessor is the ADSP-21060 The modules embed several hundred feet of highly -in multiprocessing features of the ADSP-21060, to achieve 480 peak MFLOPS with a single chip type, in a single /or other peripherals. The ADSP-21060 link ports are interconnected to provide direct communication www.datasheetarchive.com/files/analog-devices/doc/productdescriptions/153.html |
Analog Devices | 2.35 Kb | HTML | 153.html | |
| , beyond that from the CQFP package. The core of the multiprocessor is the ADSP-21060 The modules system. The AD14160 AD14160 AD14160 AD14160 takes advantage of the built-in multiprocessing features of the ADSP-21060, to brought off-module for interfacing with expansion memory and/or other peripherals. The ADSP-21060 link www.datasheetarchive.com/files/analog-devices/gendesc/143.htm |
Analog Devices | 05/06/2003 | 1.74 Kb | HTM | 143.htm |
| , beyond that from the CQFP package. The core of the multiprocessor is the ADSP-21060 The modules system. The AD14160 AD14160 AD14160 AD14160 takes advantage of the built-in multiprocessing features of the ADSP-21060, to brought off-module for interfacing with expansion memory and/or other peripherals. The ADSP-21060 link www.datasheetarchive.com/files/analog-devices/gendesc/144.htm |
Analog Devices | 05/06/2003 | 1.73 Kb | HTM | 144.htm |
| ADSP-21060 www.datasheetarchive.com/download/83054131-27961ZC/1521.xml |
Analog Devices | 05/06/2003 | 7.23 Kb | XML | 1521.xml |
| ADSP-21060L www.datasheetarchive.com/download/26928246-27962ZC/1522.xml |
Analog Devices | 05/06/2003 | 6.91 Kb | XML | 1522.xml |
| 480-MFLOP 480-MFLOP 480-MFLOP 480-MFLOP, Quad DSP, 5 V, CQFP Package Features ADSP-21060 Core Processor (.x4) 480 MFLOPS Peak, 320 MFLOPS Sustained 25 ns Instruction Rate, Single-Cycle Instruction Execution-Each of Four Processors 16 Mbit Shared SRAM (Internal to SHARCs) 4 Gigawords Addressable Off-Module Memory Twelve 40 Mbyte/s Link Ports (Three per SHARC) Four 40 Mbit/s Independent Serial Ports (One from Each the multiprocessor is the ADSP-21060 DSP microcomputer. The AD14060/AD14060L AD14060/AD14060L AD14060/AD14060L AD14060/AD14060L modules have the www.datasheetarchive.com/files/analog-devices/doc/productdescriptions/150.html |
Analog Devices | 1.28 Kb | HTML | 150.html | |
| 480-MFLOP 480-MFLOP 480-MFLOP 480-MFLOP, Quad DSP, 3.3v, CQFP Package Features ADSP-21060 Core Processor (.x4) 480 MFLOPS Peak, 320 MFLOPS Sustained 25 ns Instruction Rate, Single-Cycle Instruction Execution-Each of Four Processors 16 Mbit Shared SRAM (Internal to SHARCs) 4 Gigawords Addressable Off-Module Memory Twelve 40 Mbyte/s Link Ports (Three per SHARC) Four 40 Mbit/s Independent Serial Ports (One from Each the multiprocessor is the ADSP-21060 DSP microcomputer. The AD14060/AD14060L AD14060/AD14060L AD14060/AD14060L AD14060/AD14060L modules have the www.datasheetarchive.com/files/analog-devices/doc/productdescriptions/151.html |
Analog Devices | 1.28 Kb | HTML | 151.html | |
| Description= 480-MFLOP 480-MFLOP 480-MFLOP 480-MFLOP, Quad DSP, 5 V, CQFP Package General Description The AD14060/AD14060L AD14060/AD14060L AD14060/AD14060L AD14060/AD14060L Quad-SHARC is the first in a family of high performance DSP multiprocessor modules. The core of the multiprocessor is the ADSP-21060 DSP microcomputer. The AD14060/AD14060L AD14060/AD14060L AD14060/AD14060L AD14060/AD14060L modules have the highest performance Â-density and lowest costÂ-performance ratios of any in their class. They are ideal for applications requiring higher levels of performance and/or functionality per unit area. www.datasheetarchive.com/files/analog-devices/gendesc/141.htm |
Analog Devices | 05/06/2003 | 0.62 Kb | HTM | 141.htm |
| Description= 480-MFLOP 480-MFLOP 480-MFLOP 480-MFLOP, Quad DSP, 3.3v, CQFP Package General Description The AD14060/AD14060L AD14060/AD14060L AD14060/AD14060L AD14060/AD14060L Quad-SHARC is the first in a family of high performance DSP multiprocessor modules. The core of the multiprocessor is the ADSP-21060 DSP microcomputer. The AD14060/AD14060L AD14060/AD14060L AD14060/AD14060L AD14060/AD14060L modules have the highest performance Â-density and lowest costÂ-performance ratios of any in their class. They are ideal for applications requiring higher levels of performance and/or functionality per unit area. www.datasheetarchive.com/files/analog-devices/gendesc/142.htm |
Analog Devices | 05/06/2003 | 0.62 Kb | HTM | 142.htm |
| Part | Manufacturer | Description | Shortform Datasheet | Ordering |
| ADSP21060CW133 | Analog Devices | Digital Signal Processor - JTAG, Heat slug Down | ||
| ADSP21060CW160 | Analog Devices | Digital Signal Processor - JTAG, Heat slug Down | ||
| ADSP21060CZ133 | Analog Devices | Digital Signal Processor - JTAG, Heat slug up | ||
| ADSP21060CZ160 | Analog Devices | Digital Signal Processor - JTAG, Heat slug up | ||
| ADSP21060KS133 | Analog Devices | Digital Signal Processor - 32-bit Floating-Point DSP,DMA | ||
| ADSP21060KS160 | Analog Devices | Digital Signal Processor - 32-bit Floating-Point DSP,DMA | ||
| ADSP21060LCW133 | Analog Devices | Digital Signal Processor - JTAG, Heat slug Down | ||
| ADSP21060LCW160 | Analog Devices | Digital Signal Processor - JTAG, Heat slug Down | ||
| ADSP21060LKS133 | Analog Devices | Digital Signal Processor - 32-bit Floating-Point DSP,DMA | ||
| ADSP21060LKS160 | Analog Devices | Digital Signal Processor - 32-bit Floating-Point DSP,DMA |
| Analog Devices Part | Industry Part | Manufacturer | Description | Type |