ACD82124 ACD80800 ACD80900 PHY-22 PHY-23 MAC-22 MAC-23

Communication Devices ACD82124 24 Ports 10/100 Fast Ethernet Switch 1. GENERAL DESCRIPTION The ACD82124 is a single chip

Advanced Communication Devices ACD82124 ACD82124 24 Ports 10/100 Fast Ethernet Switch 1. GENERAL DESCRIPTION The ACD82124 ACD82124 is a single chip implementation of a 24 port 10/100 Ethernet switch system intended for IEEE 802.3 and 802.3u compatible networks. The device includes 24 independent 10/100 MACs. Each MAC interfaces with an external PMD/PHY device through a standard MII interface. Speed can be automatically configured through the MDIO port. Each port can operate at either 10Mbps or 100Mbps. The core logic of the ACD82124 ACD82124, implemented with patent pending BASIQ (Bandwidth Assured Switching with Intelligent Queuing) technology, can simultaneously process 24 asynchronous 10/100Mbps port traffic. The Queue Manager inside the ACD82124 ACD82124 provides the capability of routing traffic with the same order of sequence, without any packet loss. A complete 24 port 10/100 switch can be built with the use of the ACD82124 ACD82124, 10/100 PHY and SRAM. The MAC addresses can be expanded from the built-in 2K to 11K by the use of ACD's external ARL chip (ACD80800 ACD80800 Address Resolution Logic). Advanced network management features can be supported with the use of ACD's MIB (ACD80900 ACD80900 Management Information Base) chip. · · · · · · · · · · · · · · · · · · 24 ports 10/100 auto-sensing with MII interface Half-duplex operation, with optional full-duplex configuration by combining 2 adjacent ports 2.4 Gbps aggregated throughput True non-blocking switch architecture Flexible port configuration (up to 12 full duplex 10/ 100 ports, up to 24 half duplex 10/100 ports) Built-in storage of 2,000 MAC address Automatic source address learning Zero-Packet Loss back-pressure flow control Store-and-forward switch mode Port based V-LAN support UART type CPU management interface Supports up to 11K MAC addresses with the ACD80800 ACD80800 RMON and SNMP support with ACD80900 ACD80900 Status LEDs: Link, Speed, Full Duplex, Transmit, Receive, Collision and Frame Error Reversible MII option for CPU and expansion port interface Wire speed forwarding rate 576 pin PBGA package 3.3V power supply, 3.3V I/O with 5V tolerance 3. SYSTEM BLOCK DIAGRAM PMD/ PHY-0 PMD/ PHY-1 FIFO Buffer MAC-0 FIFO Lookup Engine (2K MAC Addr.) Buffer FIFO BIST Handler LED Controller Buffer MAC-1 FIFO Buffer MX Queue Manager DMX PMD/ PHY-22 PHY-22 PMD/ PHY-23 PHY-23 FIFO Buffer MAC-22 MAC-22 FIFO Buffer FIFO Buffer ARL Interface SRAM Interface MIB Interface ARL ACD80800 ACD80800 (11K MAC Addr.) (optional) SRAM MIB ACD80900 ACD80900 (optional) MAC-23 MAC-23 FIFO Buffer ACD82124 ACD82124 Brochure - ACD82124 ACD82124, 3/99 1 INTRODUCTORY 2. FEATURES 11. PACKAGING 4. Top View Advanced Comm. Devices FLLLLLSMAYYWW INTRODUCTORY ACD82124 ACD82124 Pin - A1 34.50 40.00+/-0.20 Side View o.56 0.60+/-0.05 2.33+/-0.13 Bottom View AA A B C D E F G H J K L M N P R T U V W Y Pin - A1 AC AE AG AJ AB AD AF AH AK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 1.27 0.75+/-0.15 36.83 Brochure - ACD82124 ACD82124, 3/99 2