ACD80800 ACD82124 ACD82012 ACD80900 PQFP128

Communication Devices ACD80800 Address Resolution Logic ARL with 8K MAC Addresses SUMMARY FEATURES The ACD80800 serves as an

Advanced Communication Devices ACD80800 ACD80800 Address Resolution Logic ARL with 8K MAC Addresses SUMMARY FEATURES The ACD80800 ACD80800 serves as an Address Resolution Logic for ACD's switch controller chips (ACD82124 ACD82124, ACD82012 ACD82012 etc.) through a glueless ARL interface. It automatically builds up an address table and can map up to 8K MAC addresses into their associated ports. · · The ACD80800 ACD80800 can work without a CPU in a unmanaged switch system, or with a CPU and a ACD MIB (ACD80900 ACD80900 Management Information Base). A direct input/output interface is integrated to support a management CPU. The CPU can configure the operation mode of the ACD80800 ACD80800, learn all the addresses in the address table, add new addresses into the table, control security or filtering features of each address entry, etc. · The ACD80800 ACD80800 is designed with such a high performance that, it will never slow down the frame switching operation conducted by the ACD's switch controllers. Together with the non-blocking architecture of the ACD's switch controllers, the chip set (a ACD switch controller plus the ACD80800 ACD80800, plus ACD80900 ACD80900 in a managed switch system) can provide wire speed forwarding rate under any type of traffic load. · · · · · · · · · · · Up to 8K MAC address lookup Direct Interface with the ACD's switch controllers, no glue logic Direct Data I/O interface for the management CPU Less than 200 ns Address lookup turn around time guaranteed for each port Automatic address learning from switch without CPU intervention 100K address/sec learning rate Manual address learning through CPU interface CPU Address-lock option for each MAC address to prevent aging & change CPU Frame-reception disable option for each MAC address Newly-learned MAC address notification to CPU Aged-out MAC address notification to CPU Automatic address aging control, with configurable aging period 0.35 micron, 3.3V CMOS technology 128-Pin PQFP package ACD80800 ACD80800 Used in A Managed n-Port Fast Ethernet Switch System P(n-1) P(n-2) P(n-3) ACD82xxx n-Port Fast Ethernet Switch Controller ACD80900 ACD80900 MIB P1 P0 CPU ASRAM Brochure - ACD80800 ACD80800, 7/98 ACD80800 ACD80800 Address Resolution Logic 1 ACD80800 ACD80800 Block Diagram Address Learning Engine Address Aging Engine Control Registers Command Registers Data Registers CPU Interface Address Registers Switch Interface Address Lookup Engine CPU Interface Engine Address Table (8K Entries) E1 E2 Symble A2 D1 D2 e E1 E2 f g ZD Min 2.57 na na na na na 0.13 0.13 na Nom 2.71 23.2 18.5 0.5 17.2 12.5 0.15 0.2 0.75 Max 2.87 na na na na na 0.17 0.28 na e A2 g D2 PQFP128 PQFP128 D1 ZD Brochure - ACD80800 ACD80800, 7/98 2