NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: an Unmasked FP Exception May Take Single Step Trap before Retirement of Instruction AAF14 X , Changes. Specification Update 19 Errata AAF14 An Enabled Debug Breakpoint or Single Step ... | Original |
33 pages, |
AAF16 AAF21 AAF37 FCBGA 437 AAF41 intel core 2 extreme quad-core QX6700 AAF32 AAF35 aaf25 AAF29 aaf39 aaf33 AAF23 instruction set for intel pentium i7 datasheet abstract |
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| Abstract: QL6600 QL6600 Eclipse Data Sheet · · · · · · Combining Performance, Density, and Embedded RAM Device Highlights Advanced Clock Network · Nine Global Clock Networks: Flexible Programmable Logic · .25 um, Five layer metal CMOS Process · One Dedicated · Eight Programmable · 2.5 V VCC, 2.5/3.3 V Drive Capable I/O · 20 Quad-Net Networks: Five per Quadrant · 4,032 Logic Cells · 16 I/O Controls: Two per I/O Bank · 583,008 Max System Gates · Up to 506 I/O Pins Embedded Dual Por ... | Original |
40 pages, |
QL6600-4PT280C QL6600-4PS484C QL6600 PT280 AA10 QL6600 abstract |
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| Abstract: QL6500 QL6500 Eclipse Data Sheet · · · · · · Combining Performance, Density and Embedded RAM Device Highlights Advanced Clock Network · Nine Global Clock Networks: Flexible Programmable Logic · .25 um, Five layer metal CMOS Process · One Dedicated · Eight Programmable · 2.5 V VCC, 2.5 V/3.3 V Drive Capable I/O · 20 Quad-Net Networks: Five per Quadrant · 3,032 Logic Cells · 16 I/O Controls: Two per I/O Bank · 488,064 Max System Gates · Up to 444 I/O Pins Embedded Dual Po ... | Original |
40 pages, |
QL6500-4PT280C QL6500-4PS484C QL6500 PT280 AA10 QL6500 abstract |
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| Abstract: K25 4032 Eclipse Family Data Sheet ииииии Combining Performance, Density, and Embedded RAM Device Highlights Flexible Programmable Logic и 0.25 Ñ..., 5 layer metal CMOS process Programmable I/O и High performance: ... | Original |
73 pages, |
THERMAL Fuse m20 QL6250 QL6250-4PQ208C QL6250-4PS484C QL6250-4PT280C QL6325 QL6500 QL6600 AA10 datasheet abstract |
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| Abstract: EclipsePlus Family Data Sheet ииииии Combining Performance, Density, and Embedded RAM Device Highlights Flexible Programmable Logic и 0.25 Ñ...m five layer metal CMOS process и 2.5 V VCC, 2.5/3.3 V drive capable I/O и Up to 4,032 logic cells и Up to 583,008 system gates и Up to 347 I/O pins Embedded Dual-Port SRAM Advanced Clock Network и Nine global clock networks: One dedicated Eight programmable и 20 quad-net networks-five per quadrant и 16 I/O controls-two per I/O bank ... | Original |
65 pages, |
w21 transistor m14 AA10 ecu BLOCK DIAGRAM QL7100 QL7100-4PQ208C QL7100-4PS484C QL7100-4PT280C QL7120 QL7160 QL7180 w17 transistor A-AF14 datasheet abstract |
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| Abstract: Wireless Components 1-Chip Car Radio TUA 4307 Version 2.0 (A5) Specification September 1999 Revision History: Current Version: 09.99 Previous Version:Specification 11.12.1998 Page (in previous Version) Page (in current Version) Subjects (major changes since last revision) 19 3-11 Capacitor pin 65 removed (redesign related) 33 5-7 Pos. 22: Limits changed due to incorrect load condition of the tester, no IC change behaviour (No redesign related) - 5-10 ... | Original |
48 pages, |
VIF450 am radio station block diagram AM/FM bb512 DIODE csb912 neosid neosid 15khz coil neosid v6 neosid v7 RL50 AM "AGC Amplifier" ECL DIVIDER C4546 tua 4307 datasheet abstract |
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| Abstract: QL7160 QL7160 EclipsePlus Data Sheet ииииии Combining Performance, Density and Embedded RAM Device Highlights Advanced Clock Network и Nine Global Clock Networks: Flexible Programmable Logic и 0.25 Ñ...m five layer metal CMOS Process и One Dedicated и Eight Programmable и 2.5 V VCC, 2.5 V/3.3 V Drive Capable I/O и 20 Quad-Net Networks-five per Quadrant и 3,072 Logic Cells и 16 I/O Controls-two per I/O Bank и 488,064 Max System Gates и Four phase locked loops и 347 ... | Original |
42 pages, |
QL7160-4PT280C QL7160-4PS484C QL7160 AA15 AA13 AA10 QL7160 abstract |
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| Abstract: QL6325 QL6325 Eclipse Data Sheet · · · · · · Combining Performance, Density, and Embedded RAM Device Highlights Advanced Clock Network · Nine Global Clock Networks: Flexible Programmable Logic · .25 um, Five layer metal CMOS Process · One Dedicated · Eight Programmable · 2.5 V VCC, 2.5 V/3.3 V Drive Capable I/O · 20 Quad-Net Networks: Five per Quadrant · 1,536 Logic Cells · 16 I/O Controls: Two per I/O Bank · 320,640 Max System Gates · Up to 313 I/O Pins Embedded Dual P ... | Original |
38 pages, |
QuickLogic QL6325-4PS484C QL6325 PT280 AA10 QL6325-4PT280C QL6325 abstract |
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| Abstract: QL6600 QL6600 Eclipse Data Sheet · · · · · · Combining Performance, Density, and Embedded RAM Device Highlights Advanced Clock Network · Nine Global Clock Networks: Flexible Programmable Logic · 0.25 um, Five layer metal CMOS Process · One Dedicated · Eight Programmable · 2.5 V VCC, 2.5/3.3 V Drive Capable I/O · 20 Quad-Net Networks: Five per Quadrant · 4,032 Logic Cells · 16 I/O Controls: Two per I/O Bank · 583,008 Max System Gates · Up to 347 I/O Pins PLL Embedded RA ... | Original |
41 pages, |
QL6600-4PT280C QL6600-4PS484C QL6600 AA15 AA13 AA10 QL6600 abstract |
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| Abstract: QL6500 QL6500 Eclipse Data Sheet · · · · · · Combining Performance, Density and Embedded RAM Device Highlights Advanced Clock Network · Nine Global Clock Networks: Flexible Programmable Logic · 0.25 um, Five layer metal CMOS Process · One Dedicated · Eight Programmable · 2.5 V VCC, 2.5 V/3.3 V Drive Capable I/O · 20 Quad-Net Networks: Five per Quadrant · 3,032 Logic Cells · 16 I/O Controls: Two per I/O Bank · 488,064 Max System Gates · 347 I/O Pins PLL Embedded RAM Blo ... | Original |
40 pages, |
QL6500-4PT280C QL6500-4PS484C QL6500 AA15 AA13 AA10 QL6500 abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
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| "AND2" X2K.LIB "AND2" 7AAF14DC U1 [] "" "" "" "" "" "" "" "" "" ( "1" "1" I ) ( "2" "2" I ) ( "O" "O" O ) `I R "AND2B1" X2K.LIB "AND2B1" 7AAF14DD U2 [] "" "" "" "" "" "" "" "" "" ( "1" "1" I ) ( "2B" "2B" I ) ( "O" "O" O ) `I R "OR2" X2K.LIB "OR2" 7AAF14DE U3 [] "" "" "" "" "" "" "" "" "" ( "1" "1" I ) ( "2" "2" I ) ( "O" "O" O ) `I R "DLAT" X2K.LIB "DLAT" 7AAF14DF U4 www.datasheetarchive.com/download/25061709-958118ZC/or4sdt2.zip (LDM.INF) |
Xilinx | 05/09/1996 | 155.36 Kb | ZIP | or4sdt2.zip |
| .LIB `I R "AND2" X2K.LIB "AND2" 7AAF14DC U1 [] "" "" "" "" "" "" "" "" "" ( "1" "1" I ) ( "2" "2" I ) ( "O" "O" O ) `I R "AND2B1" X2K.LIB "AND2B1" 7AAF14DD U2 [] "" "" "" "" "" "" "" "" "" ( "1" "1" I ) ( "2B" "2B" I ) ( "O" "O" O ) `I R "OR2" X2K.LIB "OR2" 7AAF14DE U3 [] "" "" "" "" "" "" "" "" "" ( "1" "1" I ) ( "2" "2" I ) ( "O" "O" O ) `I R "DLAT" X2K.LIB "DLAT" 7AAF14DF U4 www.datasheetarchive.com/download/25061709-958118ZC/or4sdt2.zip (LDMRD.INF) |
Xilinx | 05/09/1996 | 155.36 Kb | ZIP | or4sdt2.zip |
| XPAL.LIB `I R "AND2" X2K.LIB "AND2" 7AAF14DC U1 [] "" "" "" "" "" "" "" "" "" ( "1" "1" I ) ( "2" "2" I ) ( "O" "O" O ) `I R "AND2B1" X2K.LIB "AND2B1" 7AAF14DD U2 [] "" "" "" "" "" "" "" "" "" ( "1" "1" I ) ( "2B" "2B" I ) ( "O" "O" O ) `I R "OR2" X2K.LIB "OR2" 7AAF14DE U3 [] "" "" "" "" "" "" "" "" "" ( "1" "1" I ) ( "2" "2" I ) ( "O" "O" O ) `I R "DLAT" X2K.LIB "DLAT" 7AAF14DF U4 www.datasheetarchive.com/download/25061709-958118ZC/or4sdt2.zip (LDMSD.INF) |
Xilinx | 05/09/1996 | 155.36 Kb | ZIP | or4sdt2.zip |
| "AND2" X2K.LIB "AND2" 7AAF14DC U1 [] "" "" "" "" "" "" "" "" "" ( "1" "1" I ) ( "2" "2" I ) ( "O" "O" O ) `I R "AND2B1" X2K.LIB "AND2B1" 7AAF14DD U2 [] "" "" "" "" "" "" "" "" "" ( "1" "1" I ) ( "2B" "2B" I ) ( "O" "O" O ) `I R "OR2" X2K.LIB "OR2" 7AAF14DE U3 [] "" "" "" "" "" "" "" "" "" ( "1" "1" I ) ( "2" "2" I ) ( "O" "O" O ) `I R "DLAT" X2K.LIB "DLAT" 7AAF14DF U4 www.datasheetarchive.com/download/48301953-996480ZC/or4sdt2.zip (LDM.INF) |
Xilinx | 09/04/1997 | 155.36 Kb | ZIP | or4sdt2.zip |
| .LIB `I R "AND2" X2K.LIB "AND2" 7AAF14DC U1 [] "" "" "" "" "" "" "" "" "" ( "1" "1" I ) ( "2" "2" I ) ( "O" "O" O ) `I R "AND2B1" X2K.LIB "AND2B1" 7AAF14DD U2 [] "" "" "" "" "" "" "" "" "" ( "1" "1" I ) ( "2B" "2B" I ) ( "O" "O" O ) `I R "OR2" X2K.LIB "OR2" 7AAF14DE U3 [] "" "" "" "" "" "" "" "" "" ( "1" "1" I ) ( "2" "2" I ) ( "O" "O" O ) `I R "DLAT" X2K.LIB "DLAT" 7AAF14DF U4 www.datasheetarchive.com/download/48301953-996480ZC/or4sdt2.zip (LDMRD.INF) |
Xilinx | 09/04/1997 | 155.36 Kb | ZIP | or4sdt2.zip |
| XPAL.LIB `I R "AND2" X2K.LIB "AND2" 7AAF14DC U1 [] "" "" "" "" "" "" "" "" "" ( "1" "1" I ) ( "2" "2" I ) ( "O" "O" O ) `I R "AND2B1" X2K.LIB "AND2B1" 7AAF14DD U2 [] "" "" "" "" "" "" "" "" "" ( "1" "1" I ) ( "2B" "2B" I ) ( "O" "O" O ) `I R "OR2" X2K.LIB "OR2" 7AAF14DE U3 [] "" "" "" "" "" "" "" "" "" ( "1" "1" I ) ( "2" "2" I ) ( "O" "O" O ) `I R "DLAT" X2K.LIB "DLAT" 7AAF14DF U4 www.datasheetarchive.com/download/48301953-996480ZC/or4sdt2.zip (LDMSD.INF) |
Xilinx | 09/04/1997 | 155.36 Kb | ZIP | or4sdt2.zip |
| `F 1.00 NDFF `B "1" "1" "A" " February 25, 1991" "" "" "" "" "" "" "" "" `P I "SD" `P I "D" `P O "Q" `P I "CB" `P I "RD" `E X2K.LIB `E XPAL.LIB `I R "DFF" X2K.LIB "DFF" 7AAF14E1 U1 [] "" "" "" "" "" "" "" "" "" ( "C" "C" I ) ( "Q" "Q" O ) ( "D" "D" I ) ( "RD" "RD" I ) ( "SD" "SD" I ) `I R "INV" X2K.LIB "INV" 7AAF14E2 U2 [] "" "" "" "" "" "" "" "" "" ( "O" "O" O ) ( "I" "I" I ) `J ( P I "SD" ) ( R U1 "SD" I ) `J ( P I "D" ) ( R U1 "D" I ) `J ( R U1 "Q" O ) ( P O "Q" ) `J ( P I "CB" ) ( R U2 "I www.datasheetarchive.com/download/25061709-958118ZC/or4sdt2.zip (NDFF.INF) |
Xilinx | 05/09/1996 | 155.36 Kb | ZIP | or4sdt2.zip |
| `F 1.00 NDFF `B "1" "1" "A" " February 25, 1991" "" "" "" "" "" "" "" "" `P I "SD" `P I "D" `P O "Q" `P I "CB" `P I "RD" `E X2K.LIB `E XPAL.LIB `I R "DFF" X2K.LIB "DFF" 7AAF14E1 U1 [] "" "" "" "" "" "" "" "" "" ( "C" "C" I ) ( "Q" "Q" O ) ( "D" "D" I ) ( "RD" "RD" I ) ( "SD" "SD" I ) `I R "INV" X2K.LIB "INV" 7AAF14E2 U2 [] "" "" "" "" "" "" "" "" "" ( "O" "O" O ) ( "I" "I" I ) `J ( P I "SD" ) ( R U1 "SD" I ) `J ( P I "D" ) ( R U1 "D" I ) `J ( R U1 "Q" O ) ( P O "Q" ) `J ( P I "CB" ) ( R U2 "I www.datasheetarchive.com/download/48301953-996480ZC/or4sdt2.zip (NDFF.INF) |
Xilinx | 09/04/1997 | 155.36 Kb | ZIP | or4sdt2.zip |
| `F 1.00 LD `B "1" "1" "A" " February 13, 1991" "" "" "" "" "" "" "" "" `P I "D" `P O "Q" `P I "L" `E X2K.LIB `E XPAL.LIB `I R "DLAT" X2K.LIB "DLAT" 7AAF14DB U1 [] "" "" "" "" "" "" "" "" "" ( "L" "L" I ) ( "Q" "Q" O ) ( "D" "D" I ) ( "RD" "RD" I ) ( "SD" "SD" I ) `J ( P I "D" ) ( R U1 "D" I ) `J ( R U1 "Q" O ) ( P O "Q" ) `J ( P I "L" ) ( R U1 "L" I ) www.datasheetarchive.com/download/25061709-958118ZC/or4sdt2.zip (LD.INF) |
Xilinx | 05/09/1996 | 155.36 Kb | ZIP | or4sdt2.zip |
| `F 1.00 LDRD `B "1" "1" "A" " February 13, 1991" "" "" "" "" "" "" "" "" `P I "D" `P O "Q" `P I "L" `P I "RD" `E X2K.LIB `E XPAL.LIB `I R "DLAT" X2K.LIB "DLAT" 7AAF14E0 U1 [] "" "" "" "" "" "" "" "" "" ( "L" "L" I ) ( "Q" "Q" O ) ( "D" "D" I ) ( "RD" "RD" I ) ( "SD" "SD" I ) `J ( P I "D" ) ( R U1 "D" I ) `J ( R U1 "Q" O ) ( P O "Q" ) `J ( P I "L" ) ( R U1 "L" I ) `J ( P I "RD" ) ( R U1 "RD" I ) www.datasheetarchive.com/download/25061709-958118ZC/or4sdt2.zip (LDRD.INF) |
Xilinx | 05/09/1996 | 155.36 Kb | ZIP | or4sdt2.zip |