NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Part | Manufacturer | Description | Samples | Ordering |
| DS90UH927QEVM | Texas Instruments | DS90UH927Q-Q1 5MHz-85MHz FPD-Link III Serializer Evaluation Module | 
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| DS90UB927QEVM | Texas Instruments | DS90UB927Q-Q1 5MHz-85MHz FPD-Link III Serializer Evaluation Module |
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| MAX4389EUT+ | Maxim Integrated Products | Ultra-Small, Low-Cost, 85MHz Op Amps with Rail-to-Rail Outputs and Disable |
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| MAX4389EXT+ | Maxim Integrated Products | Ultra-Small, Low-Cost, 85MHz Op Amps with Rail-to-Rail Outputs and Disable |
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| MAX4390EXT+ | Maxim Integrated Products | Ultra-Small, Low-Cost, 85MHz Op Amps with Rail-to-Rail Outputs and Disable |
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| Catalog Datasheet Results | Type | Document Tags |
| Abstract: x 64KB Top Bottom T/B T/B T/B T/B T/B T/B Clock Freq. 85Mhz 85Mhz 85Mhz 85Mhz 75Mhz 85Mhz Erasable Sectors 16 x 4KB 32 x 4KB 64 x 4KB 128 x 4KB 256 x 4KB 512 x 4KB 1024 x ... | Original |
1 pages, |
A25L80P a25l032 A25L05P A25L10P A25L20P A25L40P 25L20 A25L016 25L04 25L40 A25L064 25L80 32-KB 128KB 256KB A25L05P abstract |
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| Abstract: Series 6N, Seam Sealed Ceramic 7.5X5mm Surface Mount Broad frequency range from 1.544MHz to 85MHz Compact and thin ceramic package with a metalized lead for surface mounting and , 3.3V 1.554~85MHz Operating Temperature -10~70, -20~70, -40~85 35mA max (15pF , ~31.999MHz 25mA max 32~80MHz 45mA 32~85MHz 40mA 32~85MHz 45mA max 55mA max (50pF , conditions max 32~85MHz 40mA max +/-25ppm, +/-50ppm, +/-100ppm AT 1/2 Vdd Vol ... | Original |
2 pages, |
ic 544 a 45ma 673D UNITED CHEMICON 6nc3 6nc2 datasheet abstract |
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| Abstract: DS90CR218A3 DS90CR218A3 LVDS 21 CMOS/TTL 85MHz , DS90CR218A DS90CR218A 12 85MHz 50 ± 1V ( 1.2V ) 1.785Gbit/s (max) 223Mbytes , DS101080-06-JP DS101080-06-JP 1 DS90CR217/DS90CR218A DS90CR217/DS90CR218A 3.3V 21-Bit Channel Link-12 85MHz DS90CR218A DS90CR218A 3.3V 21-Bit Channel Link-12 85MHz Converted to nat2000 DTD updated PID (jfg) updated pid source to , , corrected typos Changed from 217/218(75MHz) to 217/218A 217/218A(85MHz), CW Changed to released (CW) modified ... | Original |
11 pages, |
MTD48 LINK12 DS90CR218AMTD DS90CR218A DS90CR217 DS90CR218A abstract |
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| Abstract: DS90CR218A3 DS90CR218A3 LVDS 21 CMOS/TTL 85MHz , DS90CR218A DS90CR218A 12 85MHz 50 ± 1V ( 1.2V ) 1.785Gbit/s (max) 223Mbytes , DS101080-06-JP DS101080-06-JP 1 DS90CR217/DS90CR218A DS90CR217/DS90CR218A 3.3V 21-Bit Channel Link-12 85MHz DS90CR218A DS90CR218A 3.3V 21-Bit Channel Link-12 85MHz Converted to nat2000 DTD updated PID (jfg) updated pid source to , , corrected typos Changed from 217/218(75MHz) to 217/218A 217/218A(85MHz), CW Changed to released (CW) modified ... | Original |
11 pages, |
MTD48 DS90CR218AMTD DS90CR218A DS90CR217 an-806 DS90CR218A abstract |
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| Abstract: , 85MHz IF, IF SAW filter, IP2, TDMA, GSM, EDGE, WCDMA Nov 01, 2000 APPLICATION NOTE 453 REP005 REP005: Tuned front end for dual-band CDMA for use with low-cost 85MHz IF SAWs Abstract: This reference , modifies the FM/cellular/PCS mixers to a common 85MHz IF. The design uses a low-noise amplifier (LNA) with , triple-mode CDMA front-end IC using a common, digital, 85MHz IF SAW filter and an 85MHz AMPS FM IF SAW filter. This project entailed custom-tuning to modify the FM/cellular/PCS mixers all to a common 85MHz ... | Original |
2 pages, |
MAX2320 APP453 AN453 REP005 REP005 abstract |
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| Abstract: WIRELESS, RF, AND CABLE May 01, 2002 Silicon Germanium (SiGe) Downconverter Tuned for GPS Receivers The RF input for a global positioning system (GPS) receiver is 1575MHz. Assuming an IF of 85MHz , from a +3.0V supply. The RF input for a GPS receiver is 1575MHz. Assuming an IF of 85MHz, and low-side , an IF of 85MHz, and low-side LO injection (fLO, = 1490MHz), the MAX2682 MAX2682 achieves +12.0dB of gain , Performance VCC = +3.0V, fRF1 = 1575MHz, fRF2 = 1576MHz, fLO = 1490MHz, PLO = -5dBm, fIF = 85MHz Parameter ... | Original |
3 pages, |
MAX2682 Germanium diode data sheet MAX2682/MAX2681/MAX2682 MAX2680/MAX2681/MAX2682 MAX2682 abstract |
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| Abstract: /85MHz for EU available · CATV · TXRX · · US42MHz/54MHzEU65MHz/85MHz Connection 1 , 2 , R947DCCFN-1021 R947DCCFN-1021 5 R947DCCFN-1021 R947DCCFN-1021 US (42MHz/54MHz) High pass port 7 EU (65MHz/85MHz) Cable ... | Original |
1 pages, |
datasheet abstract |
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| Abstract: DS90CR217/DS90CR218A DS90CR217/DS90CR218A 3.3V 21-Bit Channel Link-85MHz DS90CR217 DS90CR217 21 CMOS/TTL 3 LVDS(Low Voltage Differential Signaling) 4LVDS 21 DS90CR218A DS90CR218A 3 LVDS 21CMOS/TTL 21CMOS/TTL 85MHz , 85MHz 50 / (TxINPUT) ± 1V ( 1.2V ) 1.785Gbit/s(max) 223Mbytes/s EMI 345mV(typ) PLL , Printed in Japan NSJ 9/2000 DS90CR217/DS90CR218A DS90CR217/DS90CR218A 3.3V 21-Bit Channel Link-85MHz November 1999 , minmax Tppos -min max RSKM 2 Note 10 ISI Note 11 - 10 40ps/300mm Note 10: 85MHz 250ps ... | Original |
15 pages, |
DS90CR217/DS90CR218A DS90CR217/DS90CR218A abstract |
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| Abstract: CMOS Output Clock Frequency 1Lane 20MHz to 85MHz 32bit 40MHz to 170MHz 2Lane Contact Us 32bit 2Lane 32bit x2 20MHz to 85MHz ... | Original |
1 pages, |
lvds 1080p 32bit Vbyone V-by-One HS ttl input convert to video output V-by-One THCV218 THCV218 abstract |
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| Abstract: ® HSOutput CMOS Input Clock Frequency 32bit 20MHz to 85MHz 2Lane 40MHz to 170MHz 32bit x2 Contact Us 1Lane 32bit 2Lane 20MHz to 85MHz ... | Original |
1 pages, |
V-by-One HS v-by-one ttl input convert to video output lvds 1080p convert 1080p Power One 32Bit THCV217 THCV217 abstract |
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| Abstract: + ... | Original |
1 pages, |
D202 213B 204D datasheet abstract |
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| Abstract: 2-WAY DIVIDER/COMBINER MODEL HR86S HR86S 90° QUADRATURE HYBRID Guaranteed Specifications Parameter Range Features Limits ... | Original |
1 pages, |
Quadrature Hybrid 70 MHZ HR86S 213B 204D datasheet abstract |
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| Abstract: Memory Products-Serial SPI EEPROM Note: Products in Italics NOT Recommended for New Designs Pkg Code ( ) = # of leads Product Description X25020 X25020 2K SPI serial EEPROM (256 X 8) SPI modes (0,0 and 1,1),1MHz, Block Lock P, S(8) 4K SPI serial EEPROM X25040 X25040 (Alt part (512 X 8) SPI Modes # see Sys. Mgmt. (0,0 and 1,1), 1MHz, X5043/5 X5043/5) Block Lock P, S(8) Temp Range X25057 X25057 4K SPI serial EEPROM (512 X 8), 5MHz, Block Lock X25097 X25097 (Alt. part 8K SPI serial EEP ... | Original |
2 pages, |
X5643 X25020 X25040 X25057 X25097 X25128 X25138 X25160 x25256 X5083 X25320 4K x 8 EEPROM Memory X5043/5 X25020 abstract |
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| Abstract: RFOS501X RFOS501X RFOS501X RFOS501X 5MHz to 85MHz Si Optical Receiver 5MHz to 85MHz Si OPTICAL RECEIVER , 5MHz to 85MHz CATV Reverse Amplifier Systems SiGe HBT GaAs pHEMT Si CMOS Pin Detector , V/W dB Bandwidth 5MHz to 85MHz; VB =12V; TMB =30°C; ZL =75 =1310nm, f=85MHz f=5MHz to 85MHz , 3100 , , TMB =30°C, ZL =75 O/E slope (5MHz to 85MHz): 0.70dB O/E flatness (5MHz to 85MHz): 0.24dB S22 ... | Original |
4 pages, |
RFOS5013 Rfmd hybrid optical receiver module RFOS501X RFOS501X abstract |
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| Abstract: Maxim > App Notes > Wireless and RF Keywords: REP005 REP005: Tuned Front End for Dual-Band CDMA for Use with Low-Cost 85MHz IF SAWs Nov 01, 2000 APPLICATION NOTE 453 REP005 REP005: Tuned Front End for Dual-Band CDMA for Use with LowCost 85MHz IF SAWs Rapid Engineering Prototypes are real circuits that Maxim , using a common, digital, 85MHz IF SAW filter and an 85MHz AMPS FM IF SAW filter. This project entailed custom-tuning to modify the FM/cellular/PCS mixers all to a common 85MHz IF. This was required because of ... | Original |
2 pages, |
MAX2320 APP453 AN453 REP005 REP005 abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
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| /us, 85MHz, Rail-to-Rail Input and Output Op Amps PRICE* LT1803CS8 LT1803CS8 LT1803CS8 LT1803CS8 85MHz, 100V/us R-to-R In/Out OA SOIC 8 1.60 LT1803CS5 LT1803CS5 LT1803CS5 LT1803CS5 85MHz, 100V/us R-to-R In/Out OA SOT-23 5 1.60 LT1803IS5 LT1803IS5 LT1803IS5 LT1803IS5 85MHz, 100V/us R-to-R In/Out OA SOT-23 5 1.85 LT1803IS8 LT1803IS8 LT1803IS8 LT1803IS8 85MHz, 100V/us R www.datasheetarchive.com/files/linear/c1154/c1009/c1022/p2366/p2366-variations.html |
Linear | 21/11/2005 | 6.03 Kb | HTML | p2366-variations.html |
| /us, 85MHz, Rail-to-Rail Input and Output Op Amps PRICE* LT1804IS8 LT1804IS8 LT1804IS8 LT1804IS8 Dual, 85MHz, 100V/us R-to-R In/Out OA SOIC 8 2.85 LT1804CDD LT1804CDD LT1804CDD LT1804CDD Dual, 85MHz, 100V/us R-to-R In/Out OA DFN 8 2.55 LT1804CS8 LT1804CS8 LT1804CS8 LT1804CS8 Dual, 85MHz Dual, 85MHz, 100V/us R-to-R In/Out OA DFN 8 3 www.datasheetarchive.com/files/linear/c1154/c1009/c1022/p2367/p2367-variations.html |
Linear | 21/11/2005 | 6.04 Kb | HTML | p2367-variations.html |
| Strobe LVDS 21-Bit Channel Link-85 MHz [Preliminary] [Information as of 14-Dec-98] DS90CR217 DS90CR217 DS90CR217 DS90CR217 +3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link-85 MHz LVDS data streams back into 21 bits of CMOS/TTL data. At a transmit clock frequency of 85 MHz, 21 bits of TTL data are transmitted at a rate of 595 Mbps per LVDS data channel. Using a 85 MHz clock, the cable size problems associated with wide, high speed TTL interfaces. Features 20 to 85 MHz www.datasheetarchive.com/files/national/htm/nsc05476.htm |
National | 18/12/1998 | 8.53 Kb | HTM | nsc05476.htm |
| National P/N DS90CR218 DS90CR218 DS90CR218 DS90CR218 - +3.3V Rising Edge Data Strobe LVDS 21-bit Channel Link-85 MHz . [Information as of 11-Sep-98] DS90CR218 DS90CR218 DS90CR218 DS90CR218 +3.3V Rising Edge Data Strobe LVDS 21-bit Channel Link-85 MHz streams back into 21 bits of CMOS/TTL data. At a transmit clock frequency of 85 MHz, 21 bits of TTL data are transmitted at a rate of 595 Mbps per LVDS data channel. Using a 85 MHz clock, the data throughput problems associated with wide, high speed TTL interfaces. Features 20 to 85 MHz shift clock www.datasheetarchive.com/files/national/htm/nsc03014-v4.htm |
National | 16/09/1998 | 6.84 Kb | HTM | nsc03014-v4.htm |
| National P/N DS90CR217 DS90CR217 DS90CR217 DS90CR217 - +3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link-85 MHz . [Information as of 11-Sep-98] DS90CR217 DS90CR217 DS90CR217 DS90CR217 +3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link-85 MHz LVDS data streams back into 21 bits of CMOS/TTL data. At a transmit clock frequency of 85 MHz, 21 bits of TTL data are transmitted at a rate of 595 Mbps per LVDS data channel. Using a 85 MHz clock, the cable size problems associated with wide, high speed TTL interfaces. Features 20 to 85 MHz www.datasheetarchive.com/files/national/htm/nsc03013-v4.htm |
National | 16/09/1998 | 8.14 Kb | HTM | nsc03013-v4.htm |
| /us, 85MHz, Rail-to-Rail Input and Output Op Amps PRICE* LT1805IS LT1805IS LT1805IS LT1805IS Quad, 85MHz, 100V/us R-to-R In/Out OA SOIC 14 5.05 LT1805CS LT1805CS LT1805CS LT1805CS Quad, 85MHz, 100V/us R-to-R In www.datasheetarchive.com/files/linear/c1154/c1009/c1022/p2368/p2368-variations.html |
Linear | 21/11/2005 | 5.33 Kb | HTML | p2368-variations.html |
| with Low-Cost 85MHz IF SAWs REP005 REP005 REP005 REP005: Tuned Front End for Dual-Band CDMA for Use with Low-Cost 85MHz IF SAWs performance of this dual-band triple-mode CDMA front-end IC using a common, digital, 85MHz IF SAW filter and an 85MHz AMPS FM IF SAW filter. This project entailed custom-tuning to modify the FM/cellular/PCS mixers all to a common 85MHz IF. This was required because of access www.datasheetarchive.com/files/maxim/0003/appno020.htm |
Maxim | 04/04/2001 | 7.79 Kb | HTM | appno020.htm |
| Transmitter 18-Bit Flat Panel Display (FPD) Link-85 MHz +3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-85 MHz Generic P Supply Voltage 3.3 V Pixel Clock 20 - 85 MHz Graphic Bits (bit are sampled and transmitted. At a transmit clock frequency of 85 MHz, 24 bits of RGB data and 3 bits LVDS data channel. Using a 85 MHz clock, the data throughput is 297.5 Mbytes/sec. Also available is www.datasheetarchive.com/files/national/htm/nsc03771-v2.htm |
National | 28/06/2001 | 17.36 Kb | HTM | nsc03771-v2.htm |
| Transmitter 18-Bit Flat Panel Display (FPD) Link-85 MHz +3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-85 MHz Generic P Supply Voltage 3.3 V Pixel Clock 20 - 85 MHz Graphic Bits (bit are sampled and transmitted. At a transmit clock frequency of 85 MHz, 24 bits of RGB data and 3 bits LVDS data channel. Using a 85 MHz clock, the data throughput is 297.5 Mbytes/sec. Also available is www.datasheetarchive.com/files/national/htm/nsc02637-v2.htm |
National | 14/09/2000 | 16.51 Kb | HTM | nsc02637-v2.htm |
| Transmitter 18-Bit Flat Panel Display (FPD) Link-85 MHz Supply Voltage 3.3 V Pixel Clock 20 - 85 MHz Graphic Bits (bit) 6 Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-85 MHz, +3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-85 MHz 425 Kbytes 24-Jun-02 View Online Download (FPD) Link-85 MHz, +3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-85 MHz www.datasheetarchive.com/files/national/htm/nsc02882-v5.htm |
National | 16/08/2002 | 17.8 Kb | HTM | nsc02882-v5.htm |