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CS82C37A Intersil Corporation 4 CHANNEL(S), 8MHz, DMA CONTROLLER, PQCC44 pdf Buy
CP82C37A-5 Intersil Corporation 4 CHANNEL(S), 5MHz, DMA CONTROLLER, PDIP40, PLASTIC, DIP-40 pdf Buy
MD82C37A/B Intersil Corporation 4 CHANNEL(S), 8MHz, DMA CONTROLLER, CDIP40, CERAMIC, DIP-40 pdf Buy

82C37A Datasheet

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82C37A Harris Semiconductor CMOS High Performance Programmable DMA Controller
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23 pages,
204.35 Kb

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82C37A Harris Semiconductor CMOS High Performance Programmable DMA Controller
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24 pages,
277.8 Kb

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82C37A Intersil CMOS High Performance Programmable DMA Controller
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23 pages,
147.3 Kb

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82C37A-5 Intel CHMOS High Performance Programmable DMA Controller
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18 pages,
697.4 Kb

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82C37A-5 Intersil CMOS High Performance Programmable Dma Controller
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24 pages,
277.8 Kb

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82C37A

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: . This input may be driven from DC to 12.5MHz for the 82C37A-12, from DC to 8MHz for the 82C37A, or from DC to 5MHz for the 82C37A-5. The Clock may be stopped in either state for standby operation. CS , DACK signals respectively of a channel for the initial 82C37A.This allows the DMA requests of the , input control signal used by the CPU to load information into the 82C37A. In the Active cycle, it is an , transfers by the use of the Ready line on the 82C37A. For compressed transfers, wait states can be ... Intersil
Original
datasheet

24 pages,
416.18 Kb

80286 microprocessor features 80286 microprocessor pin out diagram 8088 microprocessor 80C286 80C86 80C88 82C82 AEN 6 control data bus for 80286 CP82C37A-5 logical block diagram of 80286 IP82C37A-5 82C37A FN2967 82C37A CS82C37A-5 82C37A smd transistor marking f10 82C37A 82C37A DMA Controller 82C37A marking db2 82C37A 82C37A 82C37A TEXT
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Abstract: from DC to 12.5MHz for the 82C37A-12, from DC to 8MHz for the 82C37A, or from DC to 5MHz for the 82C37A-5. The Clock may be stopped in either state for standby operation. CHIP SELECT: Chip Select is an , signals respectively of a channel for the initial 82C37A.This allows the DMA requests of the additional , the 82C37A. In the Active cycle, it is an output control signal used by the 82C37A to load data to the , transfers by the use of the Ready line on the 82C37A. For compressed transfers, wait states can be inserted ... Intersil
Original
datasheet

24 pages,
586.44 Kb

82C37A FN2967 82C82 80C286 80C86 80C88 NSC800 TEXT
datasheet frame
Abstract: driven from DC to 8MHz for the 82C37A, or from DC to 5 MHz for the 82C37A-5. The Clock may be stopped in , (I82C37A I82C37A) (I82C37A-5 I82C37A-5) TA = -55°C to +1250C 1250C (M82C37A M82C37A) (M82C37A-5 M82C37A-5) SYMBOL PARAMETER 82C37A-5 82C37A UNITS , ©cifications 82C37A T-52-33-19 T-52-33-19 A.C. Electrical Spécifications DMA Master Mode 82C37A-S 82C37A , HARRIS SEflICOND SECTOR TS DE | M302271 M302271 OOIO^L o |~ ' T-52-33-19 T-52-33-19 20 HARRIS 82C37Â CMOS High , signal used by the CPU to load information into the 82C37A. In the Active cycle, It is an output control ... OCR Scan
datasheet

18 pages,
1641.04 Kb

octal priority encoder M302271 T-52-33-19 82C37 TEXT
datasheet frame
Abstract: Information Type SA B 82C37A-5-P S A B 82C37A-8-P Ordering code Q 67120-P215 67120-P215 Q 67Ì20-P239 20-P239 Description Program , SAB 82C37A-5/82C37A-8 High-Performance CMOS Programmable DMA Controller '« f t SAB 82C37A-5 5 MHz , in a 40-pin DIP. The S A B 82C37A-8 is the 8 MHz version of the 5 MHz S A B 82C37A-5. The S A B , 82C37A-5and up to 8 MHz for the S A B 82C37A-8. R ESET Reset is an asynchronous active-high input w hich , Sym bol Param eter 82C37A-5 min. ^AEL ¿AET ^AFAB ^AFC ^AFDB ^AHR ^AHS ^AHW Lim it values 82C37A-8 ... OCR Scan
datasheet

18 pages,
719.9 Kb

82C37A-5/82C37A-8 82C37A-5 82C37A-8 TEXT
datasheet frame
Abstract: input may be driven from DC to 12.5M Hz for the 82C37A-12, from DC to 8M Hz for the 82C37A, or from DC to 5MHz for the 82C37A-5. The Clock may be stopped in either state for standby operation. CHIP SELECT , . Separate software commands can also set or reset this flip-flop. 4-197 82C37A the initial 82C37A.This , 82C37A. In the Active cycle, it is an output control signal used by the 82C37A to load data to the , (SW) can be inserted between S3 and S4 in normal transfers by the use of the Ready line on the 82C37A. ... OCR Scan
datasheet

23 pages,
1744.99 Kb

D82c TEXT
datasheet frame
Abstract: control 82C37A operations. This input may be driven from DC to 12.5MHz for the 82C37A-12, from DC to 8MHz for the 82C37A, or from DC to 5MHz for the 82C37A-5. The Clock may be stopped in either state for , respectively of a channel for 4-197 82C37A the initial 82C37A.This allows the DMA requests of the , control signal used by the CPU to load information into the 82C37A. In the Active cycle, it is an output , between S3 and S4 in normal transfers by the use of the Ready line on the 82C37A. For compressed ... Harris Semiconductor
Original
datasheet

23 pages,
204.35 Kb

NSC800 80C86 80C88 82C37A 82C82 CP82C37A-12 CP82C37A-5 CS82C37A-5 IP82C37A-5 IS82C37A-5 80C286 TEXT
datasheet frame
Abstract: . This input may be driven from DC to 12.5MHz for the 82C37A-12, from DC to 8MHz for the 82C37A, or from DC to 5MHz for the 82C37A-5. The Clock may be stopped in either state for standby operation. CS , respectively of a channel for 4-197 82C37A the initial 82C37A.This allows the DMA requests of the , control signal used by the CPU to load information into the 82C37A. In the Active cycle, it is an output , between S3 and S4 in normal transfers by the use of the Ready line on the 82C37A. For compressed ... Intersil
Original
datasheet

23 pages,
147.29 Kb

NSC800 80C286 80C86 80C88 82C37A 82C82 CP82C37A-5 CS82C37A-5 IP82C37A-5 IS82C37A-5 8086 DMA channels TEXT
datasheet frame
Abstract: 12.5MHz for the 82C37A-12, from DC to 8MHz for the 82C37A, or from DC to 5MHz for the 82C37A-5. The Clock , connected to the DREQ and DACK signals respectively of a channel for 4-197 82C37A the initial 82C37A.This , information into the 82C37A. In the Active cycle, it is an output control signal used by the 82C37A to load , the 82C37A. For compressed transfers, wait states can be inserted between S2 and S4. See timing , the microprocessor to write or read the internal registers of the 82C37A. When CS is low and HLDA is ... OCR Scan
datasheet

23 pages,
799.88 Kb

82C37A TEXT
datasheet frame
Abstract: which control 82C37A operations. This input may be driven from DC to 12.5MHz for the 82C37A-12, from DC to 8MHz for the 82C37A, or from DC to 5MHz for the 82C37A-5. The Clock may be stopped in either , DACK signals respectively of a channel for 4-197 82C37A the initial 82C37A.This allows the DMA , information into the 82C37A. In the Active cycle, it is an output control signal used by the 82C37A to load , S4 in normal transfers by the use of the Ready line on the 82C37A. For compressed transfers, wait ... OCR Scan
datasheet

23 pages,
355.02 Kb

82C37A TEXT
datasheet frame
Abstract: from DC to 12.5MHz for the 82C37A-12, from DC to 8MHz for the 82C37A, or from DC to 5MHz for the 82C37A-5. The Clock may be stopped in either state for standby operation. CS 11 I CHIP SELECT , for 197 82C37A the initial 82C37A.This allows the DMA requests of the additional device to , by the CPU to load information into the 82C37A. In the Active cycle, it is an output control signal , S4 in normal transfers by the use of the Ready line on the 82C37A. For compressed transfers, wait ... Intersil
Original
datasheet

24 pages,
277.8 Kb

NSC800 80C86 80C88 82C37A 82C82 CP82C37A-5 CS82C37A-5 IP82C37A-5 IS82C37A-5 80C286 TEXT
datasheet frame
Abstract: H RHARRIS S E M I C O N D U C T O R 82C37A CMOS High Performance Programmable DMA Controller Description The 82C37A is an enhanced version of the industry standard 8237A Direct Memory Access (DMA , 82C37A offers increased functionality, improved performance, and dramatically reduced power consumption. The fully static design permits gated clock operation for even further reduction of power. The 82C37A , independently programmable with a variety of features for flexible operation. The 82C37A is designed to be used ... OCR Scan
datasheet

22 pages,
984.78 Kb

82C37A TEXT
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Abstract: g ) H A R R IS 82C37A/883 CMOS High Performance Programmable DMA Controller , Description The 82C37A/883 Is an enhanced version of the industry standard 823TA 823TA Direct Memory AoCttss (DMA , 82C37A/ 883 offers increased functionality, improved performance, and dramatically reduced power , 82C37A/883 controller can Improve system performance by allowing external devices to transfer data , . The 82C37A/883 is designed to be used with an external address latch, such as the 82C82 82C82, to ... OCR Scan
datasheet

1 pages,
62.15 Kb

8086 DMA channels 8085 block transfer program 82c37a TEXT
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Abstract: a 82C37A H I C O N DRTS A U CI O R R S E M CM OS High Performance Programmable DMA Controller A ugust 1996 Features Description • Com patible with the NMOS 8237A The 82C37A is , using Harris’ advanced 2 micron C M O S process. Pin compatible with NM OS designs, the 82C37A offers , 82C37A controller can improve system performance by allowing external devices to transfer data directly , . The 82C37A is designed to be used with an external address latch, such as the 82C82 82C82, to demultiplex ... OCR Scan
datasheet

22 pages,
554.17 Kb

82C37A TEXT
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Archived Files

Abstract Saved from Date Saved File Size Type Download
82C37A Harris Corporation's Home Page € Semiconductor's Home Page € Product Information € 82C37A 82C37A Data Sheets fn2967.pdf CMOS High Performance Programmable DMA Controller ( Adobe's pdf format - 209523 bytes) Packaging F40.6 Mil-Std-1835 GDIP1-T40 GDIP1-T40 (D-5, Configuration A) 40 Lead Ceramic Dual-In-Line Frit Seal Package J44.A Mil-Std-1835 CQCC1-N44 CQCC1-N44 (C-5) 44 Pad Ceramic Leadless Chip Carrier Package
/datasheets/files/harris/data/fn/fn2/fn2967/index.htm
Harris 15/08/1997 3.24 Kb HTM index.htm
References     82C37A       CMOS High Performance The 82C37A is an enhanced version of the industry standard 8237A Direct Memory Access (DMA) controller, fabricated using Intersil's advanced 2 micron CMOS process. Pin compatible with NMOS designs, the 82C37A fully static design permits gated clock operation for even further reduction of power. The 82C37A independently programmable with a variety of features for flexible operation. The 82C37A is designed to be
/datasheets/files/intersil/device_pages/device_82c37a.html
Intersil 07/09/2006 23.8 Kb HTML device_82c37a.html
Features Package 82C37A CMOS High Performance Programmable DMA Controller • 82C37A CMOS 16-Bit Microprocessor 68 Ld PLCC 82C37A High Performance Microprocessor with Memory Management and Protection 68 Ld PGA 82C37A CMOS 16-Bit
/datasheets/files/intersil/device_pages/parametric_15095.html
Intersil 17/09/2006 60.85 Kb HTML parametric_15095.html
Features Package 82C37A CMOS High Performance Programmable DMA Controller • 82C37A CMOS 16-Bit Microprocessor 68 Ld PLCC 82C37A High Performance Microprocessor with Memory Management and Protection 68 Ld PGA 82C37A CMOS 16-Bit
/datasheets/files/intersil/device_pages/parametric_6000.html
Intersil 17/09/2006 27.23 Kb HTML parametric_6000.html
PERIPHERALS GENERAL 82C37A-5 82C37A-5   MSM82C37A-5 MSM82C37A-5 CAB2C37A5 CAB2C37A5   82C37A Enhanced Programmable DMA Controller 82C37A-12   uPD71037-10 uPD71037-10   CA82C37A10 CA82C37A10   , 82C284 82C284, 82C37A, 82C50A 82C50A, 82C52 82C52, 82C54 82C54, 82C55A 82C55A, 82C59A 82C59A, 82C82 82C82, 82C83H 82C83H, 82C84A 82C84A, 82C85 82C85, 82C86H 82C86H, 82C87H 82C87H, 82C88 82C88
/datasheets/files/harris/micro/upx86.htm
Harris 15/08/1997 10.79 Kb HTM upx86.htm
Im Prozessor integriert zwei 82C37A DMA-Controller, zwei 82C59A 82C59A Interrupt-Controller, ein 82C54 82C54
/datasheets/files/stmicroelectronics/stonline/products/support/stpc/appli/mkc/486sipi.htm
STMicroelectronics 02/11/1999 12.99 Kb HTM 486sipi.htm
Im Prozessor integriert zwei 82C37A DMA-Controller, zwei 82C59A 82C59A Interrupt-Controller, ein 82C54 82C54
/datasheets/files/stmicroelectronics/stonline/products/support/stpc/appli/mkc/486sipi-v1.htm
STMicroelectronics 20/10/2000 12.99 Kb HTM 486sipi-v1.htm
Im Prozessor integriert zwei 82C37A DMA-Controller, zwei 82C59A 82C59A Interrupt-Controller, ein 82C54 82C54
/datasheets/files/stmicroelectronics/stonline/products/support/stpc/appli/mkc/486sipi-v2.htm
STMicroelectronics 14/06/1999 11.33 Kb HTM 486sipi-v2.htm
  82C37A   CMOS High Performance Programmable DMA Controller     82C54 82C54
/datasheets/files/intersil/device_pages/device_82c84a.html
Intersil 07/09/2006 24.28 Kb HTML device_82c84a.html
    82C37A   CMOS High Performance Programmable DMA Controller  
/datasheets/files/intersil/device_pages/device_ms82c55a.html
Intersil 08/09/2006 21.91 Kb HTML device_ms82c55a.html

Intersil Cross Reference Results

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5962-9054302MQA Buy 82C37A Buy Intersil Pin for Pin Replacement. CMOS High Performance Programmable DMA Controller
CP82C37A-5 Buy 82C37A Buy Intersil Pin for Pin Replacement. CMOS High Performance Programmable DMA Controller
CS82C37A Buy 82C37A Buy Intersil Pin for Pin Replacement. CMOS High Performance Programmable DMA Controller
CS82C37A-1296 Buy 82C37A Buy Intersil Pin for Pin Replacement. CMOS High Performance Programmable DMA Controller
CS82C37AZ Buy 82C37A Buy Intersil Pin for Pin Replacement. CMOS High Performance Programmable DMA Controller
MD82C37A/B Buy 82C37A Buy Intersil Pin for Pin Replacement. CMOS High Performance Programmable DMA Controller