NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS

Datasheet Archive - Datasheet Search Engine

 

Direct from the Manufacturer

Part Manufacturer Description PDF Samples Ordering
SMP08GBC Analog Devices Low Droop Rate Octal Sample-and-Hold with Multiplexed Input Package: CHIPS OR DIE; No of Pins: 0; Container: 81/Tray ri Buy

Catalog Search Results

Catalog Datasheet Results Type PDF Document Tags
Abstract: converter. The XRD9820/22 XRD9820/22 also contain a high speed 8-1 analog multiplexer which can be used to monitor , 12-bit (XRD9822 XRD9822) A/D converter. The XRD9820/22 XRD9820/22 also has an on-board 8-1 analog multiplexer which can be , be continually connected to the green input (if 8-1 multiplexer is not selected, See Configuration , signal on the rising edge of 8-1 Multiplexer Select The three most significant bits (PB7-PB5) are used , the A/D input to the 8-1 multiplexer output defined by the 8-1 Multiplexer Select (see above). Test ... OCR Scan
datasheet

24 pages,
1447.61 Kb

XRD9822ACV XRD9822 XRD9820ACV XRD9820 XRD9812 XRD9810 DB10 XRD9820/22 XRD9820/22 abstract
datasheet frame
Abstract: Three-State Buffer (Efj) (F.O. = 8) 3 F533 Three-State Buffer (EN) (F.O. = 24) 4 Multiplexer F569 8-1 Multiplexer 17 F570 4-1 Multiplexer 8 F571 2-1 Multiplexer 4 Parity F581 8 Bit Odd Parity Generator 18 ... OCR Scan
datasheet

11 pages,
904.16 Kb

F434 F644 F922 F922 4 PC9800 circuit diagram of full adder transistor f421 tr f422 transistor f423 F772 F715 pd65000 f421 F423 T-42-11-09 //PD65000 T-42-11-09 abstract
datasheet frame
Abstract: Three-State Buffer (Efj) (F.O. = 8) 3 F533 Three-State Buffer (EN) (F.O. = 24) 4 Multiplexer F569 8-1 Multiplexer 17 F570 4-1 Multiplexer 8 F571 2-1 Multiplexer 4 Parity F581 8 Bit Odd Parity Generator 18 ... OCR Scan
datasheet

11 pages,
654.24 Kb

1 bit full adder F421 Transistor f425 F434 f636 F772 F913 F962 PC9800 pin DIAGRAM OF EX-NOR gate f429 dooia F423 transistor f423 datasheet abstract
datasheet frame
Abstract: Section 8.1. 8.1 Multiplexer/switch select functions The internal multiplexer switch position is , Gen2 2 : 1 multiplexer 19. Contents 1 2 3 4 5 6 7 7.1 7.2 8 8.1 9 10 11 11.1 11.2 , CBTL06DP212 CBTL06DP212 High-performance DisplayPort Gen2 2 : 1 multiplexer Rev. 1 - 21 February 2011 , multiplexer meant for DisplayPort (DP) v1.2, v1.1a or Embedded DisplayPort applications operating at data , ) Switch/multiplexer position select CMOS input DDC and AUX ports tolerant to being pulled to +5 V via 2.2 ... Original
datasheet

18 pages,
133.43 Kb

TFBGA48 MO-195 DP AUX CIRCUIT design displayport 1.2 DisplayPort CBTL06DP212 CBTL06DP212 abstract
datasheet frame
Abstract: features an 8­1 multiplexer (MUX). This allows selection of the analog-input channel to be digitized. The , Apply to ADC Multiplexer (TLV1578 TLV1578 Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7 , multiplexer A ly J6 ­ 2 x 13 plug lug J2 Apply signal direct to converter J3 The user can , to ADC Multiplexer (TLV1578 TLV1578 Only) Eight possible analog inputs are provided via connector J6. , conditioning Multiplexer output External input via J3 or channel 0 via W21 Installed W21 Link ... Original
datasheet

50 pages,
1294.41 Kb

r53a connector lumberg R61B PCI2040 tfm capacitor TLV1571CPW TLV1578 Lumberg connector S 80 5 pin U15B idc 20 pin data ribbon connector ENV50204 R52H r61h transistor w18 57 small datasheet abstract
datasheet frame
Abstract: JRC 022 BIT2 BIT3 BIT4 BIT5 3 4 8-1 MULTIPLEXER r I 8-BIT COUNTER BIT6 _I PSO PS1 PS2 BIT0 BIT1 , registers can be addressed in the data space as RAM locations at addresses 80h (X) and 81 h (Y). They can ... OCR Scan
datasheet

70 pages,
2826.87 Kb

ST62T65BM6 JRC 1331 PDIP28 spru ST6265B ST62E65B ST62T65 ST62T65B 072 JRC JRC 072 D 555 jrc jrc 072 B/E65 ST62T65 abstract
datasheet frame
Abstract: ST62T00 ST62T00 ST62T01 ST62T01, E01 8-BIT OTP/EPROM MCUs WITH A/D CONVERTER PRODUCT PREVIEW 3.0 to 6.0V Supply Operating Range 8 MHz Maximum Clock Frequency s -40 to +85°C Operating Temperature Range s Run, Wait and Stop Modes s 5 Interrupt Vectors s Look-up Table capability in OTP/EPROM s Data OTP/EPROM: User selectable size (in program OTP/EPROM) s Data RAM: 64 bytes s 9 I/O pins, fully programmable as: ­ Input with pull-up resistor ­ Input without pull-up resistor ­ Input with interrupt ge ... Original
datasheet

386 pages,
3241.05 Kb

ST62E1x basic ST62T60BM6 programmer st6220 CONNECTOR CENTRONIC 34 pin ST626x-EMU ST62T10 programmer st6220 programmer St62t25b6 jrc 11 st62t00b transistor pcr 406 jrc 317 317 jrc ST62T00 ST62T01 ST62T00 abstract
datasheet frame
Abstract: registers can be addressed in the data space as RAM locations at addresses 80h (X) and 81 h (Y). They can ... OCR Scan
datasheet

58 pages,
2268.01 Kb

ST62T63B ST62T53B ST62E60B ST6253B PS020 PDIP20 ST62T53B abstract
datasheet frame
Abstract: locations at addresses 80h (X) and 81 h (Y). They can also be accessed with the direct, short direct, or bit ... OCR Scan
datasheet

62 pages,
2227.36 Kb

ST62T52B ST62T52 ST62E62B ST6252B ST62T52B abstract
datasheet frame
Abstract: JRC 723 can be addressed in the data space as RAM locations at addresses 80h (X) and 81 h (Y). They can also ... OCR Scan
datasheet

58 pages,
2467.12 Kb

ST62T53B ST62E60B ST626X-EMU2 ST6253B PS020 PDIP20 jrc 072 ST62T53B abstract
datasheet frame

Extended Electronics Archive (Experimental)

Abstract Saved from Date Saved File Size Type Download
Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer.
 
SY10/100E163 SY10/100E163 SY10/100E163 SY10/100E163 2-BIT 8:1 MULTIPLEXER SY10/100E163 SY10/100E163 SY10/100E163 SY10/100E163 2-BIT 8:1 MULTIPLEXER General Description The SY10/100E163 SY10/100E163 SY10/100E163 SY10/100E163 offer two 8:1 multiplexers designed for use in new, high-performance ECL systems. The E163 has differential outputs and common select inputs. The select inputs (SEL0, SEL1, SEL2) determine which one of the eight data inputs (A0Â-A7, B0Â-B7) is propagated to
www.datasheetarchive.com/files/micrel/products/products/sy10-100e163.html
Micrel 26/06/2002 5.73 Kb HTML sy10-100e163.html
.5V / 3.3V ECL Dual Differential 2:1 Multiplexer NB100LVEP56M NB100LVEP56M NB100LVEP56M NB100LVEP56M 2.5V / 3.3V ECL Dual Differential 2:1 Multiplexer MC100EP57 MC100EP57 MC100EP57 MC100EP57 3.3V / 5V ECL 4:1 Differential Multiplexer MC100E163 MC100E163 MC100E163 MC100E163 5V ECL 2-Bit 8:1 Multiplexer MC100LVE164 MC100LVE164 MC100LVE164 MC100LVE164 3.3V ECL 16:1 Multiplexer [+] Dividers [~] Multiplexers
www.datasheetarchive.com/files/on-semiconductor/html/ds/07_multiplexers.html
On Semiconductor 27/08/2008 16.74 Kb HTML 07_multiplexers.html
SY100S863 SY100S863 SY100S863 SY100S863 8-INPUT PECL DIFFERENTIAL MUX WITH TTL SELECTS SY100S863 SY100S863 SY100S863 SY100S863 8-INPUT PECL DIFFERENTIAL MUX WITH TTL SELECTS General Description The SY100S863 SY100S863 SY100S863 SY100S863 is a PECL 8:1 multiplexer designed for use in new, high-performance PECL systems. It has differential PECL outputs and a standard TTL output. The TTL select inputs (SEL0, SEL1, SEL2) determine which one of the eight differential PECL data inputs (D0Â-D7) is propagated to
www.datasheetarchive.com/files/micrel/products/products/sy100s863.html
Micrel 26/06/2002 6.32 Kb HTML sy100s863.html
utilizes eight independent 8:1 multiplexers to allow each output to be independently connected to any input
www.datasheetarchive.com/files/national/pf/clc018.html
National 17/02/2005 13.53 Kb HTML clc018.html
exceeding 1.4 Gbps per channel. Its non-blocking architecture utilizes eight independent 8:1 multiplexers to
www.datasheetarchive.com/files/national/htm/nsc05075.htm
National 18/12/1998 11.44 Kb HTM nsc05075.htm
. Its non-blocking architecture utilizes eight independent 8:1 multiplexers to allow each output to be
www.datasheetarchive.com/files/national/htm/nsc02672-v3.htm
National 16/08/2002 19.19 Kb HTM nsc02672-v3.htm
independent 8:1 multiplexers to allow each output to be independently connected to any input and any input to
www.datasheetarchive.com/files/national/htm/nsc01524.htm
National 01/11/2002 20.77 Kb HTM nsc01524.htm
-blocking architecture utilizes eight independent 8:1 multiplexers to allow each output to be independently connected to
www.datasheetarchive.com/files/national/htm/nsc02351-v4.htm
National 16/09/1998 9.95 Kb HTM nsc02351-v4.htm
non-blocking architecture utilizes eight independent 8:1 multiplexers to allow each output to be
www.datasheetarchive.com/files/national/htm/nsc02013-v6.htm
National 13/08/1999 14.1 Kb HTM nsc02013-v6.htm
eight independent 8:1 multiplexers to allow each output to be independently connected to any input and
www.datasheetarchive.com/files/national/htm/nsc03451.htm
National 28/06/2001 19.92 Kb HTM nsc03451.htm