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80C196 instruction set

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80C196 instruction set

Abstract: intel 80c196 INSTRUCTION SET . BYTES/FUNCTION 80C196 Table 3. 80C196 instruction set execution times and bytes/function , >, < or =. For 68000, and 80C196 instruction set LT, EQ and GT are included in the cc after CMP. CAN , the compared core instruction set on a scale where XA=1.0. Also appended is the performance , 1.0 Table 1. XA instruction set execution times and bytes/function XA FUNCTION OC* EXEC , /FUNCTION 8051 Table 4. 8051 instruction set execution times and bytes/function ÁÁÁÁÁÁÁÁ Á Á Á
Philips Semiconductors
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80C51 80C196 instruction set intel 80c196 INSTRUCTION SET intel 80C196 users manual 80C196 assembly language 80C196 users manual 80C196 manual AN703

intel 80c196 INSTRUCTION SET

Abstract: 80C196 instruction set . BYTES/FUNCTION 80C196 Table 3. 80C196 instruction set execution times and bytes/function , >, < or =. For 68000, and 80C196 instruction set LT, EQ and GT are included in the cc after CMP. CAN , evaluation. It pictures the relative performance of the compared core instruction set on a scale where XA , instruction set execution times and bytes/function XA FUNCTION OC* EXEC. TIME /FUNCT.(µs , /FUNCTION 8051 Table 4. 8051 instruction set execution times and bytes/function ÁÁÁÁÁÁÁÁ Á Á Á
Philips Semiconductors
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difference between 8051 microcontroller and 80196 intel 80196 assembly language 80c196 instruction 80c196 operand 80196 instruction set SC68000 80C552 SU00600A SU00601 SU00602

intel 80c196 INSTRUCTION SET

Abstract: 80C196 instruction set . BYTES/FUNCTION 80C196 Table 3. 80C196 instruction set execution times and bytes/function , >, < or =. For 68000, and 80C196 instruction set LT, EQ and GT are included in the cc after CMP. CAN , evaluation. It pictures the relative performance of the compared core instruction set on a scale where XA , 1.0 Table 1. XA instruction set execution times and bytes/function XA FUNCTION OC* EXEC , *TIME/FUNCT. BYTES/FUNCTION 8051 Table 4. 8051 instruction set execution times and bytes
Philips Semiconductors
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motorola 68000 architecture intel 80c196 microcontroller intel 68000 INSTRUCTION SET 80196 ld clr instruction set -benchmark 16 bit 80196 8051 microcontroller Assembly language program

80C196 instruction set

Abstract: 80C196 assembly language BRANCH 10 FUNCTION 375 80C196 Table 3. 80C196 instruction set execution times and bytes , >, < or =. For 68000, and 80C196 instruction set LT, EQ and GT are included in the cc after CMP. CAN , the relative performance of the compared core instruction set on a scale where XA=1.0. Also appended , cores involved then should be used. 0.068 0.26 0.37 1.0 Table 1. XA instruction set , Table 4. 8051 instruction set execution times and bytes/function ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Philips Semiconductors
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80C196 assembly language PROGRAM intel 8051 microprocessor 80196 ld clr instruction set philips 8051 microcontroller datasheet PCB83C552 motorola 68000

intel 80c196 INSTRUCTION SET

Abstract: instruction set and programming of 8096 AB-32 APPLICATION BRIEF Upgrade Path from 8096-90 to 8096BH to 80C196 April 1989 Order , TO 80C196 CONTENTS PAGE 80C196 OVERVIEW 2 DESIGN GUIDELINES 2 AB , aggressive when it comes to instruction fetches in order to minimize the execution speed degra- dation of using an 8-bit bus As a result instruction fetches over a 16-bit bus sometimes occur when there is no space in the prefetch queue to store the fetched opcodes This requires another instruction fetch from
Intel
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instruction set and programming of 8096 8096 intel 8096 instruction set 80c196 application note Microcomputer 8096 8x9x 8X9X-90

temperature controller using 8096

Abstract: 80C196 instruction set with the 8X9XBH and 8X9XJF. The 8XC196KB maintains the same architecture, instruction set, and , Converting From the NMOS MCS 96 Family Members to the CHMOS 8XC196KB The 80C196 is the replacement , : The 8X9XBH bus controller was made more aggressive when it comes to instruction fetches in order to minimize the execution speed degradation of using an 8-bit bus. As a result, instruction fetches over a 16 , requires another instruction fetch from the same address when space in the prefetch queue opens up. To
Intel
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temperature controller using 8096 temperature control of 8096 intel 80c196 kb INSTRUCTION SET mcs-96 software 8X9XBH mcs 96 programming 8X9X90

intel 80c196 INSTRUCTION SET

Abstract: 196NU . Key features of the instruction set to perform signal processing functions are described. Fast I/O , powerful instruction set with the MAC and LD/ST instructions capable of autoincrement and the use of , instruction set features for optimum response based on code density and speed of code execution of the FIR , a causal discrete time system using a new generation of Intel 80C196 embedded controllers with digital signal processing capabilities. The 80C196, in addition to its register to register architecture
Intel
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196NU 80C196NP z-transform applications low pass FIR filter realization fir filter design code fir filter 0FF2080H

IN4148 5T

Abstract: 80C196 instruction set . The center point of the transfer function (the bias voltage) can be set for all input and output , ground. In addition, the input span (the swing around the bias voltage) can be set for the input channels. The output span for all three channels is set by the on-chip reference. The AD7774 operates from +5 V , set by applying ground referenced control voltages. 3. The AD7774 interface timing is compatible with , conversion when AD0-AD2 are set to appropriate values (see ADC Control Register section). 18 RD Read Input
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OCR Scan
IN4148 5T IN4148 TMS320C10 ADG527A ADGS27A AD712 AD7774KN AD7774KP P-28A
Abstract: the transfer function (the bias voltage) can be set for all input and output channels. This makes the , , the input span (the swing around the bias voltage) can be set for the input channels. The output span for all three channels is set by the on-chip reference. GENERAL DESCRIPTION The AD7774 is a , be set by applying ground referenced control voltages. The part contains four input channels , operations. The rising edge of W R also starts conversion when AD0-AD2 are set to appropriate values (see -
OCR Scan

80C196 instruction set

Abstract: S2AA2 instruction < IN A,ADC > where ADC is the address of the relevant ADC Latch. AD7774â'"80C196 Interface Figure , sequentially converted. The center point of the transfer function (the bias voltage) can be set for all input , other than analog ground. In addition, the input span (the swing around the bias voltage) can be set for the input channels. The output span for all three channels is set by the on-chip reference. The AD7774 , of the DACs can be set by applying ground referenced control voltages. 3. The AD7774 interface timing
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OCR Scan
S2AA2

AD7774KN

Abstract: AD7774KP are sequentially converted. The center point of the transfer function (the bias voltage) can be set , voltage) can be set for the input channels. The output span for all three channels is set by the on-chip , ADC and the midpoint output voltage of the DACs can be set by applying ground referenced control , -bit data bus m two write operations. The rising edge of WR also starts conversion when AD0-AD2 are set to , control voltage to the VBIAS input of the AD7774. The voltage span of the input channels is set by
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OCR Scan
AD7174

2u48 diode

Abstract: AD7774 . The center point of the transfer function (the bias voltage) can be set for all input and output , ground. In addition, the input span (the swing around the bias voltage) can be set for the input channels. The output span for all three channels is set by the on-chip reference. The AD7774 operates from +5 V , set by applying ground referenced control voltages. 3. The AD7774 interface timing is compatible with , AD0-AD2 are set to appropriate values (see ADC Control Register section). Read Input. Active low logic
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OCR Scan
2u48 diode rele nais cs1065 TS1075 6bhc11 lc 76 adg

radar match filter design

Abstract: intel C196 MCS 96: Digital Filter Techniques Using the 80C196 ABSTRACT This TechBit describes how to , coefficient A2 80C196 Filter Software All numbers associated with the digital filter will be signed , sample rate of 20 KHz, the bandpass response is 8-8.2 KHz. Thus a standardized set of filters can be , that a constant input and output sample time is maintained. Optimizing 80C196 Code for Speed One can , , since one three-operand ADD instruction is faster than two two-operand Add instructions, it would speed
Intel
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80C196KC radar match filter design intel C196 DSP16A Park transformation 80C196KC instruction set C196KC MCS96

80C196 assembly language

Abstract: intel 8096 assembly language for its 8096 and 80C196 Family of Microcontrollers with a complete set of development languages and , ^S, 3-operand instruction s. Fast instruction execution for dem anding real-tim e control
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intel 8096 assembly language intel+80c196+emulator 80C196kr instruction set 80c196kr 80C196KR 80C196JR 80C196KQ 80C196JQ 8XC196KR 83C196KR

80c196kc16

Abstract: TMS320C10 fft has been set low or high: If CR9 is set low, then the BUSY/INT output will behave as a BUSY signal , sampling has been selected, BUSY will stay low for the duration of both conversions. If CR9 is set high , magnitude of the input signal swing is equal to VBIAS/2 (or REFIN/2) and is set internally. With a REFIN of , -2105, the TMS320 family and microcontrollers such as the 80C196 family. Figure 7 shows the AD7776/AD7777 , state is required with the 16 MHz machine. The 80C196 is configured to operate with a 16-bit multiplexed
Analog Devices
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80c196kc16 TMS320C10 fft 80c196kb12 80C196 mnemonic 80C196KB-12 AD7776 AD7777 AD7778 AD7776/AD7777/AD7778 10-BIT MIL-M-38510
Abstract: operation depending on whether location CR9 of the control register has been set low or high: If CR9 is set , duration of both conversions. If CR9 is set high, BUSY/INT output behaves as an INTERRUPT signal. The INT , REFOUT. The magnitude of the input signal swing is equal to VBIAS/2 (or REFIN/2) and is set internally , 80C196 is configured to operate with a 16-bit multiplexed address/data bus. Microprocessor , as the ADSP-2101, ADSP-2105, the TMS320 family and microcontrollers such as the 80C196 family -
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AD7777/AD7778 MS-022-AB

80C196KB1

Abstract: AD7776AR output has two modes of operation depending on whether location CR9 of the control register has been set low or high: If CR9 is set low, the BUSY/INT output behaves as a BUSY signal. The BUSY signal goes , selected, BUSY stays low for the duration of both conversions. If CR9 is set high, BUSY/INT output , (or REFIN/2) and is set internally. With a REFIN of 2 V, the analog input signal level varies from 1 , required with the 16 MHz machine. The 80C196 is configured to operate with a 16-bit multiplexed address
Analog Devices
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80C196KB1 AD7776AR AD7777AN AD7777AR AD7778AS RW-24 10/02--D
Abstract: output has two modes of operation depending on whether location CR9 of the control register has been set low or high: If CR9 is set low, then the BUSY/INT output will behave as a BUSY signal. The BUSY , been selected, BUSY will stay low for the duration of both conversions. If CR9 is set high, then the , /2) and is set internally. W ith a R E FIN of 2 V, the ana­ log input signal level varies from l V , 80C196KC @ 16 M Hz. One wait state is required with the 16 M Hz machine. T he 80C196 is configured to -
OCR Scan
M1L-M-38510

80c196kb12

Abstract: 80C196KC operation depending on whether location CR9 of the control register has been set low or high: If CR9 is set , low for the duration of both conversions. If CR9 is set high, then the BUSY/INT output behaves as an , to VBIAS/2 (or REFIN/2) and is set internally. With a REFIN of 2 V, the analog input signal level , . One wait state is required with the 16 MHz machine. The 80C196 is configured to operate with a 16 , microcontrollers such as the 80C196 family. Table I gives a truth table for the AD7776/AD7777/AD7778 and
Analog Devices
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80C196KC Users Guide v32 soic C1762

80C196KC

Abstract: 80C196KC Users Guide operation depending on whether location CR9 of the control register has been set low or high: If CR9 is set , low for the duration of both conversions. If CR9 is set high, then the BUSY/INT output behaves as an , to VBIAS/2 (or REFIN/2) and is set internally. With a REFIN of 2 V, the analog input signal level , . One wait state is required with the 16 MHz machine. The 80C196 is configured to operate with a 16 , microcontrollers such as the 80C196 family. Table I gives a truth table for the AD7776/AD7777/AD7778 and
Analog Devices
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