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SN74166J Texas Instruments TTL/H/L SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, CDIP16 visit Texas Instruments
SN74166J-00 Texas Instruments TTL/H/L SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, CDIP16 visit Texas Instruments
SN74166N-10 Texas Instruments TTL/H/L SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP16 visit Texas Instruments
SN74166N-00 Texas Instruments TTL/H/L SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP16 visit Texas Instruments
CS5361-DZZR Cirrus Logic Converters - Analog to Digital (ADC) IC 24Bit 114dB 192kHz Multi-Bit ADC visit Digikey

8+bit+74166

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Abstract: Signetics 74166 Shift Register 8-Bit Serial/Parallel-ln, Serial-Out Shift Register Product , asynchronous parallel data load DESCRIPTION The ' 166 is an 8-bit shift register that has fully synchronous , . When PE is HIGH, data is entered into internal bit position Q0 from Serial Data Input (Ds), and the , Ds input of the suc ceeding stage. TYPE 74166 TYPICAL (« A X 35MHz TYPICAL SUPPLY CURRENT , other inputs and clears the register asynchronously, forcing all bit positions to a LOW state. PIN -
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ttl 74166 8 bit 74166 74166 74166 applications 74166 pin diagram TPNT N74166N N74166D 1N916 1N3064
Abstract: Signetics 74166 Shift Register Logic Products 8-Bit Serial/Parallel-ln, Serial-Out Shift , ) 74166 35MHz 90mA ORDERING CODE PACKAGES COMMERCIAL RANGE Vcc = SV±5%; TA = 0°C to +70°C Plastic DIP N74166N Plastic SO N74166D DESCRIPTION The '166 is an 8-bit shift register that has fully , register. When PE is HIGH, data is entered into internal bit position Q0 from Serial Data Input (Ds), and , other inputs and clears the register asynchronously, forcing all bit positions to a LOW state. PIN -
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DE07 74LS
Abstract: Signetics Logic Products 74166 Shift Register 8-Bit Serial/Parallel-ln, Serial-Out Shift , Reset â'¢ See '165 for asynchronous parallel data load DESCRIPTION The ' 166 is an 8-bit shift , is entered into the register. When PE is HIGH, data Is entered into internal bit position Q0 from , SUPPLY CURRENT (TOTAL) 74166 35MHz 90mA ORDERING CODE PACKAGES COMMERCIAL RANGE VCC = 5V±5%! Ta = 0 , (MR) input overrides all other inputs and clears the register asynchronously, forcing all bit -
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MR 306 127
Abstract: Signetics 74166 Shift Register 8-Bit Serial/Parallel-ln, Serial-Out Shift Register Product , '165 for asynchronous parallel data load NOTE: TYPE 74166 TYPICAL Im a x 35MHz TYPICAL SUPPLY , = 0°C to +70°C N74166N N74166D DESCRIPTION T h e ' 166 is an 8 -bit shift register that has , entered into the register. W hen PE is H IG H , data is entered into internal bit position Qo from Serial , clears the register asynchronously, forcing all bit positions to a LO W state. PIN CONFIGURATION -
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IC 74166 of ic 74166 74166 shift register IC
Abstract: SN54166, SN54LS166A, SN74166, SN74LS166A PARALLEL LOAD 8-BIT SHIFT REGISTERS O C T O B E R 197 6 R , Conversion TYPE '1 6 6 'L S 1 6 6 A SN54166. SN 54LS166A . . J OR W PACKAGE SN 74166 . . . N , '1 6 6 a n d 'L S 1 6 6 A 8-bit shift registers are com pati ble w ith m o st other T T L logic , _1 1 _1 1 _1 \ 1 3 2 1 20 19 \ SN54166, SN54LS166A. SN74166, SN74LS166A PARALLEL LOAD 8 BIT SHIFT , , SN54LS166A, SN74166, SN74LS166A PARALLEL LOAD 8-BIT SHIFT REGISTERS schematics of inputs and outputs E -
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74LS166A
Abstract: data sheet of the same number for guaranteed specification limits. Document Number: 74166 S , , not subject to production testing. www.vishay.com 2 Document Number: 74166 S-60411Rev. A, 20 , OTHERWISE NOTED) N-Channel MOSFET Document Number: 74166 S-60411Rev. A, 20-Mar-06 www.vishay.com 3 , : 74166 S-60411Rev. A, 20-Mar-06 Vishay Siliconix Vishay Siliconix
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Si5509DC 5509DC S-60411R
Abstract: 74166 PARALLEL PARALLEL INPUTS SMtFV INPUT OUTPUT m * » Vcc 10 AO M Qm G F t CLEAR jwlnruMinnSM \LiiiiijAtJiiii±fiin±r PARALLEL INPUTS A. tl m if Clear Shift/Load CK CK Inhibit H H L t_T L > V h H L D - K H H X H â t. â'" 'L- K' "U- L X X X ? 'I ? * CK = LOTMBSKCK Inhibits- H il+4 t f-ti'lbit->7 I- LT.t.-rt- KSftS C K = HWJWl&ijIi-f «i K ! 74165«7,')-b'y hiCKlBjXSC: fi, S fci; 7 ') TiWSJni*: ? -f"/ -133- 8-Bit Shift Register i i«a AA IN iKi] OUT N LS ALS ALSK F -
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74165a
Abstract: /74161 4-Bit Finary Counter, Async. Clear 32 MHz 305 X X 54/74162 BCD Decade Counter, Sync. Clear 32 MHz 305 X X 54/74163 4-Bit Binary Counter, Sync. Clear 32 MHz 305 X X 54/74164 8-Bit Parallel-Out Serial Shift Register (S.I.P.O.) 36 MHz 167 X X 54/74165 Parallel-Load 8-Bit Shift Register (P.I.S.O.) 26 MHz 210 X X 54/74166 8-Bit Shift Register with Clear (P.I.S.0.) 35 MHz 360 X X 54 , /7483 4-Bit Binary Full Adder 13 300 X X 54/74123 Dual Retriggerable Monostable Multivibrator 21 -
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7483 4 bit binary full adder 74151 demultiplexer 74153 full adder 74198 shift register 7483 4 bit binary adder 7483 8 bit binary adder 54/74J75
Abstract: data sheet of the same number for guaranteed specification limits. Document Number: 74166 S , , not subject to production testing. www.vishay.com 2 Document Number: 74166 S-60411Rev. A, 20 , OTHERWISE NOTED) N-Channel MOSFET Document Number: 74166 S-60411Rev. A, 20-Mar-06 www.vishay.com 3 , : 74166 S-60411Rev. A, 20-Mar-06 Legal Disclaimer Notice Vishay Disclaimer All product Vishay Siliconix
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10VID
Abstract: 166 £>(D7^Y 54/74166 8-BIT SHIFT REGISTER D E SC R IPTIO N - The '166 is an 8-bit, serial- or parallel-in, serial-out shift register using edge triggered D-type flip-flops. Serial and parallel entry are synchronous, w ith state changes initiated by the rising edge of the clock. An asynchronous Master Reset overrides other inputs and clears all flipflops. The circu it can be clocked from tw o , Serial Data (Ds) input to Qo and all data in the register is shifted one bit position (i.e., Qo-»-Qi, Q 1 -
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74166PC 74166DC 74166FC 54166DM 54166FM
Abstract: /Seriahout 54/74166 8 D 8S s 35 20 360 D176 4L,7B,9B 6 Parallel-in/Serial-out 54LS/74LS165 8 D 8A s 40 19 , ) Data to Q Delay ns (Typ) Power Dissipation I mW (Typ) Logic/Connection Diagram Package(s) 1 4-Bit D Latch 54LS/74LS375 4xD â'" 2(H) 20 10 10 32 D190 4L,6B,9B 2 4-Bit D Flip-Flop 54/74175 4xD L KJ-) 20 20 â'" 150 D150 4L,6B,9B 3 4-Bit D Flip-Flop 54LS/74LS175 4xD L K-T) 20 21 â'" 55 D150 4L,6B,9B 4 4-Bit D Flip-Flop 54S/74S175 4xD L 1U~) 7.0 10 â'" 300 D150 4L,6B,9B 5 4-Bit D Flip-Flop 54/74298 4x2 â -
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74153 mux MUX 74157 74157 mux 74174 shift register 74LS152 CI 74151 54LS/74LS170 54LS/74LS670 93L09 54LS/74LS298 93L22 54S/74S157
Abstract: E Do Di D2 D3 4 BIT LATCH 1 MR Qo Ql 02 03 TT E Do Di D2 D3 4 BIT LATCH 2 MR Oo Ql O2 03 TT 1 7 , /Serial-out 54/74165 8 D 8A s 26 19 210 D175 4L,7B,9B 5 Parallel-in/Seriahout 54/74166 8 D 8S s 35 20 360 , Dissipation I mW (Typ) Logic/Connection Diagram Package(s) 1 4-Bit D Latch 54LS/74LS375 4xD â'" 2(H) 20 10 10 32 D190 4L,6B,9B 2 4-Bit D Flip-Flop 54/74175 4xD L KJ-) 20 20 â'" 150 D150 4L,6B,9B 3 4-Bit D Flip-Flop 54LS/74LS175 4xD L K-T) 20 21 â'" 55 D150 4L,6B,9B 4 4-Bit D Flip-Flop 54S/74S175 4xD L 1U~) 7.0 -
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7475 D flip-flop quad D flip-flop 74175 pin 4 bit shift register 7494 pin diagram latch 74ls574 7477 D latch 9374 93L14 54LS/74LS279 54LS/74LS75 93L08 54LS/74LS77 54S/74S174
Abstract: 166 ^54/74166 8-BIT SHIFT REGISTER DESCRIPTIONâ'"The '166 is an 8-bit, serial- or parallel-in, serial-out shift register using edge triggered D-type flip-flops. Serial and parallel entry are synchronous, with state changes initiated by the rising edge of the clock. An asynchronous Master Reset overrides other inputs and clears all flipflops. The circuit can be clocked from two sources or one CP input can , in the register is shifted one bit position (i.e., Qo-»Qi, Q1 Q2, etc.) on the rising edge of the -
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Abstract: Vcc = Pin 24 GND = Pin 12 Vcc = Pin 14 GND = Pin 7 D175 54/74165, 54LS/74LS165 D176 54/74166 125 , Parallel-in/Serial-out 54/74165 8 D 8A s 26 19 210 D175 4L,7B,9B 5 Parallel-in/Seriahout 54/74166 8 D 8S s 35 -
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74164 14 PIN DIAGRAM 74LS165 74198 ttl 74165 D172 D171 54LS/74LS295 54LS/74LS295A 54S/74S194 54LS/74LS194 54LS/74LS164 54LS/74LS399
Abstract: 74151 74152 74153 74154 74155 74156 74157 74158 74159 74160 74161 74162 74163 74164 74165 74166 74168 , 414000 (DRAM 1-bit) 44 Serial 4464 44256 441000 (DRAM 4-bit) - -
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ic 74138 IC 7402, 7404, 7408, 7432, 7400 ic 74139 IC 74147 IC 74373 74148 IC 89/336/EEC EN50081-1 EN50082-1 EN55022 IEC801-2 EN60555-2
Abstract: 19 210 D175 4L,7B,9B 5 Parallel-in/Seriahout 54/74166 8 D 8S s 35 20 360 D176 4L,7B,9B 6 -
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74LS574 K D S 4L ttl 74LS173 74ls399 74170 D176 D178 54LS/74LS95B 54LS/74LS195 93L28 93L38 54LS/74LS173
Abstract: system described below is as follows: 1. The AD1847 is to be interfaced to a 16-bit parallel bus. 2 , from reading the specs on the AD1847 interface, the bulk of the system is composed of six 16-bit shift , Serial-ln-Parallel-Out registers). An additional 16-bit register contains outgoing control information (to be sent to the , design, the shift registers only need to receive (SIPOs) or transmit (PISOs) the first three 16-bit words , Figure 8 shows, a flip-flop (CNTEN) is set when SDFS goes high, which in turn enables a 6-bit counter -
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AN-387 pins and their function in ic 74163 epm7160lc84 AN214 IC IC 74273 H222 ic 74163 16- bit up counter ISBN-0-916550-08-7 AN-214 AN-280 AN-282 AN-345
Abstract: /Seriahout 54/74166 8 D 8S s 35 20 360 D176 4L,7B,9B 6 Parallel-in/Serial-out 54LS/74LS165 8 D 8A s 40 19 -
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74187 ttl 74173 X1825 D188 74LS502 ttl 7497 54LS/74LS390 54LS/74LS393 54LS/74LS395 54LS/74LS502
Abstract: 74138 74139 Logic Function BCD-to-Decimal Decoder 4-Bit Magnitude Comparator 8-Bit Shift Register Divide-by-twelve Counter 4-Bit Binary Counter 4-Bit Shift Register 4-Bit Shift Register 3-Line to 8-Line Decoder , 74166 74169 74175 74181 74182 74190 Logic Function Quadruple 2-line to 1-line Data Selector/Multiplexer Quadruple 2-line to 1-line Data Selector/Multiplexer Synchronous Decade Counter Synchronous 4-Bit Binary Counter Synchronous Decade Counter Synchronous 4-Bit Binary Counter 8-Bit Parallel-Out Serial Shift -
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74169 SYNCHRONOUS 4-BIT BINARY COUNTER 74139 demultiplexer 3-8 decoder 74138 pin diagram 3-8 decoder 74138 pin diagram 41 multiplexer 74153 JK Shift Register 74195 MSM60300 MSM60700 MSM61000
Abstract: Parallel-in/Seriahout 54/74166 8 D 8S s 35 20 360 D176 4L,7B,9B 6 Parallel-in/Serial-out 54LS/74LS165 8 D 8A -
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74LS266 74ls50 74LS568 74173 D154 ttl 7491 54LS/74LS379 54LS/74LS386 54LS/74LS398 54LS/74LS574 54LS/74LSS02
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