74VHC139 74VHC139M 74VHC139MTR 74VHC139TTR SO-16 PO13H TSSOP16 0080338D

DUAL 2 TO 4 DECODER/DEMULTIPLEXER s s s s s s s s s HIGH SPEED: tPD = 5.0 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4

74VHC139 74VHC139 DUAL 2 TO 4 DECODER/DEMULTIPLEXER s s s s s s s s s HIGH SPEED: tPD = 5.0 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 139 IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74VHC139 74VHC139 is an advanced high-speed CMOS DUAL 2 TO 4 LINE DECODER/ DEMULTIPLEXER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The active low enable input can be used for gating or as a data input for demultiplexing applications. While the enable input is held high, all four outputs are high independently of the other inputs. SOP TSSOP ORDER CODES PACKAGE TUBE T&R SOP TSSOP 74VHC139M 74VHC139M 74VHC139MTR 74VHC139MTR 74VHC139TTR 74VHC139TTR Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS June 2001 1/9 74VHC139 74VHC139 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 1, 15 2, 3 4, 5, 6, 7 12, 11, 10, 9 14, 13 8 16 1G, 2G 1A, 1B 1Y0 to 1Y3 2Y0 to 2Y3 2A, 2B GND VCC NAME AND FUNCTION Enable Inputs Address Inputs Outputs Outputs Address Inputs Ground (0V) Positive Supply Voltage TRUTH TABLE INPUTS OUTPUTS ENABLE SELECT G B A Y0 Y1 Y2 Y3 H L L L L X L L H H X L H L H H L H H H H H L H H H H H L H H H H H L X : Don't care LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays 2/9 74VHC139 74VHC139 ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Value Unit Supply Voltage -0.5 to +7.0 V VI DC Input Voltage -0.5 to +7.0 V VO DC Output Voltage -0.5 to VCC + 0.5 V IIK DC Input Diode Current - 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ± 75 mA ICC or IGND DC VCC or Ground Current Tstg Storage Temperature TL Lead Temperature (10 sec) -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Value Unit Supply Voltage 2 to 5.5 V VI Input Voltage 0 to 5.5 V VO Output Voltage 0 to VCC V Top Operating Temperature -55 to 125 °C 0 to 100 0 to 20 ns/V dt/dv Input Rise and Fall Time (note 1) (VCC = 3.3 ± 0.3V) (VCC = 5.0 ± 0.5V) 1) VIN from 30% to 70% of V CC 3/9 74VHC139 74VHC139 DC SPECIFICATIONS Test Condition Symbol VIH VIL Parameter High Level Input Voltage Low Level Input Voltage Value TA = 25°C VCC (V) Min. 2.0 3.0 to 5.5 2.0 3.0 to 5.5 Typ. -40 to 85°C Max. -55 to 125°C Min. Min. Max. 1.5 1.5 0.7VCC Max. 1.5 0.7VCC Unit 0.7VCC V 0.5 0.5 0.5 0.3VCC 0.3VCC 0.3VCC V ICC 1.9 3.0 2.9 2.9 IO=-50 µA 4.4 4.5 IO=-4 mA 2.58 IO=-8 mA 3.94 2.0 IO=50 µA 0.0 0.1 0.1 0.1 3.0 IO=50 µA 0.0 0.1 0.1 0.1 IO=50 µA 0.0 0.1 0.1 0.1 IO=4 mA 0.36 0.44 0.55 4.5 Input Leakage Current Quiescent Supply Current 1.9 2.9 3.0 II 2.0 IO=-50 µA 4.5 Low Level Output Voltage 1.9 3.0 4.5 VOL IO=-50 µA 3.0 High Level Output Voltage 2.0 4.5 VOH IO=8 mA 0.36 0.44 0.55 0 to 5.5 VI = 5.5V or GND ± 0.1 ±1 ±1 µA 5.5 VI = VCC or GND 4 40 40 µA 4.4 V 4.4 2.48 2.4 3.8 3.7 V AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns) Test Condition Symbol Parameter VCC (V) CL (pF) tPLH tPHL Propagation Delay Time A, B to Y 3.3(*) 15 (*) 50 (*) 5.0 Value TA = 25°C 4/9 Min. Max. Min. 7.2 11.0 1.0 13.0 1.0 13.0 9.7 14.5 1.0 16.5 1.0 16.5 15 5.0 7.2 1.0 8.5 1.0 8.5 50 6.5 9.2 1.0 10.5 1.0 10.5 3.3(*) 15 6.4 9.2 1.0 11.0 1.0 11.0 3.3(*) 50 8.9 12.7 1.0 14.5 1.0 14.5 15 4.4 6.3 1.0 7.5 1.0 7.5 50 5.9 8.3 1.0 9.5 1.0 9.5 Unit Max. 5.0(*) (*) Voltage range is 3.3V ± 0.3V (*) Voltage range is 5.0V ± 0.5V Max. 5.0(*) Propagation Delay Time G to Y -55 to 125°C 5.0(*) tPLH tPHL -40 to 85°C 3.3 Min. Typ. ns ns 74VHC139 74VHC139 CAPACITIVE CHARACTERISTICS Test Condition Symbol Value TA = 25°C Parameter Min. -40 to 85°C Typ. Max. 10 CIN Input Capacitance 4 CPD Power Dissipation Capacitance (note 1) -55 to 125°C Min. Min. Max. Unit Max. 26 10 10 pF pF 1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/2 (per Decoder) TEST CIRCUIT CL =15/50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50) WAVEFORM 1: PROPAGATION DELAYS FOR INVERTING OUTPUTS (f=1MHz; 50% duty cycle) 5/9 74VHC139 74VHC139 WAVEFORM 2: PROPAGATION DELAYS FOR NON-INVERTING OUTPUTS (f=1MHz; 50% duty cycle) 6/9 74VHC139 74VHC139 SO-16 SO-16 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.003 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45° (typ.) D 9.8 10 0.385 0.393 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.62 0.024 8° (max.) PO13H PO13H 7/9 74VHC139 74VHC139 TSSOP16 TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 e 0.65 BSC K 0° L 0.45 A 0.0256 BSC 8° 0.60 0° 0.75 8° 0.018 0.024 0.030 A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 0080338D 8/9 74VHC139 74VHC139 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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