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Part Manufacturer Description Datasheet BUY
SN7476J Texas Instruments IC TTL/H/L SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16, FF/Latch visit Texas Instruments
ADCS7476AIMFX/NOPB Texas Instruments 1MSPS, 12-/10-/8-Bit A/D Converters in SOT-23 & LLP 6-SOT-23 -40 to 125 visit Texas Instruments Buy
ADCS7476AIMF/NOPB Texas Instruments 1MSPS, 12-/10-/8-Bit A/D Converters in SOT-23 & LLP 6-SOT-23 -40 to 125 visit Texas Instruments Buy
ADCS7476AIMFE/NOPB Texas Instruments 1MSPS, 12-/10-/8-Bit A/D Converters in SOT-23 & LLP 6-SOT-23 -40 to 125 visit Texas Instruments Buy
ADCS7476AISDX Texas Instruments 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, DSO6, LLP-6 visit Texas Instruments
ADCS7476AIMFX Texas Instruments 1MSPS, 12-/10-/8-Bit A/D Converters in SOT-23 & LLP 6-SOT-23 -40 to 125 visit Texas Instruments

7476 FUNCTION TABLE

Catalog Datasheet MFG & Type PDF Document Tags

pin diagram of 7476

Abstract: 7476 J-K Flip-Flop the outputs to the steady state levels as shown in the Function Table. TYPE 7476 74LS76 TYPICAL f HAX , Flip-Flops 7476, LS76 LOGIC DIAGRAM FUNCTION TABLE INPUTS OPERATING MODE SD Asynchronous set , Signetics 7476, LS76 Flip-Flops Dual J-K Flip-Flop Product Specification Logic Products DESCRIPTION The '76 is a dual J-K flip-flop with Individual J, K, Clock, Set and Reset inputs. The 7476 is , LOADING AND FAN-OUT TABLE PINS CP Rd> Sd J, K Q, Q NOTE: Where a 74 unit load (ul) is understood to be
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pin diagram of 7476 7476 J-K Flip-Flop PIN CONFIGURATION 7476 7476 FUNCTION TABLE 7476 PIN DIAGRAM 7476 N7476N N74LS76N 1N916 1N3064

ci 7476

Abstract: 7476 PIN DIAGRAM override the Clock and Data inputs, forcing the outputs to the steady state levels as shown in the Function Table. 7476, LS76 Flip-Flops Dual J-K Flip-Flop Product Specification TYPE TYPICAL fMAX TYPICAL SUPPLY CURRENT (TOTAL) 7476 20MHz 10mA 74LS76 45MHz 4mA ORDERING CODE PACKAGES COMMERCIAL RANGE VCC = , DIAGRAM cp ldoz800s FUNCTION TABLE OPERATING MODE INPUTS OUTPUTS So RD CRP) J K Q Q , , Clock, Set and Reset inputs. The 7476 is positive pulse-triggered. JK information is loaded into the
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ci 7476 jk flip flop 7476 pin diagram of ttl 7476 7476 PIN DIAGRAM input and output 7476 ttl LS 7476

pin diagram of 7476

Abstract: PIN CONFIGURATION 7476 the outputs to the steady state levels as shown in the Function Table. TYPE 7476 74LS76 TYPICAL f MAx , CP FUNCTION TABLE INPUTS OPERATING MODE SD Asynchronous set Asynchronous reset (Clear , Signetics 7476, LS76 Flip-Flops Dual J-K Flip-Flop Product Specification Logic Products DESCRIPTION The '76 is a dual J-K flip-flop with individual J, K, Clock, Set and Reset inputs. The 7476 is , LOADING AND FAN-OUT TABLE PINS CP Ro. So J, K Q, a DESCRIPTION Clock input Reset and Set inputs Data
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Jk 74ls76 pin out 7476 pin configuration TTL 7476 7476 signetics TTL 7476 logic diagram 7476 signetics

PIN CONFIGURATION 7476

Abstract: pin diagram of 7476 , forcing the outputs to the steady state levels as shown in the Function Table. TYPE 7476 74LS76 TYPICAL f , , LS76 LOGIC DIAGRAM S 0 - y xC " Q K - -J CP LD0280GS FUNCTION TABLE INPUTS , Sjgnetics 7476, LS76 Flip-Flops Dual J-K Flip-Flop Product Specification Logic Products DESCRIPTION The '76 is a dual J-K flip-flop with individual J, K, Clock, Set and Reset inputs. The 7476 is , AND OUTPUT LOADING AND FAN-OUT TABLE PINS CP R d. S q J, K DESCRIPTION Clock input Reset and Set
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J-K Flip-Flop 7476 TTL 74ls76 74LS76 logic diagram Flip-Flop 7476 Diagram of 7476 Pin Configuration of 7476

jk flip flop 7476

Abstract: 7476 PIN DIAGRAM Flip-Flops 7476, LS76 LOGIC DIAGRAM ld02900s FUNCTION TABLE OPERATING MODE INPUTS OUTPUTS SD Rd , TABLE chronous active LOW inputs. When LOW, they override the Clock and Data inputs, forcing the outputs to the steady state levels as shown in the Function Table. Where a 74 unit load (ul) is understood to be 40>iA l,H and -1.6mA l,L. and a 74LS unit load (LSul) is 20juA l)H and -0.4mA l|L. 7476 , , Clock, Set and Reset inputs. The 7476 is positive pulse-triggered. JK information is loaded into the
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74LS76 ttl Jk 7476 LS76 flip-flop 74ls76

IC 7476

Abstract: INTERNAL DIAGRAM OF IC 7476 Analog Inputs and 2 Analog Outputs AUTOMATIONWORX Data Sheet 7476_en_02 © PHOENIX CONTACT - 10/2007 , can be downloaded at www.download.phoenixcontact.com. A conversion table is available on the Internet , disregard of information contained in this data sheet. 7476_en_02 PHOENIX CONTACT 2 ILB BT , 7476_en_02 MODE 16 dBm 12 dBm 8 dBm 4 dBm 0 dBm DIP switches for setting the , antenna cable are available on request. 7476_en_02 PHOENIX CONTACT 4 ILB BT ADIO 2/2/16/16
Phoenix Contact
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IC 7476 INTERNAL DIAGRAM OF IC 7476 IC 7476 function applications IC 7476 circuit diagram with IC 7476 7476 IC

74573

Abstract: 74574 7476 7483 7485 7486 7490 7493 74121 2 of 12 Function Quad 2-Input NAND Gate Quad 2 , device number to see the table of devices that belong to the same group. Device 7400 7402 7403 , / 4009 / 4049 / 4069 4012 4082 4025 4068 4071 7448 / 4056 / 4511 7447 / 4056 / 4511 7476 / 4027 , Device Summary Please click on a device number to see the table of devices that belong to the same group , 4022 4023 4024 4025 4026 4027 4028 4029 4030 4033 4035 4 of 12 Function Quad 2
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74573 74574 7486 XOR GATE 7486 full adder latch 74574 7408, 7404, 7486, 7432

F6738

Abstract: 1P2M MTTF of 747.6 years. This application note provides the details for the EM and ES product reliability , function replacements for the original Advanced Micro Devices Am186EM/Am188EM and Am186ES/Am188ES family , table provides the HTOL test results. Test Hours 168 500 1000 Wafer Lot No. F6738 F6738 F6738 , hours = 747.6 years In this calculation, the Mean Time to Failure (MTTF) is equal to the Mean Time
InnovASIC Semiconductor
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1P2M ia188es Am186ES-Am188ES InnovASIC Semiconductor IA188EM of 7476 IA186EM/IA188EM IA186ES/IA188ES 186EM/A 188EM 186ES/A 188ES

7476 truth table

Abstract: 7474 truth table SELECTOR GUIDE/FUNCTIONAL INDEX MSI MULTIPLEXERS Comple mentary O u tp ut Function Type No , 16 16 J -K J -K J -K J -K D D D D D D D D D D D D D L L X X Function Clock to O u tp ut ns , available outputs of the 93178. The truth table below indicates the three possible control states: shift , 93179 CLOCK DS SHIFT lo ^ 9 « ''S A p bq ®o Co Do T R U TH TABLE C O NTRO L STATE , 9N25, 7425 9N20, 7420 9N76, 7476 9N73, 7473 9N76, 7476 9N70, 7470 9N73, 7473 9N74, 7474 9N72, 7472 9N50
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82S62 7476 truth table 7474 truth table se 9315-1 fairchild 9322 signetics 8281 93L22 93L09 93L12 93S12 93H00 93S00

STR W 5453 A

Abstract: STR 5453 as shown in the truth table. 2. When used as a 3-bit ripple-through counter, the input count pulses , c, and Q d outputs. Independent use of flip-flop A is available if the reset function coincides with , families. PIN NAMES Ro CPA CPg Q a , Q b , 7476 7477 7480 7482 7483 7486 7490 7491 7492 7493 7494 7495 7496 74104 74105 74107 74121 74141 74145
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STR W 5453 A STR 5453 STR W 5453 STR W 5453 C Truth Table 74190 Truth Table 74192 74H00

IFR 740

Abstract: 7476 PIN DIAGRAM DS006400-1 Order Number DM74LS166WM or DM74LS166N See Package Number M16B or N16A Function Table Inputs , through a two-input NOR gate, permitting one input to be used as a clock-enable or clock-inhibit function , Characteristics" table are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Electrical Characteristics over , ) Vref VrEF â'¢setup - ov data 3.0v input (see test table) ov â  voh â â f\ vref \ 'w(clock
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DM74LS166 IFR 740 M16B N16A feature of 7476
Abstract: See NS Package Number J16A, M16B, N16E or W16A Function Table Inputs Shift/ Load Clock , -input NOR gate, per­ mitting one input to be used as a clock-inhibit function. Hold­ ing either of the , " table are n o t guaranteed a t the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. 7V Operating Free Air Temperature , RRRRRRPR 0.2914-0.2992 7.4-7.6 | _c _ | 16 f â  UltltlHtlH: 2 I \ 1 1 .050 .27 -
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DM54LS165/DM74LS165 TL/F/6399-1 DM54LS16

d313 TRANSISTOR equivalent

Abstract: 207a smd ic IEC Pub. 747-3 Pub. 747-6 IEC Pub. 747-8 RELIABILITY TESTING OF SEMICONDUCTOR DEVICES Table , conditions, and (3) the decision making b ased on test results must be considered. Table V-1 shows the , materials. Table V-1 Procedure for Establishing Reliability of Newly Developed Devices Subject , variations in the device characteristics before and after the test is in a allowable range. Table V-6 shows , . RELIABILITY TESTING OF SEMICONDUCTOR DEVICES Table V-2 Test Categories and Conditions for Environmental Tests
Mitsubishi
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d313 TRANSISTOR equivalent 207a smd ic smd diode 106E mil-std-202F 101D 6822 TRANSISTOR equivalent transistor d323 R69-20

7476 Connection diagram

Abstract: 6399-2 See NS Package Number J16A, M16B, N16E or W16A Function Table Inputs Internai Outputs Output Qh , a 2-input NOR gate, permitting one input to be used as a clock-inhibit function. Holding either of , Characteristics" table are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Symbol Parameter DM54LS165 DM74LS165 , ifc " ]/â'"iâ'"i- 0.2914-0.2992 7.4-7.6 0.3940-0. |_c_| 10.00-10 MtiHtidti: 1 2 3 4 5 6 7 8 .050
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7476 Connection diagram 6399-2 DM54LS165J DM54LS165W DM74LS165N DM74LS165WM

USB telephone voice call recorder

Abstract: ANSI S1.11-1986 Remy Zimmermann Logitech Geert Knapen Philips ITCL Interleuvenlaan 74-76 B , , 1998 iii USB Device Class Definition for Terminal Types Table of Contents Scope of This , .ii Table of Contents , .9 2.7 Embedded Function Terminal Types , Table 2-1: USB Terminal Types
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USB telephone voice call recorder ANSI S1.11-1986 future scope of fm transmitter altec lansing music recorder playback handheld terminal data input microphone B-3001

7476 J-K Flip-Flop

Abstract: J-K Flip-Flop 7476 -Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Connection Diagram Function Table , tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table , [Information as of 1-Aug-2000] PDF DM7476 Dual J-K Flip-Flop with Preset and Clear Generic P/N 7476 Contents
Fairchild Semiconductor
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7476 J-K Flip-Flop Master-Slave edge master slave J-K Flip-Flop 7476 DM7476N 0804/08032000/FAIR/08022000/DM7476 29-JUL-00 DM7476CW

ISA S20

Abstract: 54LS259 operation are selectable by controlling the clear and enable inputs as enumerated in the function table. In , > i-t-O (A Connection Diagram Function Table Vcc CLEAR Dual-ln-Line Package D Q7 Q6 Inputs Output of Each Addressed Other Function Clear E Latch Output H L D Qio Addressable Latch H H Qio Qio Memory L L D L 8-Line Demultiplexer L H L L Clear Latch Selection Table TL/F/6418-1 Order , "Electrical Characteristics" table are not guaranteed at the absolute maximum ratings. The "Recommended
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ISA S20 54LS259 74LS259 DM54LS259E DM54LS259J DM54LS259W DM54LS259/DM74LS259

54LS259

Abstract: 74LS259 operation are selectable by controlling the clear and enable Inputs as enumerated in the function table. In , Connection Diagram Function Table Dual-ln-Line Package Q7 Q6 Q5 Inputs Output ol Each Addressed Other Function Clear E Latch Output H L D Qio Addressable Latch H H Qio Qio Memory L L D L 8-Llne Demultiplexer L H L L Clear Latch Selection Table Order Number DM54LS259E, DM54LS259J, DM54LS259W, DM74LS259M , Characteristics" table are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions
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DM74LS259 DM74LS259N DM74LS259WM E20A J16A

74LS80

Abstract: 74LS198 function cell Total 151 251 402 The library is perfectly compatible with the cell library of the , pull-up INT1U1 INT2U1 INTSU1 INC1U1 INC2U1 INCSU1 INTID1 INT2DI INTSD1 INCIDI INC2D1 INCSD1 FUNCTION TTL , C E L L LIST . TTL/RICOH CELL CORRESPONDENCE TABLE TTL Name 74LS00 74LS02 74LS04 74LS10 74LS20 7425 . 74LS27 74LS30 7442 74LS43 74LS44 74LS47 74LS49 74LS51 74LS54 74LS73 7474 7476 74LS80 , Series *1: NOR04 has no strobe terminal. *2 *3 and *5: 7473. 7476. and 74LS113A are negative edge
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RSC-15 M4017C M4028C 74LS179 74LS198 74LS150 74LS94 OAI32 TTL 74LS198 0001L3M TEK-044-9004 NOR03 NAND08 D410L

LS76A

Abstract: SM7476 forcing the outputs to the steady state levels as shown in the function table. The SN5476 and the , FUNCTION TABLE INPUTS OUTPUTS PRE CLR CLK J K Q à L H X X X H L H L X X X L H L L X X X Ht H î H H L L Qo Qb H H TL H L H L H H -TL L H L H H H -TL H H TOGGLE 'ls76a function table INPUTS , Texas ^ Instruments POST OFFICE BOX 655012 â'¢ DALLAS. TEXAS 7 = 265 SN5476, SN54LS76A, SA!7476
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SN7476 LS76A SN74LS76A SM7476 SN74LS76 7476 texas instruments SDLS121 SAI74LS76A
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