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ACE184RUW12XZ01A GE Critical Power ACE184 Series Power Shelf, Main Output: 600A; Standby output: 8A visit GE Critical Power
SLP0712TEXR5Z01A GE Critical Power SLP0712TE Series Power Supply, 90 - 264Vac input; 12Vdc output; 750W Output Power, 3.3 Vdc or 5.0Vdc/2A Auxiliary Output visit GE Critical Power
SLP0712TEXR3Z01A GE Critical Power SLP0712TE Series Power Supply, 90 - 264Vac input; 12Vdc output; 750W Output Power, 3.3 Vdc or 5.0Vdc/2A Auxiliary Output visit GE Critical Power
SLP0712TEXX3Z01A GE Critical Power SLP0712TE Series Power Supply, 90 - 264Vac input; 12Vdc output; 750W Output Power, 3.3 Vdc or 5.0Vdc/2A Auxiliary Output visit GE Critical Power
SLP0712TEXX5Z01A GE Critical Power SLP0712TE Series Power Supply, 90 - 264Vac input; 12Vdc output; 750W Output Power, 3.3 Vdc or 5.0Vdc/2A Auxiliary Output visit GE Critical Power
848748987 GE Critical Power CABLE PAIR DC OUTPUT 10FT 2AWG visit GE Critical Power

74373 output port

Catalog Datasheet MFG & Type PDF Document Tags

IC 74373

Abstract: function of latch ic 74373 (74373) Output to Internal Bus Bus Transceiver(74245) Output to Bus Port Input to Internal Bus , 74373 or 74377, CM O S or TTL) and two byte-wide output latches (similar to 74373). (Hereafter, the , elements consist of two input buffer registers, two output latches, and a bus port transceiver. Control , ) of the output latch, and port Output Enable (OE) of the bus port transceiver. User-defined logic , strobe for the input registers, output latches and bus transceiver port. In addition, Pins 14 and 7
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latch 74373

Abstract: 74373 truth table registers (similar to 74373 or 74377, CMOS or TTL) and two byte-wide output latches (similar to 74373). , registers, 2 output latches and a bus port transceiver. All byte-wide elements communicate via the internal , consist of two input buffer registers, two output latches, and a bus port transceiver. Control signals for , input register, Output Latch Enable (OLE) and Read Enable (RE) of the output latch, and port Output , transceiver port. In addition, Pins 14 and 7 (CLK1 and CLK2) may act as fast clocks for the output latches
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EP1200

Abstract: output latches (similar to 74373). (Hereafter, the input functions will sim ply be referred to as input , registers, two output latches, and a bus port transceiver. Control signals for each byte-wide element are , ) of the output latch, and port O utput Enable (OE) of the bus port transceiver. User-defined logic , strobe for the input registers, output latches and bus transceiver port. In addition, Pins 14 and 7 , Internal Bus RINP8 A RBUSLA LINP8 LBUSI LBUSO BUSX 8-Bit O utput Latch(74373) Output to
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74245 BUFFER IC

Abstract: pin diagram of 74245 BUFFER IC output latches (similar to 74373). (Hereafter, the input functions will simply be referred to as input , registers, 2 output latches and a bus port transceiver. All byte-wide elements communicate via the internal , consist of two input buffer registers, two output latches, and a bus port transceiver. Control signals for , , and port Output Enable (OE) of the bus port transceiver. User-defined logic within these Control , registers, output latches, and the transceiver port. During normal operation, data passes from the
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74194 shift register

Abstract: 74377 register Microprocessor Bus Port with Programmable Control. · Dual Byte-Wide Input and Output Register's for , register. Two 74373 output latches provide a mechanism for processor access to current bit rate count , the Silicon level. The device consists o f a dedicated Byte-wide Bus-lnterface Port and Input/O utput , Input and Output Registers allows the implementation of functions in the device which are loosely , bidirectional, generic slave interface of the EPB1400 Bus Port fits virtually any microprocessor. Control
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74194 shift register 74377 register logicaps shift register by using D flip-flop 7474 74377 74191 counter

S5-P

Abstract: W78LE52P Port transmitter output INT0 (P3.2) : External Interrupt 0 INT1 (P3.3) : External Interrupt 1 T0(P3 , ALE Low TPDH 0 - - nS Port Output to ALE TPDA 1 TCP - - nS Note , additional 4-bit I/O port P4; three 16bit timer/counters; a hardware watchdog timer and a serial port. These , port, additional INT2 / INT3 (available on 44-pin PLCC/QFP package) · Three 16-bit timer/counters · One full duplex serial port(UART) · Watchdog Timer · Eight sources, two-level interrupt
Winbond Electronics
Original
W78LE52 S5-P W78LE52P W78LE52P-24 80C52 W78C51

80C52

Abstract: W78C51 (P3.1) : Serial Port transmitter output INT0 (P3.2) : External Interrupt 0 INT1 (P3 , TPDH 0 - - nS Port Output to ALE TPDA 1 TCP - - nS Note: Ports are , I/O ports; an additional 4-bit I/O port P4; three 16-bit timer/counters; a hardware watchdog timer and a serial port. These peripherals are supported by eight sources two-level interrupt capability , · One extra 4-bit bit-addressable I/O port, additional INT2 / INT3 (available on 44-pin PLCC/QFP
Winbond Electronics
Original
W78LE54 W78LE54-24 W78LE54F W78LE54F-24 W78LE54P W78LE54P-24

W78E054C40PL

Abstract: w78e54b - nS Port Input Hold from ALE Low TPDH 0 - - nS Port Output to ALE TPDA , .16 7.3.5 Port Access Cycle , . 18 Port Access Cycle , bytes RAM; four 8-bit bi-directional and bit-addressable I/O ports; an additional 4-bit I/O port P4; three 16-bit timer/counters; a hardware watchdog timer and a serial port. These peripherals are
Winbond Electronics
Original
W78E054C40PL w78e54b W78E054C W78E54B-24/40 W78E054C40DL W78E54C/W78E054C
Abstract: are described below: RXD(P3.0) : Serial Port receiver input TXD(P3.1) : Serial Port transmitter output , Port Input Hold from ALE Low Port Output to ALE TPDS TPDH TPDA 1 TCP 0 1 TCP - - nS nS , and bit-addressable I/O ports; an additional 4-bit I/O port P4; three 16-bit timer/counters; a hardware watchdog timer and a serial port. These peripherals are supported by eight sources two-level , -bit bi-directional ports One extra 4-bit bit-addressable I/O port, additional INT2 / INT3 (available on 44-pin PLCC Winbond Electronics
Original
W78LE52C/W78L052C

74244 uses and functions

Abstract: MC012 port. TxD (P3.1): Serial output port. INT0 (P3.2): External interrupt. Serve as A14 during memory , Description 7-4 - These bits are reserved. 3 P4.3 Port 4 Data bit that output to pin P4.3 at mode 0. 2 P4.2 Port 4 Data bit that output to pin P4.2 at mode 0. 1 P4.1 Port 4 Data bit that output to pin P4.1 at mode 0. 0 P4.0 Port 4 Data bit that output to pin P4.0 at mode , address depends on the content of P2EAL and P2EAH. =11 : Undefined. PORT 2 OUTPUT DATA BUS MUX
Integrated Circuit Solution
Original
MC012-0C 74244 uses and functions MC012 TTL 74373 TI 74244 p41al IC89E54/58/64 16/32/64-K IC89E54 IC89E58 IC89E64 80C51

w78e62bp

Abstract: w78e62 data #XX to pin P4.3-P4.1. PORT 2 OUTPUT DATA BUS INTERNAL DATA BUS PORT 2 74373 WRITE MUX , : input, O: output, I/O: bi-directional, H: pull-high, L: pull-low, D: open drain Port 4 Port 4, SFR , P2.7-P2.0 will output and latch the value 55H. When Port2 is configured as 74244 or 74373 function, the instruction " MOV P2,#XX " will write the data #XX to P2 register only but not output to port , Hold from ALE Low TPDH 0 - - nS Port Output to ALE TPDA 1 TCP - - nS
Winbond Electronics
Original
W78E365 w78e62bp w78e62 8051 tcp ip 74244 W78E365D

82303

Abstract: Bus Address Latches â  Integrated Parallel Port a Low pQWer CHMOS Technology â  Integrated Card Setup Port (96H) B 100.pin Plastic Quad Flat Package The 82303 Local Channel Support , equivalent IBM system. The 82303 integrates most all logic required to implement a parallel port. This port operates either as a standard parallel port or as a MicroChannel architecture compatible "extended modeâ' (bi-directional) port. The 82303 also integrates the Card Setup Port (96H) and several peripheral bus address
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82303 P103RD P103W P101RD M60STR

80C52

Abstract: W78C51 TPDH 0 - - nS Port Output to ALE TPDA 1 TCP - - nS Note: "" (due to , port P4; three 16-bit timer/counters; a hardware watchdog timer and a serial port. These peripherals , address space · Four 8-bit bi-directional ports · One extra 4-bit bit-addressable I/O port, additional , serial port (UART) · Watchdog Timer · Eight sources, two-level interrupt capability · EMI reduction , onto the Port 0 address/ data bus during fetch and MOVC operations. When internal ROM access is
Winbond Electronics
Original
W78IE54 W78IE54P DC-40

80C52

Abstract: W78C51 Port transmitter output RST XTAL1 XTAL2 VSS VDD P0.0 - P0.7 P1.0 - P1.7 P2.0 - P2.7 P3.0 - , ALE Low TPDH 0 - - nS Port Output to ALE TPDA 1 TCP - - nS Note , port P4; three 16-bit timer/counters; a hardware watchdog timer and a serial port. These peripherals , -bit bi-directional ports · One extra 4-bit bit-addressable I/O port, additional INT2 / INT3 (available on 44-pin PLCC package) · Three 16-bit timer/counters · One full duplex serial port (UART) · Watchdog Timer ·
Winbond Electronics
Original
W78IE52 W78IE52P
Abstract: input TXD(P3.1) : Serial Port transmitter output INT0 (P3.2) : External Interrupt 0 INT1(P3 , Input Setup to ALE Low Port Input Hold from ALE Low Port Output to ALE SYMBOL TPDS TPDH TPDA MIN. 1 TCP , bytes RAM; four 8-bit bi-directional and bitaddressable I/O ports; an additional 4-bit I/O port P4; three 16-bit timer/counters; a hardware watchdog timer and a serial port. These peripherals are , Four 8-bit bi-directional ports · One extra 4-bit bit-addressable I/O port, additional INT2 / INT3 Winbond Electronics
Original

W78E52CP-40

Abstract: PARAMETER SYMBOL MIN. TYP. MAX. UNIT Port Input Setup to ALE Low Port Input Hold from ALE Low Port Output , . 17 Port Access Cycle , /O ports; an additional 4-bit I/O port P4; three 16-bit timer/counters; a hardware watchdog timer and a serial port. These peripherals are supported by eight sources two-level interrupt capability. To , -bit bit-addressable I/O port, additional INT2 / INT3 (available on 44-pin PLCC/QFP package) Three 16-bit timer
Winbond Electronics
Original
W78E52CP-40 W78E52C

74244

Abstract: MC012 . PORT 2 OUTPUT DATA BUS MUX INTERNAL DATA BUS 74373 WRITE 16-BIT COMPARATOR P2CN1 ADDRESS , output and latch the value 55H. When Port 2 is configured as 74244 or 74373 function, the instruction , .0-P4.3 RxD (P3.0): Serial input port. TxD (P3.1): Serial output port. INT0 (P3.2): External interrupt , bit that output to pin P4.3 at mode 0. 2 P4.2 Port 4 Data bit that output to pin P4.2 at mode 0. 1 P4.1 Port 4 Data bit that output to pin P4.1 at mode 0. 0 P4.0 Port 4 Data
Integrated Circuit Solution
Original
pin configuration 74373 1237h ph43 16K/32K/64K IC89E54/58/64-12PL IC89E54/58/64-12W IC89E54/58/64-12PQ IC89E54/58/64-24PL IC89E54/58/64-24W

Q719

Abstract: 39AD .1) : Serial Port transmitter output ALE P3.0 - P3.7 INT0 (P3.2): External Interrupt 0 INT1 (P3.3): External , PARAMETER SYMBOL MIN. TYP. MAX. UNIT Port Input Setup to ALE Low Port Input Hold from ALE Low Port Output , . 12 Output Disable Condition , . 18 Port Access Cycle , . 21 Port Access Cycle
Winbond Electronics
Original
Q719 39AD W78IE52/W78I052A

W78E54B-24/40

Abstract: . MAX. UNIT Port Input Setup to ALE Low Port Input Hold from ALE Low Port Output to ALE TPDS TPDH , . 12 Output Disable Condition , . 19 -1- W78E52B 10.4 10.5 11. 11.1 11.2 12. 12.1 12.2 12.3 13. Port Access Cycle , -bit bi-directional and bitaddressable I/O ports; an additional 4-bit I/O port P4; three 16-bit timer/counters; a hardware watchdog timer and a serial port. These peripherals are supported by eight sources two-level
Winbond Electronics
Original

8051 microcontroller based Digital clock with alarm

Abstract: Sine Wave Generator using 8051 mathematical computation, and output the result to another port, requiring 500 machine cycles of CPU time , requires the use of a Page 3 of 12 74373-type latch to demultiplex the lower byte of address. Figure 3 , available, their power consumption must also include that associated with a 74373 series latch as well as , waveform generator, with the ability to output sine, triangle, or square waves. The current consumption , that automatically restores the device to full operation when an external interrupt or serial port
Maxim Integrated Products
Original
AN1771 APP1771 8051 microcontroller based Digital clock with alarm Sine Wave Generator using 8051 disadvantages of microcontroller 8051 Digital Alarm Clock using 8051 digital clock with alarm using 8051 square wave generator by 8051 DS80C320 DS87C520 8051-B DS1620
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