500 MILLION PARTS FROM 12000 MANUFACTURERS

DATASHEET SEARCH ENGINE

Top Results

Part Manufacturer Description Datasheet BUY
BUF634U-TR Texas Instruments BUFFER AMPLIFIER, PDSO8 visit Texas Instruments
BUF600AU-TR Texas Instruments BUFFER AMPLIFIER, PDSO8 visit Texas Instruments
BUF601AU-TR Texas Instruments BUFFER AMPLIFIER, PDSO8 visit Texas Instruments
BUF601AP Texas Instruments BUFFER AMPLIFIER, PDIP8 visit Texas Instruments
HFA1112IB96 Intersil Corporation BUFFER AMPLIFIER, PDSO8 visit Intersil
HA2-5002-2 Intersil Corporation BUFFER AMPLIFIER, MBCY8 visit Intersil

74245 BUFFER IC

Catalog Datasheet MFG & Type PDF Document Tags

74245 BUFFER IC

Abstract: 74_245 IC 2 Ai A2 A3 Bi B2 53 AS A6 A7 A0 B5 B6 B7 08 10 17 / _y _16_V 14 / 12 / / 11 G D IR 74_245 D IB - IC 3 D23 A1 A2 A3 A4 A5 AB A7 , / 14 / 13 / 12 / 11 G D IR 74_245 |D24 - p3Ï~ IC 4 A*1 A2 A3 A4 A5 A5 A7 , ordered with any 245 type transceiver from any family of IC manufacturing technology (such as LS, F, FCT , specifications and electrical characteristics are determined by the IC devices used. These items can vary
-
OCR Scan

74245 BUFFER IC

Abstract: pin diagram of 74245 BUFFER IC timers (556), an IDE control signal buffer (74244), and an IDE data bus transceiver (74245). It also , receivers (1489), two timers (556), IDE control signal buffer (74244), and IDE data bus transceiver (74245 , GPOO GP01 CSOOP CSÌOP SDO-6 74245 GPOO' I ' GPOV I s s * BUFFER GMWR CSOIN CS1IN GMRD IORIN IOWIN DROP1-6 RVOPM O RVIN1-10 FUNCTIONAL DESCRIPTION Block 74245 The IDE , ./ E lectron ic» Corp. W83758F SYMBOL MR IORIN IOWIN CSOIN CS1IN CSOOP CS10P PDCIN PIN NO. 6
-
OCR Scan
74245 BUFFER IC pin diagram of 74245 BUFFER IC W83758 74244 BUFFER IC pin diagram of ic 74245 function pin configuration ic 74244 RS232

cd 75232

Abstract: 74245 20 pin ic 1 2 3 4 5 6 7 8 9 TAG GMCH ICH CACHE 74LS244(F244) 40S9011 74245( ) 10.MAX 213 11. CPU 12 , SUPER I/O K/B MOU 40S9011 CLOCK CHIP CLOCK RTC.CLOCK 74245( 1 ) G( A A A G( MAX 213 GND GND ) 74245 B B B 0 0 1 ) Dir( 0 1 1 ) 66-100MHZ MEMORY CLOCK BAT CPU 32.768KHZ 1G Dir 74245 A B , INTIATOR TARGET IRDY# TRDY# REQ# Master GNT# ( ) CPU IC 1. CPU CPU 2. CPU CU&ALU CU CONTROL , 16C54 ( ) IRQ IC : 8259 : Interrupt IRQ ­ 8259 CPU , , , CPU , , , , (K/B , FDD ,MOUSE.) , . : 1
-
Original
cd 75232 74245 20 pin ic intel 8253A ic dma 8237 8088 of 74245 BUFFER IC ic 8259 VT8501 VT82C686A DMA--33/66 8254--RTC 66MHZ/100MHZ 100MHZ

EP1200

Abstract: design of custom m icroprocessor peripheral applications. A ty p ic a l a p p lic a tio n en viro nm en , . Com m uni­ cation to an external bus is provided by an 8-bit bus transceiver (similar to 74245). , control inputs for each of the I/O buffer registers as well as the bus port transceiver. As a result , , macrocell feedback may access the EPB1400 in­ ternal bus via the I/O buffer registers. Designing with the , Microprocessor Interface Block. These byte-wide elements include 2 input buffer registers, 2 output latches and
-
OCR Scan
EP1200

IC 74373 truth table

Abstract: IC 74373 provided by an 8-bit bus transceiver (similar to 74245). Enhanced drive capability on the transceiver , Macrocells permit user-defined logic functions to act as control inputs for each of the I/O buffer , , macrocell feedback may access the EPB1400 in­ ternal bus via the I/O buffer registers. Designing with the , Microprocessor Interface Block. These byte-wide elements include 2 input buffer registers, 2 output latches and , elements consist of two input buffer registers, two output latches, and a bus port transceiver. Control
-
OCR Scan
IC 74373 truth table IC 74373 function of latch ic 74373 logitech 99 mouse IC EPB1400-2

pin diagram of 74245 BUFFER IC

Abstract: 74245 BIDIRECTIONAL BUFFER IC generates enable and direction controls for IC buffers such as 74_245. The AD1848K SoundPort Stereo Codec , rig h ts o f th ir d pa rties w h ic h m a y re s u lt fro m its use. No license is g ra n te d b y im , ! ESD S E N S IT IV E DE V IC E 68-Lead Plastic Leaded Chip Carrier Pinout o S < 0 64-Lead Thin , capture buffer have been transferred. Capture Data Acknowledge. The assertion of this active LO signal indicates that the RD cycle occurring is a DMA read from the capture buffer. Playback Data Request. The
-
OCR Scan
74245 BIDIRECTIONAL BUFFER IC mce 4000 electret microphone AL212 function pin configuration ic 74245 I848K
Abstract: enable and direction controls for IC buffers such as the 74_245. The AD 1846 SoundPort Stereo Codec , ⺠AN ALO G D E V IC E S Low Cost Parallel-Port 16-Bit SoundPort Stereo Codec ADI846 , buffer have been transferred. CDAK 11 I Capture Data Acknowledge. T he assertion of this active LO signal indicates that the RD cycle occurring is a DMA read from the capture buffer. PDRQ , active LO signal indicates that the W R cycle occurring is a DMA write to the playback buffer. ADR1:0 -
OCR Scan
AD1848

AD1848JP

Abstract: controls for IC buffers such as 74_245. The AD 1848 SoundPort Stereo Codec supports a DMA request/ grant , in frin g e m e n ts o f pa tents o r o th e r rig h ts o f th ird pa rties w h ic h m a y re s u lt , buffer have been transferred. CDAK 11 I Capture Data Acknowledge. The assertion of this active LO signal indicates that the RD cycle occurring is a DMA read from the capture buffer. PDRQ , active LO signal indicates that the WR cycle occurring is a DMA write to the playback buffer. ADR1:0
-
OCR Scan
AD1848JP
Abstract: direction controls for IC bus buffers such as the 74.245. The codec includes a stereo pair o f £A , A transfers over the ISA /EISA bus. The FIFOs buffer data transfers and allow for relaxed tim ing , 2.55 2.83 Input Voltage (RMS Values A ssum e Sine W ave Input) Line M ax 1 M IC w ith +20 dB G ain (M G E = 1) 3.35 0 .1 0.255 M IC w ith 0 dB G ain (M G E = 0) 0.283 0.335 , /AMPLIFIERS/ATTENUATORS M in M ax U n its 1.25 Step Size : A U X1, A U X2, LIN E, M IC (All Steps -
OCR Scan
AD1845 100-L AD1846 CS4248 CS4231 P-68A
Abstract: over the ISA/EISA bus. T he FIFOs buffer data transfers and allow for relaxed timing in acknowledging , Input) Line 2.55 M IC with + 20 dB G ain (M G E = 1) 0.255 M IC with 0 dB G ain (M G E = 0) 2.55 , dB Min Max U nits 0 Step Size : AU X1, AU X2, LIN E, M IC (All Steps T ested) (+ 12 , ) (â'"42 dB to â'"45 dB) Input G ain/Attenuation Range: AU X1, AU X2, LIN E, M IC Input G ain , Inputs (Input L, G round R, Read R; Input R, G round L, Read L) Line to M IC (Input LIN E, G round and -
Original
C2008

mce 4000 electret microphone

Abstract: 74245 BIDIRECTIONAL BUFFER IC generates enable and direction controls for IC buffers such as 74_245. The AD1848K SoundPort Stereo Codec , remain asserted until all the bytes from the capture buffer have been transferred. Capture Data , the capture buffer. Playback Data Request. The assertion of this signal indicates that the Codec is , indicates that the WR cycle occurring is a DMA write to the playback buffer. CDAK PDRQ 11 14 2 5 , , and the ADC output buffer will contain the last valid output. Clearing the sticky INT bit (or the TRD
Analog Devices
Original
AD1848KP C1847

74245 BUFFER IC

Abstract: ad1848j a computer motherboard or add-in card. The AD1848K generates enable and direction controls for IC buffers such as 74_245. The AD1848K SoundPort Stereo Codec supports a DMA request/grant architecture for , from the capture buffer have been transferred. CDAK 11 2 I Capture Data Acknowledge. The , buffer. PDRQ 14 5 O Playback Data Request. The assertion of this signal indicates that the , playback buffer. ADR1:0 9 & 10 1 & 64 I Codec Addresses. These address pins are asserted by
Analog Devices
Original
ad1848j 3 pin condenser mic electret condenser mic 945 MOTHERBOARD CIRCUIT diagram CAPACITOR MICROPHONE mce 74245 buffer

74245 BIDIRECTIONAL BUFFER IC

Abstract: 74245 BUFFER IC enable and direction controls for IC buffers such as 74.245. The AD 1846 SoundPort Stereo Codec supports , «pocificati - - u not implied- Ezpo(u ic to abeoiute m axim um n u | condition* for ext - le d penoda affect , capture buffer have been transferred. Capture Data Acknowledge. The assertion of this active LO signal indicates that the RD cycle occurring is a DMA read from the capture buffer. Playback Data Request. The , the playback buffer. Codec Addresses. Theseaddress pins.are asserted by the Codec interface logic
-
OCR Scan
dca300 DCA307
Abstract: transfers over the ISA/EISA bus. The FIFOs buffer data transfers and allow for relaxed timing in acknowl , h ic h m a y res u lt fro m its use. N o license is g ra n te d by im p lic a tio n or o th e rw is , S I? > A n a lo g D ev ic e s , Inc., 1 995 One Technology Way, P.O. Box 9106, Norwood. M A , 3.85 47.5 46 dB dB dB dB Min Max Units 0 Step Size : AUX1, AUX2, LINE, M IC (All , Distortion* ADC Crosstalk* Line Inputs (Input L, Ground R, Read R; Input R, Ground L, Read L) Line to M IC -
OCR Scan
ST-100

pin diagram of 74245 BUFFER IC

Abstract: 74245 BUFFER IC motherboard or add-in card. The AD1846 generates enable and direction controls for IC buffers such as the 74_245. FEATURES Low Cost, Pin- and Register-Compatible Alternative to AD1848 Single-Chip , transfer. This signal will remain asserted until all the bytes from the capture buffer have been , occurring is a DMA read from the capture buffer. Playback Data Request. The assertion of this signal , this active LO signal indicates that the WR cycle occurring is a DMA write to the playback buffer
Analog Devices
Original
74245 BIDIRECTIONAL BUFFER data AD1846JP IXA2 ADR100 2N4124 AD820 C1966

74245 BUFFER IC

Abstract: of 74245 BUFFER IC controls for IC buffers such as 74_245. The AD1848K SoundPort Stereo Codec supports a DMA request/grant , the capture buffer have been transferred. CDAK 11 2 I Capture Data Acknowledge. The assertion of this active LO signal indicates that the RD cycle occurring is a DMA read from the capture buffer. PDRQ 14 5 o , WR cycle occurring is a DMA write to the playback buffer. ADR 1:0 9 & 10 1 & 64 I Codec Addresses , , and the ADC output buffer will contain the last valid output. Clearing the sticky INT bit (or the TRD
-
OCR Scan
ADI848K LT3122 AD1848KST 74245 for buffer 4C259

mce 4000 electret microphone

Abstract: pin diagram of 74245 BUFFER IC IC buffers such as the 74_245. The AD1846 SoundPort Stereo Codec supports a DMA request/grant , until all the bytes from the capture buffer have been transferred. Capture Data Acknowledge. The , buffer. Playback Data Request. The assertion of this signal indicates that the Codec is ready for more , the WR cycle occurring is a DMA write to the playback buffer. Codec Addresses. These address pins are , will be internally generated for the DACs, and the ADC output buffer will contain the last valid output
Analog Devices
Original
ixa1 rx1a1 cfs 455 ceramic filter

ic 74226

Abstract: jk flip flop 74103 N T h e R P 3 G 01 and R P 3 G 0 2 a r e A n a lo g /D ig ita l se m ic u s to m g a te a r r a y s fa b r ic a te d w ith m e ta l g a te B i-C M O S p ro cess. T h e R P 3 G 0 1 and R P 3 G 0 2 c o n , in g th e C M O S l o g i c , b o t h o f w h ic h a r e in te g r a te d o n o n e c h ip . A s t h , Resistor W ell Resistors Base Resistors Gate Number I/O Buffer po ssib le fo r th em to d rive d irectly , s: ( 1) (2) (3) B ip o la r a n a lo g circu it C M O S log ic g a te a rra y a re a In p u t/O u tp
-
OCR Scan
ic 74226 jk flip flop 74103 ic D flip flop 7474 7471 rs flip flop 4011 flip flop IC 7400 SERIES list RP3G01 3W1X879 00GG71S

82306

Abstract: 74590 Package High-lntegration-The 82304, 82303 and 82077 Floppy Disk Controller Replace 50 IC's in IBM , , significantly reduce system cost, design effort, and form factor constraints by replacing 50 IC devices in an , BUS LATCHED VERSION OF M ICRO CHANNEL S I * INPUT EXTERNAL 74543 DATA BUFFER C O NTRO L SIGNALS: T , system qualifiers to enable the peripheral bus data buffer. 1-538 in t e i 82304 82304 LOCA L , . Electrical Characteristics t c = o°cto +70°c,vC c = sv ± 10% Sym bol ViL V|H V|L V|H VOL VOH VOL VOH ic c
-
OCR Scan
82306 74590 pin configuration of ic 74373 8259 Programmable Peripheral Interface pin diagram of ic 74373 IC 8259 internal pin diagram RAMD11 RAMD12

mce 4000 electret microphone

Abstract: 1845 generates enable and direction controls for IC bus buffers such as the 74.245. T he codec , reduce the risk of losing data when making D M A transfers over the ISA/EISA bus. The FIFOs buffer data , A U X IL IA R Y LINE, M O N O , AND M IC R O P H O N E IN P U T ANALOG G A IN /A M P L IF IE R S /A , ±5 n k£2 pF pF V |jA k£2 dB mV ADI 845 SYSTEM S P E C IF IC A T IO N S M in Max , Nonlinearity* Phase Linearity Deviation* T yp dB LSB Degrees Max Units S T A T IC D IG IT A L
-
OCR Scan
Showing first 20 results.