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EHHD024A0A41-18HZ GE Critical Power DC-DC Regulated Power Supply Module visit GE Critical Power
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74245 BIDIRECTIONAL BUFFER IC

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74245 BUFFER IC

Abstract: 74_245 IC 2 Ai A2 A3 Bi B2 53 AS A6 A7 A0 B5 B6 B7 08 10 17 / _y _16_V 14 / 12 / / 11 G D IR 74_245 D IB - IC 3 D23 A1 A2 A3 A4 A5 AB A7 , / 14 / 13 / 12 / 11 G D IR 74_245 |D24 - p3Ï~ IC 4 A*1 A2 A3 A4 A5 A5 A7 , 32 UNE SUPPORT MODULE > > 3 2 line bidirectional bus interface > > High density .070 center , ordered with any 245 type transceiver from any family of IC manufacturing technology (such as LS, F, FCT
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EP1200

Abstract: algorithm to fit the design, BUS PORT TR ANSCEIVER BUSX is sim ilar to the 74245 bi-directional bus , design of custom m icroprocessor peripheral applications. A ty p ic a l a p p lic a tio n en viro nm en , . Com m uni­ cation to an external bus is provided by an 8-bit bus transceiver (similar to 74245). , control inputs for each of the I/O buffer registers as well as the bus port transceiver. As a result , , macrocell feedback may access the EPB1400 in­ ternal bus via the I/O buffer registers. Designing with the
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EP1200
Abstract: enable and direction controls for IC buffers such as the 74_245. The AD 1846 SoundPort Stereo Codec , ⺠AN ALO G D E V IC E S Low Cost Parallel-Port 16-Bit SoundPort Stereo Codec ADI846 , buffer have been transferred. CDAK 11 I Capture Data Acknowledge. T he assertion of this active LO signal indicates that the RD cycle occurring is a DMA read from the capture buffer. PDRQ , active LO signal indicates that the W R cycle occurring is a DMA write to the playback buffer. ADR1:0 -
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AD1848

pin diagram of 74245 BUFFER IC

Abstract: 74245 BIDIRECTIONAL BUFFER IC generates enable and direction controls for IC buffers such as 74_245. The AD1848K SoundPort Stereo Codec , rig h ts o f th ir d pa rties w h ic h m a y re s u lt fro m its use. No license is g ra n te d b y im , ! ESD S E N S IT IV E DE V IC E 68-Lead Plastic Leaded Chip Carrier Pinout o S < 0 64-Lead Thin , capture buffer have been transferred. Capture Data Acknowledge. The assertion of this active LO signal indicates that the RD cycle occurring is a DMA read from the capture buffer. Playback Data Request. The
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pin diagram of 74245 BUFFER IC 74245 BIDIRECTIONAL BUFFER IC of 74245 BUFFER IC 74245 BUFFER IC mce 4000 electret microphone AL212 I848K

IC 74373

Abstract: IC 74373 truth table algorithm to fit the design. BUS PORT TRANSCEIVER BU SX is similar to the 74245 bi-directional bus , provided by an 8-bit bus transceiver (similar to 74245). Enhanced drive capability on the transceiver , Macrocells permit user-defined logic functions to act as control inputs for each of the I/O buffer , , macrocell feedback may access the EPB1400 in­ ternal bus via the I/O buffer registers. Designing with the , Microprocessor Interface Block. These byte-wide elements include 2 input buffer registers, 2 output latches and
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IC 74373 IC 74373 truth table function of latch ic 74373 logitech 99 mouse IC EPB1400-2

AD1848JP

Abstract: controls for IC buffers such as 74_245. The AD 1848 SoundPort Stereo Codec supports a DMA request/ grant , in frin g e m e n ts o f pa tents o r o th e r rig h ts o f th ird pa rties w h ic h m a y re s u lt , buffer have been transferred. CDAK 11 I Capture Data Acknowledge. The assertion of this active LO signal indicates that the RD cycle occurring is a DMA read from the capture buffer. PDRQ , active LO signal indicates that the WR cycle occurring is a DMA write to the playback buffer. ADR1:0
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AD1848JP

mce 4000 electret microphone

Abstract: 74245 BIDIRECTIONAL BUFFER IC generates enable and direction controls for IC buffers such as 74_245. The AD1848K SoundPort Stereo Codec , remain asserted until all the bytes from the capture buffer have been transferred. Capture Data , the capture buffer. Playback Data Request. The assertion of this signal indicates that the Codec is , indicates that the WR cycle occurring is a DMA write to the playback buffer. CDAK PDRQ 11 14 2 5 , 16-bit outputs from the ADCs is available over a byte-wide bidirectional interface that also supports
Analog Devices
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AD1848KP C1847
Abstract: over the ISA/EISA bus. T he FIFOs buffer data transfers and allow for relaxed timing in acknowledging , Input) Line 2.55 M IC with + 20 dB G ain (M G E = 1) 0.255 M IC with 0 dB G ain (M G E = 0) 2.55 , dB Min Max U nits 0 Step Size : AU X1, AU X2, LIN E, M IC (All Steps T ested) (+ 12 , ) (â'"42 dB to â'"45 dB) Input G ain/Attenuation Range: AU X1, AU X2, LIN E, M IC Input G ain , Inputs (Input L, G round R, Read R; Input R, G round L, Read L) Line to M IC (Input LIN E, G round and -
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AD1845 100-L AD1846 CS4248 CS4231 C2008

74245 BUFFER IC

Abstract: ad1848j a computer motherboard or add-in card. The AD1848K generates enable and direction controls for IC buffers such as 74_245. The AD1848K SoundPort Stereo Codec supports a DMA request/grant architecture for , from the capture buffer have been transferred. CDAK 11 2 I Capture Data Acknowledge. The , buffer. PDRQ 14 5 O Playback Data Request. The assertion of this signal indicates that the , playback buffer. ADR1:0 9 & 10 1 & 64 I Codec Addresses. These address pins are asserted by
Analog Devices
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ad1848j 3 pin condenser mic electret condenser mic 945 MOTHERBOARD CIRCUIT diagram CAPACITOR MICROPHONE mce 74245 buffer

74LS82

Abstract: 74245 BIDIRECTIONAL BUFFER IC Buffer 1mA Bidirectional Output Buffer 2mA Bidirectional Output Buffer 4mA Bidirectional Outpupt Buffer 8mA Bidirectional Output Buffer 12mA Bidirectional Output Buffer 1mA Bidirectional Output Buffer with Open Drain or Open Source 8mA Bidirectional Output Buffer with Open Drain or Open Source 12mA Bidirectional Output Buffer with Open Drain or Open Source Direct Input Clock Driver Clock Driver with CMOS , Surrounding the inner core of cells are a number of input/output pad cells. Each I/O buffer contains an input
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74LS82 ic 4583 schmitt trigger core bit excess 3 adder using IC 7483 la 4508 ic schematic diagram advantages for ic 7473 4 BIT COUNTER 74669 TC140G SC12D4 SC18D4 SC27D4 SC37D4 SC44D4

74245 BIDIRECTIONAL BUFFER IC

Abstract: 74245 BUFFER IC enable and direction controls for IC buffers such as 74.245. The AD 1846 SoundPort Stereo Codec supports , «pocificati - - u not implied- Ezpo(u ic to abeoiute m axim um n u | condition* for ext - le d penoda affect , capture buffer have been transferred. Capture Data Acknowledge. The assertion of this active LO signal indicates that the RD cycle occurring is a DMA read from the capture buffer. Playback Data Request. The , the playback buffer. Codec Addresses. Theseaddress pins.are asserted by the Codec interface logic
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dca300 DCA307
Abstract: direction controls for IC bus buffers such as the 74.245. The codec includes a stereo pair o f £A , A transfers over the ISA /EISA bus. The FIFOs buffer data transfers and allow for relaxed tim ing , 2.55 2.83 Input Voltage (RMS Values A ssum e Sine W ave Input) Line M ax 1 M IC w ith +20 dB G ain (M G E = 1) 3.35 0 .1 0.255 M IC w ith 0 dB G ain (M G E = 0) 0.283 0.335 , /AMPLIFIERS/ATTENUATORS M in M ax U n its 1.25 Step Size : A U X1, A U X2, LIN E, M IC (All Steps -
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P-68A ST-100

pin diagram of 74245 BUFFER IC

Abstract: 74245 BUFFER IC motherboard or add-in card. The AD1846 generates enable and direction controls for IC buffers such as the 74_245. FEATURES Low Cost, Pin- and Register-Compatible Alternative to AD1848 Single-Chip , transfer. This signal will remain asserted until all the bytes from the capture buffer have been , occurring is a DMA read from the capture buffer. Playback Data Request. The assertion of this signal , this active LO signal indicates that the WR cycle occurring is a DMA write to the playback buffer
Analog Devices
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74245 BIDIRECTIONAL BUFFER data AD1846JP IXA2 ADR100 2N4124 AD820 C1966

74245 BUFFER IC

Abstract: of 74245 BUFFER IC controls for IC buffers such as 74_245. The AD1848K SoundPort Stereo Codec supports a DMA request/grant , the capture buffer have been transferred. CDAK 11 2 I Capture Data Acknowledge. The assertion of this active LO signal indicates that the RD cycle occurring is a DMA read from the capture buffer. PDRQ 14 5 o , WR cycle occurring is a DMA write to the playback buffer. ADR 1:0 9 & 10 1 & 64 I Codec Addresses , bidirectional interface that also supports 16-bit digital input to the DACs and control information. The AD1848K
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ADI848K LT3122 AD1848KST 74245 for buffer 4C259

mce 4000 electret microphone

Abstract: pin diagram of 74245 BUFFER IC IC buffers such as the 74_245. The AD1846 SoundPort Stereo Codec supports a DMA request/grant , until all the bytes from the capture buffer have been transferred. Capture Data Acknowledge. The , buffer. Playback Data Request. The assertion of this signal indicates that the Codec is ready for more , the WR cycle occurring is a DMA write to the playback buffer. Codec Addresses. These address pins are , available over a byte-wide bidirectional interface that also supports 16-bit digital input to the DACs and
Analog Devices
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ixa1 rx1a1 cfs 455 ceramic filter

74ls82

Abstract: 74245 BIDIRECTIONAL BUFFER IC BD1 x 1mA Bidirectional Output Buffer C ST N U D 5.21 BD2x 2mA Bidirectional Output Buffer C ST N U D 3.95 BD4x 4mA Bidirectional Outpupt Buffer CSTNRRPUD 3.30 BD8x 8mA Bidirectional Output Buffer CSTNRRPUD 3.05 BD12x 12mA Bidirectional Output Buffer CSTNRRPUD 3.17 BD1 xOx 1 mA Bidirectional Output Buffer with Open Drain or Open Source C S T OS OD 5.21 BD8xOx 8mA Bidirectional Output Buffer with Open Drain or Open Source C S T OS OD 3.05 BD12xOx 12mA Bidirectional Output Buffer with Open Drain or Open
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74ls150 ph 4531 diode 4583 dual schmitt trigger ic D flip flop 7474 ic 7483 BCD adder Quad 2 input nand gate cd 4093
Abstract: transfers over the ISA/EISA bus. The FIFOs buffer data transfers and allow for relaxed timing in acknowl , h ic h m a y res u lt fro m its use. N o license is g ra n te d by im p lic a tio n or o th e rw is , S I? > A n a lo g D ev ic e s , Inc., 1 995 One Technology Way, P.O. Box 9106, Norwood. M A , 3.85 47.5 46 dB dB dB dB Min Max Units 0 Step Size : AUX1, AUX2, LINE, M IC (All , Distortion* ADC Crosstalk* Line Inputs (Input L, Ground R, Read R; Input R, Ground L, Read L) Line to M IC -
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82306

Abstract: 74590 Package High-lntegration-The 82304, 82303 and 82077 Floppy Disk Controller Replace 50 IC's in IBM , , significantly reduce system cost, design effort, and form factor constraints by replacing 50 IC devices in an , " bi-directional mode. The m ode is selected via system setup port 102H. m anipulates CHRDY to extend th e bus , BUS LATCHED VERSION OF M ICRO CHANNEL S I * INPUT EXTERNAL 74543 DATA BUFFER C O NTRO L SIGNALS: T , system qualifiers to enable the peripheral bus data buffer. 1-538 in t e i 82304 82304 LOCA L
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82306 74590 pin configuration of ic 74373 8259 Programmable Peripheral Interface pin diagram of ic 74373 IC 8259 internal pin diagram RAMD11 RAMD12

IC cs 4852 amplifier

Abstract: ST100B over the ISA/EISA bus. The FIFOs buffer data transfers and allow for relaxed timing in acknowledging , buffer. Playback Data Request. The assertion of this signal HI indicates that the codec is ready for more , write to the playback buffer. Codec Addresses. These address pins are asserted by the codec interface , consumption and extending battery life. 74_245 DIR G A 8 B SO IRQ Figure 1. Interface to ISA , , the AD1845 generates enable and direction controls for IC bus buffers such as the 74 245. The codec
Analog Devices
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IC cs 4852 amplifier ST100B

3 pin condenser mic

Abstract: electret mic AD1845 reduce the risk of losing data when making DMA transfers over the ISA/EISA bus. The FIFOs buffer , DMA read from the capture buffer. PDRQ 14 9 O Playback Data Request. The assertion of , playback buffer. ADR1:0 9 & 10 1 & 100 I Codec Addresses. These address pins are asserted by , IOWC RD IORC DATA7:0 8 8 74_245 B U S G DBEN B The AD1845 supports , controls for IC bus buffers such as the 74 245. Expanded Mode (MODE2) MODE1 is the initial state of
Analog Devices
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electret mic diode 68A 5 PEN PC TECHNOLOGY 2 pin condenser mic datasheets full scale output characteristic of dac stereo to 5.1 converter circuit diagram
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