NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: is 30 mA for the 9N07/5407 9N07/5407 and 40 mA for the 9N07/7407 and 9N17/7417 9N17/7417. LOGIC AND CONNECTION DIAGRAM DIP (TOP VIEW) FLATPAK (TOP VIEW) Vcc SCHEMATIC DIAGRAM (EACH BUFFER/DRIVER) RM^Rijliïl WWW ri n ri , FAIRCHILD TTL/SSI . 9N07/5407 9N07/5407, 7407 • 9N17/5417 9N17/5417, 7417 HEX BUFFER/DRIVER (WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUT) DESCRIPTION - These TTL/SSI hex buffer/driver feature high voltage open collector output , Range -55 25 125 0 25 70 °C Output HIGH Level Voltage, Vqh 9N07/5407 9N07/5407, 7407 30 30 Volts 9N17/5417 9N17/5417 ... | OCR Scan |
1 pages, |
9n07 HIGH LEVEL OPEN COLLECTOR OUTPUT DRIVER 7404 fan out connection DIAGRAM 7404 7404 TTL 5407 for 5407 dip package TTL 7417 7417 TTL 7407 connection diagram 9N07/5407 9N17/5417 9N17/ 9N07/5407 abstract |
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| Abstract: high beta and high fT ( 1 5 GHz) was se- TL H 7407 Â 5 FIGURE 5 LM161 LM161 Schematic Diagram 3 TL H 7407 Â 6 FIGURE 6 LM160 LM160 Schematic Diagram tended for interfacing to TTL logic direct , 74 Series TTL Loads ns max 25 AN-87 AN-87 C1995 C1995 National Semiconductor Corporation TL H 7407 , capacitance Figure 2 shows typical delay variation with temperature TL H 7407 Â 3 FIGURE 3 Offset , input voltage is relatively TL H 7407 Â 4 FIGURE 4 LM161 LM161 Common Mode Range g 15V op amp supplies ... | Original |
6 pages, |
LM260 C1995 AN-87 national LM261 LM360 LM361 NE529 AN-87 LM160 LM361 application note LM161 ttl 7407 transistor Comparison Tables 7407 7407 connection diagram datasheet abstract |
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| Abstract: 07 54/7407 ¿9/0&3 9 HEX BUFFER/DRIVER (With Open-Collector High-Voltage Output) ORDERING CODE: See Section 9 PKGS PIN OUT COMMERCIAL GRADE MILITARY GRADE PKG TYPE Vcc = +5.0 V ±5%, Ta = 0°C to +70° C Vcc = +5.0 V ±10%, Ta = -55° C to +125° C Plastic DIP (P) A 7407PC 7407PC 9A Ceramic DIP (D) A 7407DC 7407DC 5407 DM 6A Flatpak (F) A 7407FC 7407FC 5407 FM 3I CONNECTION DIAGRAM PINOUT A [± Å' Å' [I EE d gnd[T 1 f 3 t f 1«! Vcc 33 m a bg I] 11 INPUT LOADING/FAN-OUT: See Section 3 for U.L. ... | OCR Scan |
1 pages, |
IS417 7407DC 5407DM 7407FC 7407 connection diagram 5407FM 7407PC 7407PC abstract |
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| Abstract: mW High Speed Schottky 54S/74S 54S/74S 3 ns/19 mW Logic/Connection Diagram'2' S Tu a SI , FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D7 54/7430, 54H/74H30 54H/74H30 54S/74S30 54S/74S30, 54LS/74LS30 54LS/74LS30 Vcc NC NC NC D8 54S/74S133 54S/74S133, 54LS/74LS133 54LS/74LS133 Vcc Ifl ffl 13 13 El R El El D9 54S/74S134 54S/74S134 Vcc E , /7407, 54/7417 Vcc ra la ra la ei m rai m SJ a iii lai iii id id ili a iii GND Vcc , (OC/30 OC/30 V) - - 54/7407 - - D15 3I,6A,9A 11 Quad 2-lnput - 54LS/74LS08 54LS/74LS08 54/7408 54H/74H08 54H/74H08 54S/74S08 54S/74S08 D16 ... | OCR Scan |
2 pages, |
TTL 74ls27 TTL 7421 CI 74S02 7408 and LS 7402 CI 74LS32 7408 TTL 74ls02 ls 7408 ci 7430 TTL 7409 ls 7421 74LS27 CI 7408 54H/74H30 54S/74S30 54H/74H30 abstract |
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| Abstract: FAIRCHILD DIGITAL TTL SSI FUNCTIONS (Cont'd) E £ Function'1' 9000 Series 8 ns/10 mW Low Power Schottky 54LS/74LS 54LS/74LS 5 ns/2 mW Std. TTL 54/74 10 ns/10 mW High Speed 54H/74H 54H/74H 6 ns/22 mW High Speed Schottky 54S/74S 54S/74S 3 ns/19 mW Logic/Connection Diagram'2' Packages'3' NOR Gates 1 Quad 2-lnput 54LS/74LS02 54LS/74LS02 54/7402 - 54S/74S02 54S/74S02 D10 3I,6A,9A 2 Quad 2-lnput 9015 - - - - D11 4L,6B 3 Triple 3-lnput - , Hex Buffer (OC/15 OC/15 V) - - 54 741 7 - - D15 3I,6A,9A 10 Hex Buffer (OC/30 OC/30 V) - - 54/7407 - - D15 3I,6A ... | OCR Scan |
1 pages, |
IC 7407 IC 74ls32 CI 7408 LS 7408 TTL 74ls02 CI 7486 TTL 7427 TTL 7421 74LS32 TTL ttl 7432 CI 7407 IC 7432 TTL 74ls08 TTL 7408 54LS/74LS 54H/74H 54LS/74LS abstract |
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| Abstract: FAIRCHILD DIGITAL TTL SSI FUNCTIONS (Cont'd) E a o o e 3 LL 9000 Series 8 ns/10 mW Low Power Schottky 54LS/74LS 54LS/74LS 5 ns/2 mW Std. TTL 54/74 10 ns/10 mW High Speed 54H/74H 54H/74H 6 ns/22 mW High Speed Schottky 54S/74S 54S/74S 3 ns/19 mW Logic/Connection Diagram'2' S Tu a SI , 9 Hex Buffer (OC/15 OC/15 V) - - 54/7417 - - D15 3I,6A,9A 10 Hex Buffer (OC/30 OC/30 V) - - 54/7407 - - D15 3I ... | OCR Scan |
1 pages, |
74LS32 NOT gate 74LS11 TTL 74LS08 ttl 74LS02 7486 ci 7409 TTL 7408 fairchild 9S41 TTL 74LS11 ci 7432 ttl TTL 74ls08 TTL 7486 ttl 7432 7408 54LS/74LS 54H/74H 54LS/74LS abstract |
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| Abstract: Outputs are open collector (7407) with pull up resistors. The opto common supplies optical isolator power for limits, home and remote Party Line select (on J1). · 5 Volt operation MCB BLOCK DIAGRAM , contact signal arrangement allows direct connection of a hand held terminal. Pin Out 45 1 2 3 4 5 , collector (7407) circuits. Signals are easily interfaced to power drivers. Pin Signal 1 +5v 3 ... | Original |
2 pages, |
3 phase DC motor ESC circuit 7407 opto isolator wiring mcb wiring MCB-24 MCB-50 SMC-C24 opto isolator rs422 type b mcb mcb internal circuit diagram mcb circuit diagram RS-232 RS-422 MCB-24 abstract |
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| Abstract: Description No. of Bits â- o » .P-c Power Dissipation mW (Typ) Logic/Connection Diagram Package(s) 1 Multiplier , / Connection Diagram Package(s) OR Gates 8 Dual 3/3 OR 95110 2.5 145 E81 6B 9 Dual 3/3 OR 10110/10510 , FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D16 547408, 54H/74H08 54H/74H08, 54S/74S08 54S/74S08, 54LS/74LS08 54LS/74LS08 54 , /74 10 ns/10 mW High Speed 54H/74H 54H/74H 6 ns/22 mW High Speed Schottky 54S/74S 54S/74S 3 ns/19 mW Logic/Connection Diagram'2' S Tu a SI ... | OCR Scan |
3 pages, |
logic diagram of 7486 logic diagram of 7432 7408 and CI 74LS32 7411 7432 TTL fairchild 7486 ci TTL 7411 7432 7408 fairchild l0610 7432 TTL 7408, 7486, 7432 54H/74H08 54S/74S08 54H/74H08 abstract |
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| Abstract: mW Logic/Connection Diagram'2' S Tu a SI , FAIRCHILD LOGIC/CONNECTION DIAGRAMS D93 54LS/74LS379 54LS/74LS379 1 A 4 5 12 13 | E D0 Di D2 D3 CP Oo Qi Q2 03 lltlfltl 3 2 6 7 11 10 14 15 Vcc = Pin 16 GND = Pin 8 DIGITAL -TTL D94 9386, 74LS266 74LS266, 54LS/74LS386 54LS/74LS386 Vcc raianangnnnn 111 III Iii Lil liJ 111 III GND D95 54LS/74LS398 54LS/74LS398 4 5 7 6 14 15 , Buffer (OC/15 OC/15 V) - - 54/7417 - - D15 3I,6A,9A 10 Hex Buffer (OC/30 OC/30 V) - - 54/7407 - - D15 3I,6A,9A 11 ... | OCR Scan |
2 pages, |
74LS08 PIN 9S41 7411 pin diagram 7408, 7486, 7432 7408 TTL 8 input HA 7423 7408 fairchild TTL 7409 TTL 7421 7408 74LS08 ttl 7408 TTL 74LS574 CI 7402 54LS/74LS379 54LS/74LS379 abstract |
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| Abstract: ns/22 mW High Speed Schottky 54S/74S 54S/74S 3 ns/19 mW Logic/Connection Diagram'2' S Tu a SI , FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D16 547408, 54H/74H08 54H/74H08, 54S/74S08 54S/74S08, 54LS/74LS08 54LS/74LS08 54/7409, 54S/74S09 54S/74S09, 54LS/74LS09 54LS/74LS09 Vcc ) EI EI na fri EI iyi FI ¿J a lil liJ Li] Iii liJ 111 llJ OND D19 54/7421, 54H/74H21 54H/74H21 54LS/74LS21 54LS/74LS21 Vcc NC s J - D17 9S41 Vcc RRPIIiRRRR , Buffer (OC/30 OC/30 V) - - 54/7407 - - D15 3I,6A,9A 11 Quad 2-lnput - 54LS/74LS08 54LS/74LS08 54/7408 54H/74H08 54H/74H08 54S/74S08 54S/74S08 ... | OCR Scan |
2 pages, |
74LS32 NOT gate CI 7402 7408, 7486, 7432 74S08 TTL 74ls86 TTL 7432 fairchild 7432 74LS08 ttl TTL 7409 CI 7407 ci 7432 ttl TTL 7486 TTL 7421 TTL 74ls32 54H/74H08 54S/74S08 54H/74H08 abstract |
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| type connection to TV - Video signal pattern generator or video source (VCR, Sat Receiver, etc.) - +5V power supply The connection diagram (see Figure 1) shows how the evaluation board must be Connection Diagram STV5730 STV5730 STV5730 STV5730 - OSD CHIP QUICK EVALUATION GUIDE 2/13 5730-09.EPS Figure 2 : STV5730 STV5730 STV5730 STV5730 Evaluation Board Diagram STV5730 STV5730 STV5730 STV5730 - OSD CHIP QUICK EVALUATION GUIDE 3/13 Installing the Software After all the connection errors are encountered, (or the evaluation board supplies have not been set), the program will www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/1113.htm |
STMicroelectronics | 02/04/1999 | 26.84 Kb | HTM | 1113.htm |
| compatible - Television monitor (multistandard) - SCART type connection to TV - Video signal pattern generator or video source (VCR, Sat Receiver, etc.) - +5V power supply The connection diagram (see Evaluation Connection Diagram STV5730 STV5730 STV5730 STV5730 - OSD CHIP QUICK EVALUATION GUIDE 2/13 5730-09.EPS Figure 2 : STV5730 STV5730 STV5730 STV5730 Evaluation Board Diagram STV5730 STV5730 STV5730 STV5730 - OSD CHIP QUICK EVALUATION GUIDE 3/13 Installing the executable file .EXE. At this point, if any PC interface connection errors are encountered, (or the www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/1113-v1.htm |
STMicroelectronics | 25/05/2000 | 28.62 Kb | HTM | 1113-v1.htm |
| type connection to TV - Video signal pattern generator or video source (VCR, Sat Receiver, etc.) - +5V power supply The connection diagram (see Figure 1) shows how the evaluation board must be Connection Diagram STV5730 STV5730 STV5730 STV5730 - OSD CHIP QUICK EVALUATION GUIDE 2/13 5730-09.EPS Figure 2 : STV5730 STV5730 STV5730 STV5730 Evaluation Board Diagram STV5730 STV5730 STV5730 STV5730 - OSD CHIP QUICK EVALUATION GUIDE 3/13 Installing the Software After all the connection errors are encountered, (or the evaluation board supplies have not been set), the program will www.datasheetarchive.com/files/stmicroelectronics/books/ascii/docs/1113.htm |
STMicroelectronics | 25/05/2000 | 29.79 Kb | HTM | 1113.htm |
| type connection to TV - Video signal pattern generator or video source (VCR, Sat Receiver, etc.) - +5V power supply The connection diagram (see Figure 1) shows how the evaluation board must be Connection Diagram STV5730 STV5730 STV5730 STV5730 - OSD CHIP QUICK EVALUATION GUIDE 2/13 5730-09.EPS Figure 2 : STV5730 STV5730 STV5730 STV5730 Evaluation Board Diagram STV5730 STV5730 STV5730 STV5730 - OSD CHIP QUICK EVALUATION GUIDE 3/13 Installing the Software After all the connection errors are encountered, (or the evaluation board supplies have not been set), the program will www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/1113-v2.htm |
STMicroelectronics | 14/06/1999 | 26.8 Kb | HTM | 1113-v2.htm |
| Chip 1/40 7/1/99 Figure 1. Logic Diagram n POWERFUL X86 PROCESSOR n 64-BIT 64-BIT 64-BIT 64-BIT 66MHz INTERNAL BUS n 64-BIT 64-BIT 64-BIT 64-BIT TFT panel. The TFT interface is designed to support connection of its control signal to the Panel Diagram System mem External functions Internal functions I/O Ports Monitor DRAM Graphics TFT Interface x86 - pling of the processor core and these peripherals. As a result many of the external pin connections are connection. Please refer to the pin allocation drawing for refer- ence. Due to the number of pins available www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6377-v1.htm |
STMicroelectronics | 02/04/1999 | 62.7 Kb | HTM | 6377-v1.htm |
| Chip 1/40 7/1/99 Figure 1. Logic Diagram n POWERFUL X86 PROCESSOR n 64-BIT 64-BIT 64-BIT 64-BIT 66MHz INTERNAL BUS n 64-BIT 64-BIT 64-BIT 64-BIT TFT panel. The TFT interface is designed to support connection of its control signal to the Panel Diagram System mem External functions Internal functions I/O Ports Monitor DRAM Graphics TFT Interface x86 - pling of the processor core and these peripherals. As a result many of the external pin connections are connection. Please refer to the pin allocation drawing for refer- ence. Due to the number of pins available www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6377-v2.htm |
STMicroelectronics | 14/06/1999 | 62.67 Kb | HTM | 6377-v2.htm |
| Multimedia PC on a Chip 1/34 10/12/98 IPC 82C206 82C206 82C206 82C206 Figure 1. Logic Diagram n POWERFUL X86 PROCESSOR n 64-BIT 64-BIT 64-BIT 64-BIT 66 PAL/ NTSC GENERAL DESCRIPTION 8/34 Figure 5. Pictorial Block Diagram TV MPEG2 IDE GE PCI System mem - pling of the processor core and these peripherals. As a result many of the external pin connections are be encoded before connection to the STPC Consumer using ISACLK and ISACLKX2 as the input selection connection to the STPC Consumer using ISACLK and ISACLKX2 as the input selec- tion strobes. DREQ_MUX[1:0] ISA www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6376-v1.htm |
STMicroelectronics | 02/04/1999 | 62.07 Kb | HTM | 6376-v1.htm |
| Multimedia PC on a Chip 1/34 10/12/98 IPC 82C206 82C206 82C206 82C206 Figure 1. Logic Diagram n POWERFUL X86 PROCESSOR n 64-BIT 64-BIT 64-BIT 64-BIT 66 PAL/ NTSC GENERAL DESCRIPTION 8/34 Figure 5. Pictorial Block Diagram TV MPEG2 IDE GE PCI System mem - pling of the processor core and these peripherals. As a result many of the external pin connections are be encoded before connection to the STPC Consumer using ISACLK and ISACLKX2 as the input selection connection to the STPC Consumer using ISACLK and ISACLKX2 as the input selec- tion strobes. DREQ_MUX[1:0] ISA www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6376-v2.htm |
STMicroelectronics | 14/06/1999 | 62.03 Kb | HTM | 6376-v2.htm |
| Compatible Embedded Microprocessor 1/73 3/1/01 Issue 2.3 ISA I/F Figure 1. Logic Diagram n interface is designed to support the connection of this control signal to the PanelLink TM connections are made directly to the on-chip peripheral functions. Figure 2-1 shows the STPC Industrial location physical connection. Please refer to the pin allocation drawing for refer- ence. Due to the are the ISA bus interrupt signals. They are to be encoded before connection to the STPC In www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6377-v3.htm |
STMicroelectronics | 24/01/2001 | 101.68 Kb | HTM | 6377-v3.htm |
| /67 13/10/00 Issue 2.1 ISA I/F Figure 1. Logic Diagram n POWERFUL X86 PROCESSOR n 64-BIT 64-BIT 64-BIT 64-BIT BUS which controls the TFT panel. The TFT interface is designed to support the connection of this control 's peripherals. As a result many of the external pin connections are made directly to the on-chip peripheral listing of the STPC Indus- trial package pin location physical connection. Please refer to the pin connection to the STPC In- dustrial using ISACLK and ISACLKX2 as the input selection strobes. Note that www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6377.htm |
STMicroelectronics | 20/10/2000 | 103.85 Kb | HTM | 6377.htm |