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74 LS 00 Logic Gates

Catalog Datasheet Results Type PDF Document Tags
Abstract: Signetics I 7410, 7411, LS10, LS11, S10, S11 Gates I Triple Three-Input NAND ('10), AND ('11) Gates Product Specification Logic Products TYPE 7410 74LS10 74LS10 74S10 74S10 7411 74LS11 74LS11 74S11 74S11 TYPICAL , 5 -3 1 Signetics Logic Products Product Specification Gates 7410, 7411, LS10, LS11, S10 , Signetics Logic Products Product Specification Gates 7410, 7411, LS10, LS11, S10, S11 AC , INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS A -C Y NOTE: Where a 74 unit load (ul) is understood ... OCR Scan
datasheet

4 pages,
97.33 Kb

7411 74LS11 TTL 7410 ttl pin configuration of 7410 74LS10 function table 7410 SIGNETICS PIN CONFIGURATION 7411 TTL 7410 AND propagation delay PIN CONFIGURATION 74ls10 7410 pin configuration 74LS10 pin configuration TTL 7410 LS 7411 datasheet abstract
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Abstract: Signetics 7413, LS13 Gates Dual 4-Input NAND Schmitt Trigger Product Specification Logic , S ignetics Logic Products Product S pe cifica tio n Gates 7413, LS13 ABSOLUTE MAXIMUM , ,3 V fo r 7 4 LS; V y = 1,5 V fo r all o th e r T T L fa m ilie s. Test Circuit For 74 Totem-Pole , Signetics Logic Products Product S p ecification Gates 7413, LS13 DC ELECTRICAL CHARACTERISTICS , WAVEFORM H = HIGH voltage level L = LOW voltage level X = D o n't care Vm = 1.3V fo r 74 LS ; Vm = ... OCR Scan
datasheet

4 pages,
120.74 Kb

ls 7413 n 74 LS 00 Logic Gates TTL LS 7413 datasheet abstract
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Abstract: Gates FAST AND LS TTL DATA 1-3 Clock Edge No. LS Pos Pos Neg Neg Neg Neg 74 , good output drive capability. Motorola offers two modern TTL logic families - LS and FASTTM. They , Hex Exclusive OR Gates Type of Output No. LS FAST Description 2S OC 04 05 , SSI Flip-Flops OR Gates Description Description Type of Output No. LS FAST , Selection Information FAST/LS TTL FAST AND LS TTL 1 GENERAL INFORMATION TTL in ... Original
datasheet

6 pages,
81.61 Kb

74 LS 00 Nand Gates LS 273 4-bit even parity checker ls 7400 258B SG 73a SG-60 transistor 569a 257B 74fXXX 74LSxx LS 373 LS TTL family characteristics 74lsxxx datasheet abstract
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Abstract: Output 74 1ul 10ui 74S 1Sul 10Sul 74 LS 1 LSul 10LSul PIN CONFIGURATION LOGIC SYMBOL , -13 11 LS 05720S 05720S December 4, 1985 5-132 853-0578 81501 Signetics Logic Products , December 4, 1985 5-133 Signetics Logic Products P roduct S pe cifica tio n Gates 7486, LS86 , Signetics I 7486, LS86, S8" Gates Quad Two-Input Exclusive-OR Gate Product Specification Logic Products TYPE 7486 74LS86 74LS86 74S86 74S86 TYPICAL PROPAGATION DELAY 14ns 10ns 7ns TYPICAL SUPPLY ... OCR Scan
datasheet

3 pages,
156.74 Kb

TTL 7486 74LS86 TTL 74 LS 00 Logic Gates 7486 TTL datasheet abstract
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Abstract: DESCRIPTION Inputs Output 74 1ul 10ul 74S 1SuI 1QSul 74LS 1LSul 10LSul PIN CONFIGURATION LOGIC , Logic Products Product Specification Gates 7451, LS51, S51 ABSOLUTE MAXIMUM RATINGS , + 1 2 5 °C only. TEST CIRCUITS AND WAVEFORMS WF064S WF064S 0S V m = 1.3V fo r 74 LS ; V m = 1.5V fo r , ~ V- - v _ v OUT - V VM % W F 0 7 5 7 0 S V u - 1.3V fo r 74 LS ; VM- , Signetics 7451, LS51, S51 Gates '51, 'S51 Dual 2-Wide 2-Input AND-OR-lnvert Gate LS51 Dual ... OCR Scan
datasheet

3 pages,
165.07 Kb

74 LS 00 Logic Gates ic 7451 pin configuration datasheet abstract
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Abstract: Signetics I 7408, LS08, S08 Gates Logic Products Quad Two-Input AND Gate Product Specification , Logic Products Product Specification Gates 7408, LS08, S08 ABSOLUTE MAXIMUM RATINGS (Over operating , 74 3.0V 1MHz 500ns 7ns 7ns 74 LS 3.0V 1MHz 500ns 15ns 6ns 74S 3.0V 1MHz 500ns 2.5ns 2.5ns December , PARAMETER TEST CONDITIONS 74 74 LS 74S UNIT CL = 15pF, Rl = 400Í2 CL = 15pF, Rl = 2kii CL = 15pF, Rl , OUTPUT LOADING AND FAN-OUT TABLE PINS DESCRIPTION 74 74S 74LS A, B Inputs 1ul 1Sul 1LSul Y Output 10ul ... OCR Scan
datasheet

3 pages,
84.61 Kb

74LS08 fan-out 74LS 7408 7408 ttl family 7408 DIP 7408 74S08 74ls08 74 LS 00 Logic Gates 3- input 7408 7408 pin configuration 74LS08 pin configuration TTL 7408 AND propagation delay 74LS08 signetics PIN CONFIGURATION OF 74LS08 logic symbol 74LS08 datasheet abstract
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Abstract: 10 FANOUT ( -5 5 °C TO +125°C) LOGIC 1/LOGIC 0 DRIVING GATES 54 54 54 L 54 LS DRIVEN GATES 10/10 40 , 1 o u tp u t a t a tim e. S54 Series 54/74 Logic Family The 54/74XX 54/74XX logic family is medium speed , 54/74 logic is defined in terms of standard POSITIVE LOGIC using the following definitions: LOW , are specified as positive values. 54/74 Logic Each input of the multiple-emitter input transistor that , ; therefore, one load (N = 1) for 54/74 logic is -1.6 mA maximum. Each input requires current into the input ... OCR Scan
datasheet

9 pages,
472.11 Kb

74LS00 fan out 74LS04 Fan Out IC 7400 nand function IC NAND GATE 7400 IC TTL 7400 7400 family jk 7474 ls 7400 TTL counters 7400 series TTL 74ls74 noise margin ic 74LS04 signetics 8280 7400 signetics TTL datasheet abstract
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Abstract: Signetics I 7486, LS86, S86 Gates Logic Products Quad Two-Input Exclusive-OR Gate Product , DESCRIPTION 74 74S 74 LS A, B Inputs 1 ul 1Sul 1 LSul Y Output 10ul 10Sul 10LSul Where a 74 unit load (ul , Manufacturer Signetics Logic Products Product Specification Gates 7486, LS86, S86 ABSOLUTE MAXIMUM RATINGS (Over operating tree-air temperature range unless otherwise noted.) PARAMETER 74 74LS 74S UNIT Vcc , 74LS unit load (LSul) is 20/uA l,H and -0.4mA l,L. PIN CONFIGURATION LOGIC SYMBOL LOGIC SYMBOL ... OCR Scan
datasheet

3 pages,
85.87 Kb

74LS 74ls gate symbols 74ls ttl 132 74LS86 74S86 LS86 N7486N N74LS86D N74LS86N 1N916 OH 5134 N74S86N N74S86D pin configuration 7486 datasheet abstract
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Abstract: Signetics 7432, LS32, S32 Gates Quad Two-Input OR Gate Product Specification Logic Products , ) December 4, 1985 5-64 853-0555 81501 Signetics Logic Products Product Specification Gates , INPUT PULSE REQUIREMENTS FAMILY Amplitude 74 74 LS 74S 3.0V 3.0V 3.0V Rep. Rate 1MHz 1MHz 1MHz Pulse , Signetics Logic Products Product Specification Gates 7432, LS32, S32 DC ELECTRICAL , Outputs AC ELECTRICAL CHARACTERISTICS TA = 25°C, v 00 - 5.0V 74 74LS CL = 15pF, RL = 2kH Min Max ... OCR Scan
datasheet

3 pages,
83.78 Kb

pin configuration of ic 74ls32 propagation delay in IC TTL 7432 7432 signetics the pin function of ic 7432 TTL 7432 NOT propagation delay ic 74LS32 ttl Fanout value of IC 7432 7432 ls ls 7432 IC 7432 for or gate 7432 ic datasheet abstract
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Abstract: Signetics 74LS260 74LS260, S260 Gates Dual 5-Input NOR Gate Product Specification Logic Products , W F07S70S F07S70S = 1.3V fo r 74 LS ; V ^ = 1.5V fo r all o th e r T T L fa m ilies. Waveform 1. Waveform For inverting Outputs TEST CIRCUITS AND WAVEFORMS V y = 1.3V fo r 74 LS ; V y = 1.5V fo r , CONFIGURATION LOGIC SYMBOL LOGIC SYMBOL (IEEE/IEC) j _ »1 ^ 5 2 3 12 13 8 9 10 11 4 6 LS03060S LS03060S December 4, 1985 5-458 853-0469 81500 Signetics Logic Products Product S p ... OCR Scan
datasheet

3 pages,
139.66 Kb

74LS260 74LS260 abstract
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Datasheet Content (non pdf)

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Over 1.1 million files (1986-2014): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer.
 
* * PAL20RP4B PAL20RP4B PAL20RP4B PAL20RP4B Programmable Logic Device * * A4N25 A4N25 A4N25 A4N25 optocoupler Coupled, unequal, lumped T-section tline * P/LS Uncoupled (single), lumped tline /DATA SELECTOR 8-1 LINE * 7400 Quadruple 2-input Positive-Nand Gates * 7401 Quadruple 2-input Positive-Nand Gates with * Open-Collector Outputs * 7402 Quadruple 2-input Positive-Nor Gates * 7403
www.datasheetarchive.com/files/spicemodels/misc/eval.lib
Spice Models 20/12/2001 295.35 Kb LIB eval.lib
DECODER BCD-DECIMAL 4-10 LINE * * TTL LOGIC STANDARD TTL, S, LS DATA BOOK, APR 1988, TI * JLS 7-30-92 * 7446A DECODER/DRIVER BCD-7 SEGMENT WITH OPEN COLLECTOR OUTPUTS * * TTL LOGIC STANDARD TTL, S, LS DATA *- * 7448 DECODER/DRIVER BCD-7 SEGMENT WITH INTERNAL PULLUPS * * TTL LOGIC STANDARD TTL, S, LS * Library of Standard 74 TTL Family Digital Models * * Copyright Cadence Design Systems, Inc. * 7400 Quadruple 2-input Positive-Nand Gates * * The TTL Data Book, Vol 2, 1985, TI * tdn 06/23
www.datasheetarchive.com/files/spicemodels/misc/7400.lib
Spice Models 19/12/2001 282.17 Kb LIB 7400.lib
DECODER BCD-DECIMAL 4-10 LINE * * TTL LOGIC STANDARD TTL, S, LS DATA BOOK, APR 1988, TI * JLS 7-30-92 * 7446A DECODER/DRIVER BCD-7 SEGMENT WITH OPEN COLLECTOR OUTPUTS * * TTL LOGIC STANDARD TTL, S, LS DATA *- * 7448 DECODER/DRIVER BCD-7 SEGMENT WITH INTERNAL PULLUPS * * TTL LOGIC STANDARD TTL, S, LS * Library of Standard 74 TTL Family Digital Models * * Copyright OrCAD, Inc. 1998 All Rights *- * 7400 Quadruple 2-input Positive-Nand Gates * * The TTL Data Book, Vol 2, 1985, TI * tdn
www.datasheetarchive.com/files/spicemodels/misc/spice_model_cd/mixed part list/spice-models-collection/7400.lib
Spice Models 29/07/2012 282.15 Kb LIB 7400.lib
- * Quad 2-Input Nand Gates * * The TTL Logic Data Book, 1988, TI Pages 2-3 to 2-7 * bss 2 * - 74ALS00A 74ALS00A 74ALS00A 74ALS00A - * Quad 2-Input Nand Gates * * The ALS/AS Logic Data Book, 1986, TI Pages 2-3 * * * - 74AS00 74AS00 74AS00 74AS00 - * Quad 2-Input Nand Gates * * The ALS/AS Logic Data Book, 1986, TI Pages 2-3 to 2-Input Nand Gates * * The High-Speed CMOS Logic Data Book, 1989, TI Pages 2-3 to 2-5 * bss 2/3/94 * - 74HCT00 74HCT00 74HCT00 74HCT00 - * Quad 2-Input Nand Gates * * The High-Speed CMOS Logic Data Book, 1989, TI
www.datasheetarchive.com/files/spicemodels/misc/modelos/spice_complete/dig000.lib
Spice Models 18/04/2010 473.91 Kb LIB dig000.lib
No abstract text available
www.datasheetarchive.com/download/49127042-847939ZC/gr-v1.zip (REG.TXT)
STMicroelectronics 16/12/1998 632.06 Kb ZIP gr-v1.zip
Figure 1. Logic Diagram n POWERFUL X86 PROCESSOR n 64-BIT 64-BIT 64-BIT 64-BIT 66MHz BUS INTERFACE n 64-BIT 64-BIT 64-BIT 64-BIT DRAM CONTROLLER n n Three 8254 compatible Timer/Counters. n Co-processor error support logic. n Power Management n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 7.4 FAST CPU RESET AND FAST GATE A20: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 7.5 ISA . . . . . . . . 89 7.4 BUS MASTER IDE REGISTER DESCRIPTION . . . . . . . . . . . . . . . . . . . .
www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6375-v1.htm
STMicroelectronics 02/04/1999 468.89 Kb HTM 6375-v1.htm
Figure 1. Logic Diagram n POWERFUL X86 PROCESSOR n 64-BIT 64-BIT 64-BIT 64-BIT 66MHz BUS INTERFACE n 64-BIT 64-BIT 64-BIT 64-BIT DRAM CONTROLLER n n Three 8254 compatible Timer/Counters. n Co-processor error support logic. n Power Management n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 7.4 FAST CPU RESET AND FAST GATE A20: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 7.5 ISA . . . . . . . . 89 7.4 BUS MASTER IDE REGISTER DESCRIPTION . . . . . . . . . . . . . . . . . . . .
www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6375-v2.htm
STMicroelectronics 14/06/1999 468.85 Kb HTM 6375-v2.htm
No abstract text available
www.datasheetarchive.com/download/71733749-609099ZC/ncp1203i.zip (onic.lib)
On Semiconductor 10/08/2006 90.8 Kb ZIP ncp1203i.zip
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-4 7.1.1 Interrupt .7-4 7.1.2 Interrupt Request / Control Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-13 7.4 External logic symbol of the C515. Figure 1-1 C515 Functional Units MCA03198 MCA03198 MCA03198 MCA03198 On-Chip Emulation Support 64K byte external data memory l 256 byte on-chip RAM l On-chip emulation support logic (Enhanced Hooks
www.datasheetarchive.com/files/infineon/mc_data/dave/products/c515.dip!/c515/documents/m515.pdf
Infineon 01/02/2000 3505.45 Kb DIP c515.dip
. . .7-4 7.1.1 Interrupt Enable Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7-4 7.1.2 Interrupt Request / Control Flags . . . . . . . . . . . . . . . . . . . . . . . . . . .7-13 7.4 External Interrupts . . . . . . . . . . . . . . . . . . . . . shows the different functional units of the C515A C515A C515A C515A and figure 1-2 shows the simplified logic symbol of external data memory • 256 byte on-chip RAM • 1K byte on-chip RAM (XRAM) • On-chip emulation support logic
www.datasheetarchive.com/files/infineon/mc_data/dave/products/c515a.dip!/c515a/documents/m515a.pdf
Infineon 01/02/2000 4817.77 Kb DIP c515a.dip