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TTL-LOGIC-DATABOOK Texas Instruments TTL-LOGIC-DATABOOK
TMDXL138LOGICEXP Texas Instruments OMAP-L138 Experimenter Kit
TMDX138LOGICEXP Texas Instruments OMAP-L138 Experimenter Kit
CDB1600-120W Cirrus Logic DEVELOPMENT BOARD FOR CS1600
CS2000CP-DZZ Cirrus Logic PHASE LOCKED LOOP, 30MHz, PDSO10, 3 MM, LEAD FREE, MO-187, MSOP-10
CS2000CP-CZZR Cirrus Logic Phase Locked Loop, Hybrid, PDSO10, 3 MM, LEAD FREE, MO-187, MSOP-10

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74 LS 00 Logic Gates

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: Signetics 7413, LS13 Gates Dual 4-Input NAND Schmitt Trigger Product Specification Logic , S ignetics Logic Products Product S pe cifica tio n Gates 7413, LS13 ABSOLUTE MAXIMUM , ,3 V fo r 7 4 LS; V y = 1,5 V fo r all o th e r T T L fa m ilie s. Test Circuit For 74 Totem-Pole , Signetics Logic Products Product S p ecification Gates 7413, LS13 DC ELECTRICAL CHARACTERISTICS , H = HIGH voltage level L = LOW voltage level X = D o n't care Vm = 1.3V fo r 74 LS ; Vm = 1.5V fo -
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TTL LS 7413 schmitt trigger 7413 ls 7413 n 74LS13 N7413N N74LS13N OP01670S P016B0S
Abstract: Signetics I 7410, 7411, LS10, LS11, S10, S11 Gates I Triple Three-Input NAND ('10), AND ('11) Gates Product Specification Logic Products TYPE 7410 74LS10 74S10 7411 74LS11 74S11 TYPICAL , 5 -3 1 Signetics Logic Products Product Specification Gates 7410, 7411, LS10, LS11, S10 , Signetics Logic Products Product Specification Gates 7410, 7411, LS10, LS11, S10, S11 AC , . INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS A -C Y NOTE: Where a 74 unit load (ul) is understood -
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TTL 7411 PIN CONFIGURATION 7410 TTL LS 7411 74LS11 function table LS 7411 74LS10 pin configuration N7410N N74LS10N N74S10N N7411N N74LS11N N74S11N
Abstract: families. TABLE 9 FANOUT (0°-70°C) LOGIC 1/LOGIC 0 DRIVING GATES 74 74 74L 74LS DRIVEN GATES 10/10 40/89 , 1 o u tp u t a t a tim e. S54 Series 54/74 Logic Family The 54/74XX logic family is medium speed , 54/74 logic is defined in terms of standard POSITIVE LOGIC using the following definitions: LOW , are specified as positive values. 54/74 Logic Each input of the multiple-emitter input transistor that , ; therefore, one load (N = 1) for 54/74 logic is -1.6 mA maximum. Each input requires current into the input -
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rs flip-flop IC 7400 74ls105 TTL LS 7400 74LS series logic gates 7400 fan-out 74LS 3 input AND gate
Abstract: Signetics I 7408, LS08, S08 Gates Logic Products Quad Two-Input AND Gate Product , Manufacturer Signetics Logic Products Product Specification Gates 7408, LS08, S08 ABSOLUTE MAXIMUM RATINGS , Amplitude Rep. Rate Pulse Width *tlh *thl 74 3.0V 1MHz 500ns 7ns 7ns 74 LS 3.0V 1MHz 500ns 15ns 6ns 74S , Manufacturer Signetics Logic Products Product Specification Gates 7408, LS08, S08 DC ELECTRICAL , ELECTRICAL CHARACTERISTICS TA = 25°C, Vcc = 5.0V PARAMETER TEST CONDITIONS 74 74 LS 74S UNIT CL = -
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TTL 7408 TTL LS 7408 7408 AND GATE ls 7408 3 input and gate 7408 7408 74LS08 74S08 N7408N N74LS08N N74S08N
Abstract: Output 74 1ul 10ui 74S 1Sul 10Sul 74 LS 1 LSul 10LSul PIN CONFIGURATION LOGIC SYMBOL , -13 11 LS 05720S December 4, 1985 5-132 853-0578 81501 Signetics Logic Products , December 4, 1985 5-133 Signetics Logic Products P roduct S pe cifica tio n Gates 7486, LS86 , Signetics I 7486, LS86, S8Ó Gates Quad Two-Input Exclusive-OR Gate Product Specification Logic Products TYPE 7486 74LS86 74S86 TYPICAL PROPAGATION DELAY 14ns 10ns 7ns TYPICAL SUPPLY -
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TTL 7486 7486 TTL 74LS86 TTL ls 7486 TTL 7486 AND propagation delay N7486N N74LS86N N74S86N N74LS86D N74S86D
Abstract: Signetics 74LS260, S260 Gates Dual 5-Input NOR Gate Product Specification Logic Products , W F07S70S = 1.3V fo r 74 LS ; V ^ = 1.5V fo r all o th e r T T L fa m ilies. Waveform 1. Waveform For inverting Outputs TEST CIRCUITS AND WAVEFORMS V y = 1.3V fo r 74 LS ; V y = 1.5V fo r , CONFIGURATION LOGIC SYMBOL LOGIC SYMBOL (IEEE/IEC) j _ »1 ^ 5 2 3 12 13 8 9 10 11 4 6 LS03060S December 4, 1985 5-458 853-0469 81500 Signetics Logic Products Product S p -
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74S260 SO-14 N74S260N N74LS260N N74LS260D N74S260D
Abstract: . DESCRIPTION Inputs Output 74 1ul 10ul 74S 1SuI 1QSul 74LS 1LSul 10LSul PIN CONFIGURATION LOGIC , Logic Products Product Specification Gates 7451, LS51, S51 ABSOLUTE MAXIMUM RATINGS , + 1 2 5 °C only. TEST CIRCUITS AND WAVEFORMS WF064S 0S V m = 1.3V fo r 74 LS ; V m = 1.5V fo r , ~ V- - v _ v OUT - V VM % W F 0 7 5 7 0 S V u - 1.3V fo r 74 LS ; VM , Signetics 7451, LS51, S51 Gates '51, 'S51 Dual 2-Wide 2-Input AND-OR-lnvert Gate LS51 Dual 2 -
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ic 7451 pin configuration 74LS51 74S51 N7451N N74LS51N N74S51N N74LS51D
Abstract: , VME · ALS, AS, F, LS, S, TTL Some logic families have been in the marketplace for years, the oldest , Instruments Logic Migration Overview Gates and Octals 5-V Bipolar Families 5-V CMOS Families , Logic Guide www.ti.com/logic 3Q 2009 2 Logic Guide 2009 Important Notice , dsp.ti.com Interface interface.ti.com Logic logic.ti.com Power Mgmt power.ti.com , /wireless Mailing Address: Logic Guide Automotive Video and Imaging Resale of TI Texas Instruments
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cd40001 SN74AHC2G russian transistor cross-reference CD4000 SERIES BOOK NXP 74LVC1G datasheet IC CD 40106
Abstract: , GTL, GTLP, JTAG, I2C, VME · ALS, AS, F, LS, S, TTL Some Logic families have been in the marketplace , products. Logic Selection Guide AHC 20 Gates and Octals . . . . . . . . . . . . . . . . . . . . , Instruments Logic Selection Guide 2007 Gates and Octals 5-V (and Up) CMOS Family 5-V Bipolar , Enable 377 Product Index LS 2G79 Dual Edge Triggered 19 FCT 74 Dual , -Input Buffers/Drivers 809 Configurable Gates DESCRIPTION TYPE TECHNOLOGY CD4K LS Texas Instruments
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FB 3306 pcf 817 BR 8550 sn 16861 7 SEGMENT DISPLAY cd 4511 pcf 9555
Abstract: Signetics I 7486, LS86, S86 Gates Logic Products Quad Two-Input Exclusive-OR Gate Product , PINS DESCRIPTION 74 74S 74 LS A, B Inputs 1 ul 1Sul 1 LSul Y Output 10ul 10Sul 10LSul Where a 74 , Respective Manufacturer Signetics Logic Products Product Specification Gates 7486, LS86, S86 ABSOLUTE , Manufacturer Signetics Logic Products Product Specification Gates 7486, LS86, S86 DC ELECTRICAL , -2.0mA l,Ll and a 74LS unit load (LSul) is 20/uA l,H and -0.4mA l,L. PIN CONFIGURATION LOGIC SYMBOL -
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7486 PIN CONFIGURATION pin configuration of 7486 7486 7486 signetics pin configuration 7486 LS86 WF07580S
Abstract: Signetics 7432, LS32, S32 Gates Quad Two-Input OR Gate Product Specification Logic Products , ) December 4, 1985 5-64 853-0555 81501 Signetics Logic Products Product Specification Gates , INPUT PULSE REQUIREMENTS FAMILY Amplitude 74 74 LS 74S 3.0V 3.0V 3.0V Rep. Rate 1MHz 1MHz 1MHz Pulse , Signetics Logic Products Product Specification Gates 7432, LS32, S32 DC ELECTRICAL , Outputs AC ELECTRICAL CHARACTERISTICS TA = 25°C, v 00 - 5.0V 74 74LS CL = 15pF, RL = 2kH Min Max -
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ic ttl 7432 IC 7432 ls 7432 IC pin configuration ttl 7432 TTL 7432 OR propagation delay 7432 or gate ic 74LS32 74S32 N7432N N74LS32N N74S32N N74LS32D
Abstract: good output drive capability. Motorola offers two modern TTL logic families - LS and FASTTM. They , Hex Exclusive OR Gates Type of Output No. LS FAST Description 2S OC 04 05 , SSI Flip-Flops OR Gates Description Description Type of Output No. LS FAST , FAST AND LS TTL DATA 1-3 Clock Edge No. LS Pos Pos Neg Neg Neg Neg 74 74A 113A , Selection Information FAST/LS TTL FAST AND LS TTL 1 GENERAL INFORMATION TTL in -
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Advanced Schottky Family 4 bit barrel shifter TTL 7400 74lsxxx 7400 ls LS 00 Logic Gates
Abstract: 7414 74 LS I 4 74 LS I 5 74S15 7416 7417 7420 74H20 74L20 74LS20 74S20 74H21 74LS21 74H22 , . x*' 54/74 SSI-SECTION 1 DM5400/DM7400 Quad 2-Input NAND Gates , 2503C 2504C 7400 74H00 74 LOO 74LS00 '' 74S00 7401 74H01 74L01 74LS01 7402 74L02 74LS02 v , 7447A 74 LS4 7r 7448 74LS48 74LS49 7450 74H50 7451 74H51 74L51 74LS51 74S51 74H52 7453 , 74LS191 74192 74L192 74LS192 74193 74L193 74LS193 74194 74LS194A 74S194 74195 74 L S I 95 A -
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dm8130 7486 ic truth table KS 2102 DM8601 DM74LS76 DM74367 54H00 54L00 54LS00 54H01 54L01 54LS01
Abstract: NO. 2-3 74 5-7 A0V â'¢ Triple 3-Input Gates PAGE ABV â'¢ 00 BOOK' 5-30 , DESCRIPTION TYPE S T B â'™05 TTl â'¢ â'™03 '12 Dual 4-Input Gates â'™22 LS S â , '¢ '0 6 Triule 3-Input Gates S ABV â'¢ Quadruple 2-Input Gates LS CF A '8 0 0 , -Input Gates Triple 3-Input Gates TYPE STD '0 9 TTL â'¢ AS H LS S â'¢ ALS â , TTl Hex 2-lnput Gates 832 32 â'¢ LS S BBOKt PAGE NO. AQV â'¢ â'¢ â -
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74aLS808 74ALS468 74ALS677 74ALS879 74ls631 NCE 7190 ALS1032 AS1032 ALS1034 AS1034 ALS1035 AS1036
Abstract: % faster than Standard Device Resources User l/O s CPGA Logic Modules Gates 176-p in A1280 , Features â'¢ Up to 2000 Gate Array Gates (6000 PLD/LCAâ"¢ equivalent gates) â'¢ Replaces up to 53 TTL , Logic Module Architecture â'¢ Up to 547 Logic Modules â'¢ Up to 273 Flip-Flops â'¢ Two In-Circuit , â'¢ I/O Drive to 4 mA â'¢ Nonvolatile, User Programmable â'¢ Logic Fully Tested Prior to Shipment â'¢ Up to 8000 Gate Array Gates (20,000 PLD/LCAâ"¢ equivalent gates) â'¢ Replace up to 210 TTL -
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A1240 A1010A 172-P
Abstract: Ideal fo r replacem ent o f LS/S TTL logic in medium-and high-speed systems. IC count can be reduced by , Inverter (IVP) Internal P ull-up (PU I) Internal P ull-dow n (P D h LOGIC GATES 2-Input NAND (ND2) 2 , 8.1 11.8 0.0 2.0 8.0 13.4 7.0 10.2 2.0 0.5 3 S-R Latch w ith Separate Input Gates, Set D irect , logic functions such as 2-, 3-, or 4-input NAND gates, 2 - o r 4-input NOR gates, ou tput buffers with , va riety o f logic elements such as excluslve-OR gates o r flip flops using unique metal -
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ITT 7400 PA50000 PA52200Q PA56000
Abstract: controllers and intelligent support chips. It is also ideal fo r replacement o f LS/S TTL logic in medium-and , Power Inverter ( IVP I Internal Pull-up ( PUII Internal P ull-dow n (PDI ) tP H L LOGIC GATES 2 , S-R Latch w ith Separate Input Gates, Set D irect and Reset Direct |LS R 1} tP H L D Latch w , f logic functions such as 2-, 3-, or 4-input NAND gates, 2 - o r 4-input NOR gates, output buffers , can be configured into a va­ riety of logic elements such as exclusive-OR gates or flip flops using -
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PA52200
Abstract: Symbol and Logic Diagram 00 Suffix-Blank : Plastic Dual In Line Package Suffix-J : Ceram ic Dual , GD54/74HC00, GD54/74HCT00 QUAD 2-INPUT NAND GATES General Description These devices are identical in pinout to the 54/74LS00. They contain four independent 2-input NAND gates. These devices are , Features â'¢ Low Power consumption characteristic of CMOS devices â'¢ Output drive capability: 10 LS TTL Loads Min. â'¢ Operating speed superior to LS TTL â'¢ Wide operating voltage range: for HC 2 to 6 -
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Abstract: NAND Gates Type of Description Output No. LS ALS FAST Quad 2-lnput 2S 00 X X X OC 01 X X , output drive capability. Motorola offers three Schottky clamped TTL logic families â'" LS, ALS, and , Characteristics for Schottky TTL Logic (ALL MAXIMUM RATINGS) LS ALS FAST Characteristic Symbol 54LSxxx , to automatically interconnect these elements forming SSI/MSI logic cells (rather than simple gates , -lnput 2S 86 X X OC 136 X 2S 386 X AND Gates Type of Description Output No. LS ALS FAST -
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ic 74 LS 138 DECODER Alu 181 8 bit bcd adder/subtractor lal 2084 f245 motorola TTL 74-series IC LIST SG60R4
Abstract: performance for counters, data path, state machines, arithmetic, and random logic â'¢ High usable density â'" 24 x 32 array of 768 logic cells pro­ vides 24,000 total available gates â'" 8,000 typically usable â'gate arrayâ' gates in 144-pin TQFP and 208-pin PQFP â'¢ Fully 3.3V PCI compliant inputs and , 80 MHz consumes 25 mA Flexible logic cell architecture â'" Wide fan-in (up to 14 input gates) â , up to 100 percent of logic resources â'" No hand routing required 5V tolerant Inputs (see Im spec -
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CY7C3387P CY7C3388P 7C3387P 7C3388P 144-P CY7C3387P-1AC
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