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72T20118 Datasheet

Part Manufacturer Description PDF Type
72T20118 Integrated Device Technology 128K x 20-256K x 10 TeraSync DDR FIFO, 2.5V Original

72T20118

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: DESCRIPTION: The IDT72T2098/72T20108/72T20118/72T20128 are exceptionally deep, extremely high speed, CMOS , be selected independent of one another. The IDT72T2098/72T20108/72T20118/72T20128 are fabricated , , x10) DATA IN (D0 - Dn) OUTPUT ENABLE (OE) IDT 72T2098 72T20108 72T20118 72T20128 READ CHIP , The IDT72T2098/72T20108/72T20118/72T20128 support two different timing modes of operation: IDT , D-1. IDT72T2098, 72T20108, 72T20118, 72T20128 FSEL1 H L H L FSEL0 H H L L Integrated Device Technology
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IDT72T20108 IDT72T20118 IDT72T20128 20-BIT/10-BIT 250MH 110MH
Abstract: RANGES DESCRIPTION: The IDT72T2098/72T20108/72T20118/72T20128 are exceptionally deep, extremely high , selected independent of one another. The IDT72T2098/72T20108/72T20118/72T20128 are fabricated using IDT , RESET (MRS) READ CLOCK (RCLK) READ ENABLE (REN) OUTPUT ENABLE (OE) IDT 72T2098 72T20108 72T20118 , IDT72T2098/72T20108/72T20118/72T20128 support two different timing modes of operation: IDT Standard mode or , , 72T20108, 72T20118, 72T20128 FSEL1 H L H L NOTES: 1. n = empty offset for PAE. 2. m = full offset for PAF Integrated Device Technology
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BB208-1
Abstract: RANGES DESCRIPTION: The IDT72T2098/72T20108/72T20118/72T20128 are exceptionally deep, extremely high , selected independent of one another. The IDT72T2098/72T20108/72T20118/72T20128 are fabricated using IDT , RESET (MRS) READ CLOCK (RCLK) READ ENABLE (REN) OUTPUT ENABLE (OE) IDT 72T2098 72T20108 72T20118 , IDT72T2098/72T20108/72T20118/72T20128 support two different timing modes of operation: IDT Standard mode or , , 72T20108, 72T20118, 72T20128 FSEL1 H L H L NOTES: 1. n = empty offset for PAE. 2. m = full offset for PAF Integrated Device Technology
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Abstract: loaded via the Serial Input DESCRIPTION: The IDT72T2098/72T20108/72T20118/72T20128 are exceptionally , be selected independent of one another. The IDT72T2098/72T20108/72T20118/72T20128 are fabricated , ) OUTPUT ENABLE (OE) IDT 72T2098 72T20108 72T20118 72T20128 READ CHIP SELECT (RCS) READ SINGLE , /72T20108/72T20118/72T20128 support two different timing modes of operation: IDT Standard mode or First , Master Reset. Valid programming ranges are from 0 to D-1. IDT72T2098, 72T20108, 72T20118, 72T20128 Integrated Device Technology
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Abstract: IDT72T2098/72T20108/72T20118/72T20128 are exceptionally deep, extremely high speed, CMOS First-In-First-Out , selected independent of one another. The IDT72T2098/72T20108/72T20118/72T20128 are fabricated using IDT , RESET (MRS) READ CLOCK (RCLK) READ ENABLE (REN) OUTPUT ENABLE (OE) IDT 72T2098 72T20108 72T20118 , IDT72T2098/72T20108/72T20118/72T20128 support two different timing modes of operation: IDT Standard mode or , , 72T20108, 72T20118, 72T20128 FSEL1 H L H L NOTES: 1. n = empty offset for PAE. 2. m = full offset for PAF Integrated Device Technology
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Abstract: COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES DESCRIPTION: The IDT72T2098/72T20108/72T20118/72T20128 are , selected independent of one another. The IDT72T2098/72T20108/72T20118/72T20128 are fabricated using IDT , RESET (MRS) READ CLOCK (RCLK) READ ENABLE (REN) OUTPUT ENABLE (OE) IDT 72T2098 72T20108 72T20118 , IDT72T2098/72T20108/72T20118/72T20128 support two different timing modes of operation: IDT Standard mode or , , 72T20108, 72T20118, 72T20128 FSEL1 H L H L NOTES: 1. n = empty offset for PAE. 2. m = full offset for PAF Integrated Device Technology
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Abstract: loaded via the Serial Input DESCRIPTION: The IDT72T2098/72T20108/72T20118/72T20128 are exceptionally , be selected independent of one another. The IDT72T2098/72T20108/72T20118/72T20128 are fabricated , ) OUTPUT ENABLE (OE) IDT 72T2098 72T20108 72T20118 72T20128 READ CHIP SELECT (RCS) READ SINGLE , FIRST WORD FALL THROUGH (FWFT) MODE The IDT72T2098/72T20108/72T20118/72T20128 support two different , D-1. IDT72T2098, 72T20108, 72T20118, 72T20128 FSEL1 H L H L FSEL0 H H L L Integrated Device Technology
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Abstract: /72T20108/72T20118/72T20128 are exceptionally deep, extremely high speed, CMOS First-In-First-Out (FIFO , LVTTL mode, but cannot be selected independent of one another. The IDT72T2098/72T20108/72T20118/72T20128 , 72T20108 72T20118 72T20128 READ CHIP SELECT (RCS) READ SINGLE DATA RATE (RSDR) (x20, x10) DATA OUT (Q0 - , /72T20108/72T20118/72T20128 support two different timing modes of operation: IDT Standard mode or First Word , , 72T20108, 72T20118, 72T20128 FSEL1 H L H L NOTES: 1. n = empty offset for PAE. 2. m = full offset for PAF Integrated Device Technology
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072-m
Abstract: -0048-01 (Rev. 01) 07/26/01 Page 1 of 1 Refer to: QCA-1795 Devices 72T2098/72T20108/72T20118/72T20128 Integrated Device Technology
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40118 40108 FEN-03-04 72T2098/20108/20118/20128 72T4088/4098/40108/40118 FRA-0048-01 72T2098/72T20108/72T20118/72T20128
Abstract: /72T20118/72T20128 are exceptionally deep, extremely high speed, CMOS First-In-First-Out (FIFO) memories , be selected independent of one another. The IDT72T2098/72T20108/72T20118/72T20128 are fabricated , ) OUTPUT ENABLE (OE) IDT 72T2098 72T20108 72T20118 72T20128 READ CHIP SELECT (RCS) READ SINGLE , FIRST WORD FALL THROUGH (FWFT) MODE The IDT72T2098/72T20108/72T20118/72T20128 support two different , D-1. IDT72T2098, 72T20108, 72T20118, 72T20128 FSEL1 H L H L FSEL0 H H L L Integrated Device Technology
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Abstract: IDT72T2098/72T20108/72T20118/72T20128 are exceptionally deep, extremely high speed, CMOS First-In-First-Out , be selected independent of one another. The IDT72T2098/72T20108/72T20118/72T20128 are fabricated , , x10) DATA IN (D0 - Dn) OUTPUT ENABLE (OE) IDT 72T2098 72T20108 72T20118 72T20128 READ CHIP , (FWFT) MODE The IDT72T2098/72T20108/72T20118/72T20128 support two different timing modes of operation , D-1. IDT72T2098, 72T20108, 72T20118, 72T20128 FSEL1 H L H L FSEL0 H H L L Integrated Device Technology
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D13-T6 Q11-R14
Abstract: 72T40108 72T40118 72T2098 72T20108 72T20118 72T20128 Supply I/O (V) Levels (V)* 2.5 2.5 2.5 2.5 2.5 2.5 2.5 Integrated Device Technology
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208 BGA 240BGA 225MH 240-BGA 144-BGA 128K18 144-BB 208-BB
Abstract: DESCRIPTION: The IDT72T2098/72T20108/72T20118/72T20128 are exceptionally deep, extremely high speed, CMOS , be selected independent of one another. The IDT72T2098/72T20108/72T20118/72T20128 are fabricated , , x10) DATA IN (D0 - Dn) OUTPUT ENABLE (OE) IDT 72T2098 72T20108 72T20118 72T20128 READ CHIP , The IDT72T2098/72T20108/72T20118/72T20128 support two different timing modes of operation: IDT , D-1. IDT72T2098, 72T20108, 72T20118, 72T20128 FSEL1 H L H L FSEL0 H H L L Integrated Device Technology
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Abstract: IDT72T2098/72T20108/72T20118/72T20128 are exceptionally deep, extremely high speed, CMOS First-In-First-Out , LVTTL mode, but cannot be selected independent of one another. The IDT72T2098/72T20108/72T20118/72T20128 , 72T20108 72T20118 72T20128 READ CHIP SELECT (RCS) READ SINGLE DATA RATE (RSDR) (x20, x10) DATA OUT (Q0 - , THROUGH (FWFT) MODE The IDT72T2098/72T20108/72T20118/72T20128 support two different timing modes of , PROGRAMMABLE FLAG OFFSETS IDT72T2098, 72T20108, 72T20118, 72T20128 FSEL1 H L H L NOTES: 1. n = empty offset Integrated Device Technology
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Abstract: 2.5 3.3/2.5/1.8/1.5 500Mbps 208-BGA 128K20 256Kx10 2M 72T20118 2.5 3.3/2.5/1.8/1.5 , 72T20118 72T20128 Device 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 250 250 250 250 250 250 250 Integrated Device Technology
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TQFP 100 PACKAGE footprint TQFP 144 PACKAGE footprint bga 208 PACKAGE BGA and QFP Package 256X8 footprint tqfp 208 128K- 256K- 512K- 72V04 72V05 28-SO
Abstract: 723614L20PFI8 723614L20PQF 723614L20PQFI 72T20118L10BB 72T20118L4BB 72T20118L5BB 72T20118L6-7BB Integrated Device Technology
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MT 5388 BGA Broadcom 7019 BTS 6000 ericsson alcatel 1511 mux mobile switching center msc ericsson bts 6000 12-03/DS/DL/BAY/10K CORP-PSG-00123