NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: Board EN5360DC-EB EN5360DC-EB 7.0x8.7cm heavy copper board (2oz Cu outer layers 1 & 4, 1oz Cu inner layers 2 & 3 ... | Original |
8 pages, |
J-STD-020A IR probe EN5360DC EN5360 EN5360 abstract |
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| Abstract: to Pad 295) DUMMY = 70x80 OPEN WINDOW : OUTPAD = 29x46 INPAD = 44x46 DUMMY = 44x54 BUMP SIZE ... | Original |
36 pages, |
Y227 Y232 T66H0001A T66H0001A-Y Y240 Y148 y235 y104 y205 Y108 Y228 Y141 Y165 Y146 LR24 T66H0001A abstract |
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| Abstract: COLLECTOR-EMITTER VOLTAGE Vc B (V) § g PH « o E- 14r S 10- PC - Ta r INFINITE HEAT SINK 70X80X8« k£ HEAT ... | OCR Scan |
3 pages, |
2SC2231A 2SC2231 2SC2231 abstract |
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| Abstract: RWM6X22 RWM4X10 FPR73 RWM5X26 Resistors KKE 4 in Ceramic Case KKE 7 4.00 5 20 0.022-9.1K 7.0x8.0 20.0 0.8 7.00 ... | Original |
12 pages, |
z301 ZDA-0411 Wirewound Resistors 5 watt ceramic FPR 73/90 RWR80N MSP1B CA-5060 Type 300 Tubular Style PCB Mounting Wirewound Resistors 5 watt 685 35K kka hb RW 13x70 7107 cpl datasheet abstract |
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| Abstract: >k 70x8.75 mm2 ^ Tì^ y^/t" 10 U? ^Ìf'^T^. T V NP nxxVTr COfifC^O MUWWÌ^^n^. $ fc /i yfy^ogtu? (tìi t ... | OCR Scan |
9 pages, |
LA4520 LA4520 abstract |
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| Abstract: 70x80 100x130 250x250 500x500 1x1 2x2 Risetime ps;*ns 140 175 280 350 1,0 2.1 FWHM ps;*ns 200 250 400 ... | OCR Scan |
1 pages, |
datasheet abstract |
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| Abstract: chip. PAD SIZE : OUTPAD = 55x72(Pad 1 to Pad 160) INPAD = 70x72(Pad 161 to Pad 193) DUMMY = 70x80 ... | Original |
36 pages, |
Y160 Y147 T66H0002A-Y T66H0002A-AY T66H0002A Y148 T66H0002A abstract |
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| Abstract: 8x472j 330X260X485 330X260X485 25,000 25,000 30,000 6kg 70X110X355 70X110X355 2,000 AL05 30,000 10kg 70X85X265 ... | Original |
2 pages, |
A9A MARKING 8k2 j 5091 103J A 472J 8G 103 472J RESISTOR 472j datasheet abstract |
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| Abstract: Pad 160) INPAD = 70x72(Pad 161 to Pad 193) DUMMY = 70x80 OPEN WINDOW : OUTPAD = 29x46 INPAD = 44x46 ... | Original |
35 pages, |
Y160 T66H0002A-Y T66H0002A-AY T66H0002A 454105 Y107 pin diagram of ic 4066 T66H0002A abstract |
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| Abstract: Universal 4-Bit Shift Register 99T 69x82 MCC8301 MCC8301 MCC9301 MCC9301 BCD-to-Decimal Decoder 77H 70x85 MCC8304 MCC8304 MCC9304 MCC9304 , MCC8328 MCC8328 MCC9328 MCC9328 Dual 8-Bit Shift Register 13M 70x88 MCC8601 MCC8601 MCC9601 MCC9601 Retriggerable Monostable ... | OCR Scan |
3 pages, |
MCC9301 80x88 MC1741C MC1741CP1 MCC1741C MCC8300 MCC8301 MCC8310 MCC9300 65x6 datasheet abstract |
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| Abstract: Splitter products 1xN Polarization Maintaining Splitter/Combiner Our PM (Polarization Maintaining) Splitters/Combiners offer a high polarization extinction ratio and an excellent combination of very low insertion loss, high port to port uniformity, low PDL, flat wavelength response and minimum back-reflection to match the requirements of even the most demanding fiber transmission systems. Our PM Splitters/Combiners are pigtailed with PM fibers and packaged in compact, robust housing. Th ... | Original |
2 pages, |
P900 E2000 1x4 splitter datasheet abstract |
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| Abstract: Splitter products 1xN Optical Power Splitter/Combiner Our high performance 1xN Splitters/Combiners with very low insertion loss, low PDL, and high port to port uniformity are among the best on the market. They also offer excellent flat wavelength operation and minimum back-reflection. The Splitters/Combiners are pigtailed with ribbons of single mode fibers and packaged in compact, robust housing. They can be connectorized and installed in rackable boxes upon request. Our Splitters/Comb ... | Original |
2 pages, |
Optical power Splitter GR-1209 E2000 datasheet abstract |
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| Abstract: TN-48-09 TN-48-09: LVTTL Derating for Slew Rate Violations Introduction Technical Note LVTTL Derating for Slew Rate Violations Introduction SDRAM timings are tested and guaranteed under certain slew rates. However, specified timings are no longer valid when these slew rates fall below specification. If slew rates are slower than expected and fall below the minimum specification on the clock, command, and data signals, setup and hold time margins can vary significantly. This technical note de ... | Original |
8 pages, |
MT48LC16M8A2TG-75 TN-48-09 TN-48-09 abstract |
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| Abstract: PRODUCT GUIDE Winbond ISSI 2005 http://www.hengsen.cn PRODUCT GUIDE =WinbondISSI = 8 W78C32C W78C32C ROM ROM ROM RAM I/O / Int PDIP PLCC PQFP - 256 32 64K 40 3 6 4K 128 32 64K 40 2 256 32 64K 40 3 256 32/36 64K 40 3 40 44 44 40 44 44 40 44 44 40 44 44 40 44 44 40/32 6/8 44 - 40 44 44 40 44 44 /INT2 ... | Original |
38 pages, |
ISD4004 W9812G2DH isd1620 ISD1200 ISD1110 W83628F ISD-ES302 W9316 W27C512 32k w982516ch isd1616 USB 2.0 SD card reader 1999 SIS 730S W9812G6DH datasheet abstract |
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| Abstract: fax id: 3806 1h C-DX PRELIMINARY CY82C69x PentiumTM hyperCacheTM Chipset Family System Features - General purpose I/O pins and registers · Flexible power management with five timers and ten programmable event detectors · Full system, data, cache, and peripheral control - CY82C691 CY82C691 System Controller - CY82C692 CY82C692 Data Path Unit with integrated 128-KB 128-KB BSRAM - CY82C693 CY82C693 Peripheral Controller - CY82C693U CY82C693U Peripheral Controller with USB support - CY82C694 CY82C694 128-KB 128-KB Expansion C ... | Original |
5 pages, |
CY82C694 CY82C693 CY82C692 CY82C691 cy82 CY27C010 CY2254ASC-2 82C691 AMD k6 addressing mode datasheet abstract |
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| Abstract: GLT41116 GLT41116 64k x 16 CMOS Dynamic RAM with Fast Page Mode FEATURES x 65,536 words by 16 bits organization. x Fast access time and cycle time. x Dual CAS input. x Low power dissipation. x Read-Modify-Write, RAS-Only Refresh, CAS-before-RAS Refresh, Hidden Refresh and Test Mode Capability. x 256 refresh cycles per 4ms. x Available in 40-Pin 400 mil SOJ, and 40/44-Pin TSOP (Type II). x Single 5.0Vâ-' 10% Power Supply. x All inputs and Outputs are TTL compatible. x Fast Page Mode opera ... | Original |
16 pages, |
GLT4116-40J4 GLT4116-35J4 GLT4116-30J4 GLT41116 GLT41116 abstract |
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| Abstract: VLIW/SIMD NeuroMatrix® Core a a a a Dmitri Fomine , Vladimir Tchernikov , Pavel Vixne and Pavel Chevtchenko a Research Center MODULE, 3 Eight March 4th Street, Box 166, Moscow, 125190, Russia, tel. +7-095-152-9335, fax. +7-095-152-3168, e-mail: dfomine@module.ru ABSTRACT let designers trade off precision and performance to suit their applications. The paper represents architecture of the NeuroMatrix® Core (NMC) designed for image processing, signal processing and neur ... | Original |
5 pages, |
TMS320C8X TMS320C80 TMS320C40 PBGA256 NM6403 idct acceleration datasheet abstract |
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| Abstract: Preliminary 152-Ball NAND Flash and Mobile LPDRAM PoP (TI OMAP) MCP Features NAND Flash and Mobile LPDRAM 152-Ball Package-on-Package (PoP) Combination Memory (TI OMAPTM) MT29C MT29C Family Current production part numbers: See Table 1 on page 3 Features Figure 1: · Micron® NAND Flash and Mobile LPDRAM components · RoHS-compliant, "green" package · Separate NAND Flash and Mobile LPDRAM interfaces · Space-saving package-on-package combination · Low-voltage operation (1.70Â1.95V ... | Original |
15 pages, |
MT29C1G12MADRACG MT29F2G16AB MT29C2G24MAKLACG-6 MT29C1G12MAURACA MT29C2G24MAKL lpddr Micron NAND Micron NAND DQS MT29F1G16 MT29C1G12 Micron 512MB nand FLASH micron lpddr MT29F1G16ABCHC-ET MT29C MT29C abstract |
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| Abstract: AN1764 AN1764 APPLICATION NOTE How to Connect NAND Flash Memories to a NomadikTM Multimedia Application Processor CONTENTS This Application Note describes how to connect an STMicroelectronics NAND Flash memory to the ST Nomadik Multimedia Platform. It considers the Memory Interface and the Boot from NAND mechanism. s DESCRIPTION s MEMORY INTERFACE (FSMC) s PROGRAMMER'S MODEL s OPERATION s ECC HANDLING s BOOT FROM NAND FLASH s LOW LEVEL DRIVER DESCR ... | Original |
16 pages, |
32 bit AHB lite bus NAND Flash controller ecc NAND128R3A NAND128R4A NAND128W3A NAND128W4A NAND256R3A NAND256R4A NAND256W3A NAND256W4A NAND512R3A NAND512W3A STN*8800 AN1764 AN1764 abstract |
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| Abstract: Preliminary 168-Ball NAND Flash and LPDRAM PoP (TI OMAP) MCP Features NAND Flash and Mobile LPDRAM 168-Ball Package-on-Package (PoP) MCP Combination Memory (TI OMAPTM) MT29CxGxxMAxxxxx Features Figure 1: PoP Block Diagram Micron® NAND Flash and LPDRAM components RoHS-compliant, "green" package Separate NAND Flash and LPDRAM interfaces Space-saving multichip package/package-on-package combination · Low-voltage operation (1.70Â1.95V) · Industrial temperature range: Â40°C to ... | Original |
17 pages, |
Micron NAND 168-ball LPDDR MT29C2G24MA 1g nand DDR mcp MICRON mcp mt29f4g16ab MT29C2G24MAKLAJG mt29c4g48maplcji lpddr mt29c4g48maplcji6 Marking Code TI OMAP Micron NAND DQS MT29C2G24MAKLAJG-6 datasheet abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| /* Opcode table for the H8-300 H8-300 H8-300 H8-300 Copyright (C) 1991, 92, 93, 95, 96, 97, 1998 Free Software Foundation. Written by Steve Chamberlain, sac@cygnus.com. This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This www.datasheetarchive.com/download/46713865-484035ZC/gnu_tsc.bz2 |
Motorola | 16/02/2000 | 22032.79 Kb | BZ2 | gnu_tsc.bz2 |
| /* Opcode table for the H8-300 H8-300 H8-300 H8-300 Copyright (C) 1991,1992 Free Software Foundation. Written by Steve Chamberlain, sac@cygnus.com. This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distribute www.datasheetarchive.com/download/46713865-484035ZC/gnu_tsc.bz2 |
Motorola | 16/02/2000 | 22032.79 Kb | BZ2 | gnu_tsc.bz2 |
| /* Opcode table for the H8/300 H8/300 H8/300 H8/300 Copyright 1991, 1992, 1993, 1994, 1996, 1997, 1998, 2000, 2002, 2003 Free Software Foundation, Inc. Written by Steve Chamberlain . This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at y www.datasheetarchive.com/download/42652172-393173ZC/mplabalc30v2_05.tgz |
Microchip | 09/11/2006 | 11568.47 Kb | TGZ | mplabalc30v2_05.tgz |
| linking C code to specific sections linking C code to specific sections keywords: C8x, linking, C, code, to, specific, sections QUESTION: Is there any way to link code to specific sections of memory? I would like to align things a certain way to allow room for buffers and the like. ANSWER: I'll start with assembly language, since that's what I know www.datasheetarchive.com/files/texas-instruments/sc/docs/dsps/hotline/m024.htm |
Texas Instruments | 20/12/1996 | 6.69 Kb | HTM | m024.htm |
| Document Library Search Results Package Diagram Outlines (Most documents are in Adobe www.datasheetarchive.com/files/idt/docs/wcd00000/wcd000a7-v1.htm |
IDT | 01/10/1998 | 16.17 Kb | HTM | wcd000a7-v1.htm |
| #include #include #include "ansidecl.h" #include "callback.h" #include "opcode/mn10200.h" #include #include "remote-sim.h" #ifndef INLINE #ifdef _GNUC_ #define INLINE inline #else #define INLINE #endif #endif extern host_callback *mn10200_callback; #define DEBUG_TRACE 0x00000001 #define DEBUG_VALUES 0x00000002 extern int mn10200_debug; #ifdef _STDC_ #define SIGNED signed #else #define SIGNED #endif #if UCHAR_MAX = 255 typedef unsigned char uint8; typed www.datasheetarchive.com/download/46713865-484035ZC/gnu_tsc.bz2 |
Motorola | 16/02/2000 | 22032.79 Kb | BZ2 | gnu_tsc.bz2 |
| #include #include #include "ansidecl.h" #include "callback.h" #include "opcode/mn10300.h" #include #include "remote-sim.h" #ifndef INLINE #ifdef _GNUC_ #define INLINE inline #else #define INLINE #endif #endif extern host_callback *mn10300_callback; #define DEBUG_TRACE 0x00000001 #define DEBUG_VALUES 0x00000002 extern int mn10300_debug; #if UCHAR_MAX = 255 typedef unsigned char uint8; typedef signed char int8; #else #error "Char is not an 8-bit type" #endi www.datasheetarchive.com/download/46713865-484035ZC/gnu_tsc.bz2 |
Motorola | 16/02/2000 | 22032.79 Kb | BZ2 | gnu_tsc.bz2 |
| /* General config options */ #define WITH_CORE #define WITH_MODULO_MEMORY 1 #define WITH_WATCHPOINTS 1 /* The v850 has 32bit words, numbered 31 (MSB) to 0 (LSB) */ #define WITH_TARGET_WORD_MSB 31 #include "sim-basics.h" #include "sim-signal.h" typedef address_word sim_cia; /* Get the number of instructions. FIXME: must be a more elegant way of doing this. */ #include "itable.h" #define MAX_INSNS (nr_itable_entries) #define INSN_NAME(i) itable[(i)].name #include "sim-base.h" #inclu www.datasheetarchive.com/download/46713865-484035ZC/gnu_tsc.bz2 |
Motorola | 16/02/2000 | 22032.79 Kb | BZ2 | gnu_tsc.bz2 |
| , , , , , , www.datasheetarchive.com/download/49104857-995987ZC/xapp542.zip (fpgadata.c) |
Xilinx | 11/11/2004 | 9180.01 Kb | ZIP | xapp542.zip |
| unsigned int cortex128x57_width = 128; unsigned int cortex128x57_height = 57; const unsigned short cortex128x57_pixel_data [128 * 57] = { , , , , , www.datasheetarchive.com/download/72876757-595958ZC/code.bundle.rdb1768.cmsis.zip (cortex128x57.c) |
NXP | 09/04/2010 | 1633.54 Kb | ZIP | code.bundle.rdb1768.cmsis.zip |