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Abstract: HC4GX2YZ HC4GX1YZ5 HardCopy IV ASICs (0.9V) with 6.5+Gbps transceivers option1 1 All data is , ) with 6.5+Gbps transceivers option1 Usable ASIC gates 2.8M 3.9M 9.2M 7.6M 9.5M , Transceiver (SERDES) data rate range External memory interfaces 6.5-Gbps transceiver (SERDES) channels 600 Mbps - 6.5+Gbps with PCS + PMA4 4/8 4/8/16 Memory devices supported 4/8/16/24 ... Original
datasheet

2 pages,
110.08 Kb

SSTL-18 SSTL-15 SDI ASI CEI-6G-SR higig2 datasheet abstract
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Abstract: New Product Databrief PI2EQX6804-A PI2EQX6804-A 6.5Gbps, 4-lane, SAS2.0/SATA3.0/XAUI ReDriverTM with Equalization & Emphasis Pericom Semiconductor's PI2EQX6804-A PI2EQX6804-A is a low power, SAS2, SATA, XAUI signal ReDriverTM. The device provides programmable equalization, amplification, and emphasis by using 8 select bits, to optimize performance over a variety of physical mediums by reducing Inter-symbol interference. , 6.5Gbps SAS2/SATA/XAUI ReDriverTM · Supporting 8 differential channels or 4 ports · Pin strapped and I2C ... Original
datasheet

1 pages,
197.1 Kb

SAS-2 PI2EQX Figure1 block diagram applications sata3 PI2EQX6804-A PI2EQX6804-A abstract
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Abstract: New Product Databrief PI2EQX6864-A PI2EQX6864-A 6.5Gbps, 4-lane, SAS 2.0/SATA 3.0/XAUI ReDriverTM with Equalization & Emphasis and Flow-through pinout Pericom Semiconductor's PI2EQX6864-A PI2EQX6864-A is a low power, SAS2.0, SATA3.0, XAUI signal ReDriver. The device provides programmable equalization, amplification, and emphasis by using 8 select bits, to optimize performance over a variety of physical mediums by reducing , pathways on the user's platform. Features · Up to 6.5Gbps SAS2.0/SATA3.0/XAUI ReDriver · Supporting 8 ... Original
datasheet

1 pages,
196.2 Kb

SAS-2 sata3 PI2EQX6864-A PI2EQX6864-A abstract
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Abstract: New Product Databrief PI3EQX6701 PI3EQX6701 6.5Gbps, 1-port, SAS 2.0/SATA 3.0 ReDriverTM with Analog/Digital Configuration Pericom Semiconductor's PI3EQX6701 PI3EQX6701 is a low power, signal ReDriverTM. The device provides programmable equalization, to optimize performance over a variety of physical mediums by reducing Inter-Symbol Interference. PI3EQX6701 PI3EQX6701 supports two 100 Differential CML data I/O's between the , ) then the outputs are driven to the common mode voltage. Features · Two 6.5Gbps differential ... Original
datasheet

1 pages,
562.61 Kb

PI3EQX6701 PI3EQX6701 abstract
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Abstract: PI2EQX6804-A PI2EQX6804-A 6.5Gbps 4-Lane SAS2/SATA/XAUI ReDriverTM with Equalization & Emphasis Features нн Up to 6.5Gbps SAS2/SATA/XAUI ReDriverTM нн Supporting 8 differential channels or 4 ports нн Pin , 1 2010-0196 www.pericom.com PS9104 PS9104 07/21/10 6.5Gbps 4-Lane SAS2/SATA/XAUI ReDriverTM , property of their respective owners. 2 2010-0196 www.pericom.com PS9104 PS9104 07/21/10 6.5Gbps , PS9104 PS9104 07/21/10 6.5Gbps 4-Lane SAS2/SATA/XAUI ReDriverTM Pin # Power Pins B2, B3, B8, B9, C2, C3 ... Original
datasheet

20 pages,
1541.03 Kb

PI2EQX6804 PI2EQX6804-A PI2EQX6804-A abstract
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Abstract: dual-mode 750/1300 0 20-TQFN 20-TQFN (ZH20) PI2EQX6804-A PI2EQX6804-A* 6.5Gbps 4-port with equalization, Emphasis , , 1.0 1000 0, 2.5, 3.5, 4.5, 5.5, 6.5, 7.5, 8.5 100-LBGA 100-LBGA (NJ100 NJ100) PI2EQX6864 PI2EQX6864* 6.5Gbps , 56-TQFN 56-TQFN (ZF56) PI2EQX6701 PI2EQX6701 6.5Gbps 1-port with emphasis & equlizer, OOB SAS2, SATA3i/m, XAUI 20-TQFN 20-TQFN (ZH20) PI2EQX6814 PI2EQX6814 6.5Gbps 4-port with emphasis & equalizer, OOB SAS2, SATA3i/m, XAUI 100-LBGA 100-LBGA (NJ100 NJ100) PI2EQX6874 PI2EQX6874 6.5Gbps 4-port with Emphasis & equalizer, OOB with flowthru pinout ... Original
datasheet

8 pages,
718.21 Kb

56-TQFN 100-LBGA package 84-LFBGA PI3HDMI101-A PI3VDP411LSR PI2EQX3231BL DVI dual link receiver PI2EQX6874 PI2EQX8804 PI2EQX6864-A PI3HDMI412AD pi3eqx6701 ZB56 sata2 datasheet abstract
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Abstract: ramped up before VCCHIP and VCCHSSI are powered on. For data rates less than 6.5Gbps and with a proper , powered on. For data rates less than 6.5Gbps and with a proper isolation filter VCCR_GXB and VCCT_GXB may , before VCCHIP and VCCHSSI are powered on. For data rates less than 6.5Gbps and with a proper isolation , to 0.85V if the data rate is 6.5Gbps, or connect these pins to 1.0V if the data rate is > 6.5Gbps. For data rates less than 6.5Gbps and with a proper isolation filter these pins may be tied to the ... Original
datasheet

20 pages,
672.95 Kb

PCG-01011-1 PCG-01011-1 abstract
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Abstract: connectivity with low-power GTX 6.5Gbps serial transceivers Virtex-6 SXT FPGAs ­ optimized for applications that require ultra-high DSP performance and serial connectivity with low-power GTX 6.5Gbps , power ·GTX transceivers run at 150Mbps to 6.5Gbps with 25% lower power consumption: ... Original
datasheet

4 pages,
1080.56 Kb

xilinx digital Pre-distortion virtex GTH DSP48E1 adaptive algorithm dpd 6.25G 3G-SDI serializer datasheet abstract
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Abstract: , VCCPT must be isolated from the other voltage rails. For data rates Connect to 1.5V. 6.5Gbps where , less than 6.5Gbps these pins may be tied to the same 1.1V plane as VCCL_GXB[L,R]. However, for better , be tied to the same linear regulator as VCCT_R. For data rates less than 6.5Gbps these pins may be , 1.5 V. 1.4V if the transmitter channel data rate is > 6.5Gbps. Connect these pins to 1.5V if the transmitter channel data rate is 6.5Gbps. For data rates 6.5Gbps where VCCH_GXB is 1.5V these pins may be ... Original
datasheet

22 pages,
545.67 Kb

PCG-01005-1 PCG-01005-1 abstract
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Abstract: S P E C I F I C AT I O N S : 6.5-Gbps NRZ per-channel data rate 2.5-V power supply (2.5-V or 3.3-V ... Original
datasheet

2 pages,
458.57 Kb

IQ2200 VSC3172 VSC3172 abstract
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Abstract: > Product Overview M21145 M21145 [6.5 Gbps 80x80] and M21165 M21165 [6.5 Gbps 160x160] Crosspoint Switch The M21145/M21165 M21145/M21165 are 80x80/160x160 asynchronous fully non-blocking crosspoint switches operating at data rates up to 6.5 Gbps. The M21145/M21165 M21145/M21165 can be configured either to switch channels as individual lanes (Lane Product Brief M21145/65 M21145/65 6.5 Gbps 80x80/160x160 Crosspoint Switch Mode) or in groups of four (Group Mode). The devices include advanced signal conditioning capabilities that enable ... Original
datasheet

2 pages,
251.64 Kb

M21145 FCBGA express card DVB 424M M21165 KVM SWITCH IC M21145/M21165 M21145 abstract
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Abstract: > Product Overview The M21450 M21450 is a dual channel device designed to enable the transmission of multi gigabit serial data through the most challenging environments. The device features two independent adaptive equalizers that automatically equalize data at rates up to 6.5 Gbps. Control of key functions of the M21450 M21450 is provided through hardware pins, and full register control of the M21450 M21450 is provided through an Iâ-"C compatible software control interface. The M21450 M21450 can also selfconfigure from ... Original
datasheet

2 pages,
367.12 Kb

424M M21450 M21450 abstract
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Abstract: > Product Overview Mindspeed's family of 6.5 Gbps backplane signal conditioners feature small form factor, low power devices that enable data transmission over long backplanes at speeds up to 6.5 Gbps. Mindspeed's Amplif-EyeTM signal conditioning technology enables transmission of 6.5 Gbps data to distances up to one meter while also traversing two backplane connectors. These products are specifically designed to operate in environments that suffer from both loss and reflection. Each device c ... Original
datasheet

2 pages,
467.04 Kb

M21451 88 qfn 424M qfn 10x10 M21452 datasheet abstract
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Abstract: DATA INTERCONNECT VSC3312 VSC3312 6.5 Gbps 12x12 Crosspoint Switch BLOCK DIAGRAM: SWITCH Input[0:11] 12 EQ 12 12 EQ 12 Output[0:11] VSC3312 VSC3312 REGISTERS F E AT U R E S : SCK SDA SMI SMO ResetB Stat[1:0] Mode[3:0] hipAddr[9:0] Config Two-Wire/Four-Wire Serial BENEFITS: 6.5 Gbps non-return-to-zero (NRZ) data bandwidth Transparent support for virtually all data rates and protocols Fully non-blocking and multicasting switch core with per-pi ... Original
datasheet

2 pages,
661.01 Kb

VSC3312 Lanes IQ2200 VSC3312 abstract
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Abstract: BCM88130 BCM88130 Brief ® HIGH-PERFORMANCE PACKET SWITCH FABRIC SUMMARY OF BENEFITS FEATURES · Scales linearly to over 10 Tbps · Proven fabric architecture for a range of modular platforms · Non-blocking architecture · Interoperable with current QE2000 QE2000 and future Queuing Engines to provide line-card future-proofing · 100 GE ready · Central bandwidth management enforces service level agreements (SLAs) and bandwidth guarantees, including low latency and jitter services. · ... Original
datasheet

2 pages,
68.64 Kb

88130-PB00-R BCM88130 BCM88130 abstract
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Extended Electronics Archive (Experimental)

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Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer.
 
A AD8158 AD8158 AD8158 AD8158 HSPICE Model Application Note 1 AD8158 AD8158 AD8158 AD8158 HSPICE I/O Models The AD8158 AD8158 AD8158 AD8158 is an asynchronous quad-lane 2:1 switch with a total of 12 differential PECL/CML compatible inputs and 12 differential CML outputs. It is optimized for NRZ signaling with data rates of up to 6.5 Gbps. The encrypted file ad8158_model.inc contains two HSPICE subcircuits, one that models a single input channel (ad8158_rx) and one that models a single output channel (ad8158_tx). The two subcircuits can be cas
www.datasheetarchive.com/download/69939029-12774ZC/ad8158_hspice_model_06jan09.zip (ad8158_model_guide.ver2.0.pdf)
Analog Devices 01/09/2012 2024.97 Kb ZIP ad8158_hspice_model_06jan09.zip