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64-Bit*

Catalog Datasheet Results Type PDF Document Tags
Abstract: compliant Long range, low power vicinity transponder IC 64-bit ISO15693 ISO15693 Unique Identifier (UID) 1k bit ... Original
datasheet

1 pages,
66.49 Kb

THEFT Electronic article surveillance ISO18000-3 ISO15693 EM4233SLIC em4233 ISO-1800 EM4233SLIC abstract
datasheet frame
Abstract: Hifn Security Platform (HSP) User Guide Data Sheet . DS-0067-07 DS-0067-07, © 2003, Hi/fn ®, Inc. All rights reserved. 07/03 No part of this publication may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language in any form by any means without the written permission of Hi/fn, Inc. ("Hifn") Licensing and Government Use Any Hifn software ("Licensed Programs") described in this document is furnished under ... Original
datasheet

171 pages,
902.04 Kb

motorola 2395 HSP Development Software hifn 7711 FIPS-140 HIFN DS-0067-07 Hifn Security Platform TE 2395 motorola datasheet abstract
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Abstract: To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid Renesas Electronics document. We appreciate your understanding. Renesas Electronics website: http://www.renesas.com April 1st, 2010 Renesas Electronics Corporation ... Original
datasheet

140 pages,
1678.89 Kb

PRQP0080GB-A M3764 datasheet abstract
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Abstract: , PCI-to-Ultra160 SCSI adapter. They both have the full features of PCI 64-bit bus master transfer capability and , in LVD mode Supports 80MIPS 80MIPS RISC SCSI phase engine Supports 64-bit/66MHz PCI bus master (32-bit ... Original
datasheet

34 pages,
1719.76 Kb

AHA1542B AEC67162 AEC67160 AEC-67162 AEC-67160 AEC-67162S AEC-67162/67162S AEC-67162/67162S abstract
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Abstract: 64-bit microprocessors. Microcross supports multiple host and target configurations providing complete ... Original
datasheet

2 pages,
353.69 Kb

free embedded projects 64-Bit Microprocessors free embedded c projects datasheet abstract
datasheet frame
Abstract: ) challenge-andresponse authentication (ISO/IEC 10118-3 SHA-1), a 64-bit unique identifier (UID), one 64-bit secret, and , (MAC) using data from the EEPROM of the device and the 64-bit secret to guarantee secure, symmetric , with Block Lock Feature, Write-Cycle Counter, and Optional EPROM-Emulation Mode 64-Bit UID , from Device is Verified and Authenticated by the Host with Knowledge of the 64-Bit Secret Read and Write (64-Bit Block) Supports AFI and DSFID Function 10ms Programming Time To Fob: 10% or 100% ASK ... Original
datasheet

21 pages,
171.55 Kb

MAX66140 max6614 IEC 7816-6 12TH CRC-16-CCITT CRC-16 ccitt datasheet abstract
datasheet frame
Abstract: gigahertz with 512 megabytes RAM 32-bit and 64-bit x86 compatible workstations are supported Microsoft , Linux IBM-x86-compatible host computer 32-bit and 64-bit x86 compatible workstations are supported ... Original
datasheet

100 pages,
2927.44 Kb

sc3850 instruction set AN3800 code warrior makefile MSC8144 MSC8151 MSC8152 MSC8156 MSC8256 sc38 SC3850 instruction 38448 intrinsics sc3850 SC3400 datasheet abstract
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Abstract: Device has a Unique 64-Bit Serial Code Stored in an On-Board ROM Multidrop Capability Simplifies , need for an external power supply. Each DS18S20 DS18S20 has a unique 64-bit serial code, which allows multiple , Description table. The 64-bit ROM stores the device's unique serial code. The scratchpad memory contains the , microprocessor (the master device) identifies and addresses devices on the bus using each device's unique 64-bit , CPP 64-BIT ROM AND 1-Wire PORT SCRATCHPAD ALARM HIGH TRIGGER (TH) REGISTER (EEPROM) ALARM ... Original
datasheet

23 pages,
197.67 Kb

thermost land pattern TO92 iButton DS18S20Z DS18S20 ds1820 1 wire temperature sensor DS1820 Temp sensor DS18B20 DS18S20 abstract
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Abstract: READ STREAM EXT 8 F X 1 = 64-bit worldwide name support 7 F 0b 1 = WRITE DMA , for READ STREAM DMA EXT & READ STREAM EXT (sup. Dflt.) 8 F X 1 = 64-bit worldwide name ... Original
datasheet

20 pages,
411.81 Kb

Micron MLC temperature mlc flash micron Firmware ssd sata ssd controller C200 60GB Micro SATA dma ssd IEC6095 LBA1-02 micro sata connector TLC nand Micron NAND 120GB 120GB 120GB abstract
datasheet frame
Abstract: IR248 IR2248 IR149 IR073 IR2168 IR108 IR229 IR249 IR247 IR226 IR107 registers Accumulator: One 64-bit register (lower-order 16 bits are fixed to 0) · Basic instructions: 73 , 64-bit register in access for reading and writing. When data are read from the accumulator, the value of ... Original
datasheet

49 pages,
554.58 Kb

IR031 R5F56107VNF iR216 IR150 ir185 ir06 8268H IR231 ir234 datasheet abstract
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Datasheet Content (non pdf)

Abstract Saved from Date Saved File Size Type Download
Over 1.1 million files (1986-2014): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer.
 
No abstract text available
www.datasheetarchive.com/download/9036178-740006ZC/20601-v1.pl
SGS-Thomson 12/05/1995 341.48 Kb PL 20601-v1.pl
No abstract text available
www.datasheetarchive.com/download/52635097-740005ZC/20601.pl
SGS-Thomson 07/08/1995 341.48 Kb PL 20601.pl
No abstract text available
www.datasheetarchive.com/download/33141601-739211ZC/20164.pl
SGS-Thomson 07/08/1995 443.38 Kb PL 20164.pl
No abstract text available
www.datasheetarchive.com/download/2074773-739212ZC/20164-v1.pl
SGS-Thomson 12/05/1995 505.8 Kb PL 20164-v1.pl
57 new instructions Eight 64-bit wide MMX technology registers Four new data access to recently used instructions and data. Performance is enhanced through a dedicated 64-bit cache pipelined Floating-Point Unit (FPU) for supporting the 32-bit and 64-bit formats specified in
www.datasheetarchive.com/files/intel/products two & tools/design/celeron/index.htm
Intel 06/05/1999 18.52 Kb HTM index.htm
) technique. Eight 64-bit wide Intel MMX technology registers. Intel data. Performance is enhanced through a dedicated 64-bit cache bus. The speed of the L2 cache scales are essential. A pipelined Floating-Point Unit (FPU) for supporting the 32-bit and 64-bit
www.datasheetarchive.com/files/intel/products two & tools/design/pentiu~2/prodbref/index.htm
Intel 07/05/1999 21.41 Kb HTM index.htm
No abstract text available
www.datasheetarchive.com/download/2472383-266331ZC/cpuinfo.zip (README16.TXT)
Intel 21/02/1997 163.75 Kb ZIP cpuinfo.zip
No abstract text available
www.datasheetarchive.com/download/2472383-266331ZC/cpuinfo.zip (README32.TXT)
Intel 21/02/1997 163.75 Kb ZIP cpuinfo.zip
No abstract text available
www.datasheetarchive.com/download/2472383-266331ZC/cpuinfo.zip (Speed.c)
Intel 21/02/1997 163.75 Kb ZIP cpuinfo.zip
No abstract text available
www.datasheetarchive.com/download/2472383-266331ZC/cpuinfo.zip (Tstdll32.c)
Intel 21/02/1997 163.75 Kb ZIP cpuinfo.zip