NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: H) Millimeters (L Ã- W Ã- H) Weight - 1.0 x 0.5 x 0.243 25.4 x 12.7 x 6.16 3g - Note ... | Original |
6 pages, |
V7BA-06A1AL V7BA-06A1A0 TR-332 Capacitor 3300uF 10V datasheet abstract |
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| Abstract: c3266 x 12.7 x 6.16 3g - Note: All specifications are typical at 25 °C unless otherwise stated. ... | Original |
6 pages, |
VRBA-06A1AL VRBA-06A1A0 SR-332 datasheet abstract |
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| Abstract: x12.7 x 6.16 3g - Note: All specifications are typical at 25°C unless otherwise stated. ... | Original |
7 pages, |
V7BA-06A2AL V7BA-06A2A0 TR-332 datasheet abstract |
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| Abstract: x 12.7 x 6.16 3g - Note: All specifications are typical at 25 °C unless otherwise stated. ... | Original |
8 pages, |
VRBA-06A1AL VRBA-06A1A0 SR-332 datasheet abstract |
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| Abstract: H) Millimeters (L Ã- W Ã- H) Weight - 1 x 0.5 x 0.243 25.4 x12.7 x 6.16 3g - Note: All ... | Original |
10 pages, |
SR-332 datasheet abstract |
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| Abstract: 1 x 0.5 x 0.243 25.4 x12.7 x 6.16 3g - Note: All specifications are typical at 25 °C unless ... | Original |
10 pages, |
SR-332 datasheet abstract |
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| Abstract: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Section II: Multirate SD/HD/3G , . . . . . . . . . 3G-SDI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . , . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 Section II: Multirate SD/HD/3G , 3G-SDI Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3G-SDI Output ... | Original |
636 pages, |
gs1574a LN10 352M SDI design SMPTE 296M timing 720p30 299M 272M UG196 UG198 vhdl code for multiplexing table dvb-t 1080p video encoder virtex5 gtp CLC001 425M XAPP1014 XAPP1014 abstract |
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| Abstract: Infineon X-GOLD 616 is a cellular system on chip comprising of the 2G/3G digital and analogue baseband , Infineon's 3rd generation 3G baseband solution and is taking the next step in bringing enhanced modem , Shared-SDRAM, Dual-Ported-SDRAM The processing of the 2G/3G cellular protocol stack is handled by an , Infineon's SMARTiTMUE RF engine heralds lowest PCB footprint, below 700mm2 for triple band 3G and quad band , 2xI2S нн SD/MMC card interface Product Brief X-GOLDTM 616 High Performance Modem Solution for ... | Original |
2 pages, |
xgoldtm 616 3g DigRF lpddr1 ARM1176 usb 3g modem circuit teaklite x-goldtm X-GOLD 3G modem smarti ue Infineon X-GOLD 616 X-GOLDTM616 MSC33 X-GOLDTM616 abstract |
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| Abstract: Product Brief 3G Basestation Processor 3GPP/UMTS Physical Channel Processing T h e 3 G b a , be enhanced with customized implementations. The 3G basestation processor enables design of flexible , 384 fingers, configurable as 6-16 finger RAKE receivers 9600 MOPS 16-bit embedded dataflow DSP array , resources Supports up to 12 uplink and downlink antenna ports Type Sales Code Package 3G , Tx Finger 3 CGU Tx Finger N Memory Mapped Peripheral 3G Basestation Processor 64 ... | Original |
2 pages, |
infineon pmb 616 3g 3G HSDPA circuits diagram array antenna datasheet abstract |
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| Abstract: , > -120° 3GH > Hz , .152 -10.4 .339 175.7 10000.0000 .616 120.9 1.431 -35.9 .166 -16.1 , 9000.0000 .586 131.3 1.735 -19.3 .165 -4.4 .283 172.2 10000.0000 .616 ... | Original |
4 pages, |
2SK1645 2SK1645 abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| - - - TL (top-left) CLK, F3, IOB-T CLK, F3, G1, C3, C1, IOB-T BL (bottom-left) CLK, G1 CLK, F3, G1, C3, C1, IOB-T BR (bottom-right) CLK, C3 CLK, F3, G1, C3, C1, IOB-T TR (top-right) CLK, C1 CLK, F3, G1, C3, C1, IOB Replaces Inverted Signal = n618 Signal = n521 Replaces Inverted Signal = n616 Signal www.datasheetarchive.com/files/xilinx/bbs/swhlp/synopsys/verilog/state_ma/one_hot.prp |
Xilinx | 02/06/1995 | 12.09 Kb | PRP | one_hot.prp |
| - - - TL (top-left) CLK, F3, IOB-T CLK, F3, G1, C3, C1, IOB-T BL (bottom-left) CLK, G1 CLK, F3, G1, C3, C1, IOB-T BR (bottom-right) CLK, C3 CLK, F3, G1, C3, C1, IOB-T TR (top-right) CLK, C1 CLK, F3, G1, C3, C1, IOB Replaces Inverted Signal = n618 Signal = n521 Replaces Inverted Signal = n616 Signal www.datasheetarchive.com/download/98542422-996536ZC/xsiverlg.tar |
Xilinx | 20/01/1997 | 8960 Kb | TAR | xsiverlg.tar |
| ", 11,24, 0x32e, "2I3D1r4d", 4, "", DEF_MODEC,DEF_MODEL }, { "extsb", 14,24, 0x0cce, "1I2I4G3g", 1, "", DEF_MODEC,DEF_MODEL }, { "extsw", 14,24, 0x0dce, "1I2I4G3g", 2, "", DEF_MODEC,DEF_MODEL }, { "extsd", 14,24, 0x0fce, "1I2I4G3g", 4, "", DEF_MODEC,DEF_MODEL }, { "ffsb", 14,24, 0x046e, "1B2I", 1 ", 11,24, 0x3ae, "2D3I1r4d", 4, "", DEF_MODEC,DEF_MODEL }, { "inssb", 14,24, 0x08ce, "1B2I4G3g", 1, "", DEF_MODEC,DEF_MODEL }, { "inssw", 14,24, 0x09ce, "1W2I4G3g", 2, "", DEF www.datasheetarchive.com/download/46713865-484035ZC/gnu_tsc.bz2 |
Motorola | 16/02/2000 | 22032.79 Kb | BZ2 | gnu_tsc.bz2 |
| ", 11,24, 0x32e, "2I3D1r4d", 4, "", DEF_MODEC,DEF_MODEL }, { "extsb", 14,24, 0x0cce, "1I2I4G3g", 1, "", DEF_MODEC,DEF_MODEL }, { "extsw", 14,24, 0x0dce, "1I2I4G3g", 2, "", DEF_MODEC,DEF_MODEL }, { "extsd", 14,24, 0x0fce, "1I2I4G3g", 4, "", DEF_MODEC,DEF_MODEL }, { "ffsb", 14,24, 0x046e, "1B2I", 1 ", 11,24, 0x3ae, "2D3I1r4d", 4, "", DEF_MODEC,DEF_MODEL }, { "inssb", 14,24, 0x08ce, "1B2I4G3g", 1, "", DEF_MODEC,DEF_MODEL }, { "inssw", 14,24, 0x09ce, "1W2I4G3g", 2, "", DEF www.datasheetarchive.com/download/46713865-484035ZC/gnu_tsc.bz2 |
Motorola | 16/02/2000 | 22032.79 Kb | BZ2 | gnu_tsc.bz2 |
| ", 11,24, 0x32e, "2I3D1r4d", 4, "", DEF_MODEC,DEF_MODEL }, { "extsb", 14,24, 0x0cce, "1I2I4G3g", 1, "", DEF_MODEC,DEF_MODEL }, { "extsw", 14,24, 0x0dce, "1I2I4G3g", 2, "", DEF_MODEC,DEF_MODEL }, { "extsd", 14,24, 0x0fce, "1I2I4G3g", 4, "", DEF_MODEC,DEF_MODEL }, { "ffsb", 14,24, 0x046e, "1B2I", 1 _MODEC,DEF_MODEL }, { "inssb", 14,24, 0x08ce, "1B2I4G3g", 1, "", DEF_MODEC,DEF_MODEL }, { "inssw", 14,24, 0x09ce, "1W2I4G3g", 2, "", DEF_MODEC,DEF_MODEL }, { "inssd", 14,24, 0x0bce, "1D2I4G3g", 4, "", DEF www.datasheetarchive.com/download/42652172-393173ZC/mplabalc30v2_05.tgz |
Microchip | 09/11/2006 | 11568.47 Kb | TGZ | mplabalc30v2_05.tgz |
| G2:G2I G3:G3I CIN: COUT: X: Y:H XQ: YQ: FFX:RESET FFY:RESET DX: DY: F:F1:F3:F2:F4 G:G1:G3:G2:G4 H:G:F H1: DIN: SR: EC: RAM: CDIR: Equate F = ~(F3+F4+F1)*~(~F2*F3*F1) Equate G = ~(~(~G1*~G4*G3)*(G2+~G1+G3) Equate H = (G+F) Endblk Nameblk GE n737 Editblk GE Base FG Config F4:F4I G2:G2I G3:G3I CIN: COUT: X: Y:H XQ: YQ: FFX:RESET FFY:RESET DX: DY: F:F1:F3:F2:F4 G:G1:G3:G2:G4 H:G:F H1: DIN: SR: EC: RAM: CDIR: Equate F = ~(~(~F1*~F4*F3)*(F2+~F1+F3) Equate G = ~( ) Equate H = (G www.datasheetarchive.com/files/xilinx/bbs/swhlp/synopsys/vhdl/barrel/barrel.odf |
Xilinx | 30/05/1995 | 30.77 Kb | ODF | barrel.odf |
| G2:G2I G3:G3I CIN: COUT: X: Y:H XQ: YQ: FFX:RESET FFY:RESET DX: DY: F:F1:F3:F2:F4 G:G1:G3:G2:G4 H:G:F H1: DIN: SR: EC: RAM: CDIR: Equate F = ~(F3+F4+F1)*~(~F2*F3*F1) Equate G = ~(~(~G1*~G4*G3)*(G2+~G1+G3) Equate H = (G+F) Endblk Nameblk GE n737 Editblk GE Base FG Config F4:F4I G2:G2I G3:G3I CIN: COUT: X: Y:H XQ: YQ: FFX:RESET FFY:RESET DX: DY: F:F1:F3:F2:F4 G:G1:G3:G2:G4 H:G:F H1: DIN: SR: EC: RAM: CDIR: Equate F = ~(~(~F1*~F4*F3)*(F2+~F1+F3) Equate G = ~( ) Equate H = (G www.datasheetarchive.com/download/61635476-996530ZC/xsi_vhdl.tar |
Xilinx | 09/04/1997 | 12384 Kb | TAR | xsi_vhdl.tar |
| G2:G2I G3:G3I CIN: COUT: X: Y:H XQ: YQ: FFX:RESET FFY:RESET DX: DY: F:F1:F3:F2:F4 G:G1:G3:G2:G4 H:G:F H1: DIN: SR: EC: RAM: CDIR: Equate F = ~(F3+F4+F1)*~(~F2*F3*F1) Equate G = ~(~(~G1*~G4*G3)*(G2+~G1+G3) Equate H = (G+F) Endblk Nameblk GE n737 Editblk GE Base FG Config F4:F4I G2:G2I G3:G3I CIN: COUT: X: Y:H XQ: YQ: FFX:RESET FFY:RESET DX: DY: F:F1:F3:F2:F4 G:G1:G3:G2:G4 H:G:F H1: DIN: SR: EC: RAM: CDIR: Equate F = ~(~(~F1*~F4*F3)*(F2+~F1+F3) Equate G = ~( ) Equate H = (G www.datasheetarchive.com/download/78754389-996537ZC/xsivnowk.tar |
Xilinx | 20/01/1997 | 9960 Kb | TAR | xsivnowk.tar |
| TECHNOLOGY PARTS. 4 g20 g21 2-CHANNEL PARTS. 4 g21 g21 2-CHANNEL, HIGH 1 1 V E 2 2 EN123 EN123 EN123 EN123 IN1-4 IN1+5 IN2+6 IN2-7 IN3-8 IN3+9 IN4+10 IN4-11 IN4-11 IN4-11 IN4-11 V C 1 1 2 EN13 IN5-14 IN5-14 IN5-14 IN5-14 IN5+15 IN6+16 -8 IN3+9 IN4+10 IN4-11 IN4-11 IN4-11 IN4-11 V C 1 1 2 EN13 IN5-14 IN5-14 IN5-14 IN5-14 IN5+15 IN6+16 IN6-17 IN6-17 IN6-17 IN6-17 IN7-18 IN7-18 IN7-18 IN7-18 IN7+19 IN8+20 IN8-21 IN8-21 IN8-21 IN8-21 EN3422 EN3422 EN3422 EN3422 V E www.datasheetarchive.com/download/13996756-364914ZC/1620a.zip (1620a4-SCH.pdf) |
Linear | 16/05/2011 | 6141.4 Kb | ZIP | 1620a.zip |
| TECHNOLOGY PARTS. 4 g20 g21 2-CHANNEL PARTS. 4 g21 g21 2-CHANNEL, HIGH 1 1 V E 2 2 EN123 EN123 EN123 EN123 IN1-4 IN1+5 IN2+6 IN2-7 IN3-8 IN3+9 IN4+10 IN4-11 IN4-11 IN4-11 IN4-11 V C 1 1 2 EN13 IN5-14 IN5-14 IN5-14 IN5-14 IN5+15 IN6+16 -8 IN3+9 IN4+10 IN4-11 IN4-11 IN4-11 IN4-11 V C 1 1 2 EN13 IN5-14 IN5-14 IN5-14 IN5-14 IN5+15 IN6+16 IN6-17 IN6-17 IN6-17 IN6-17 IN7-18 IN7-18 IN7-18 IN7-18 IN7+19 IN8+20 IN8-21 IN8-21 IN8-21 IN8-21 EN3422 EN3422 EN3422 EN3422 V E www.datasheetarchive.com/download/13996756-364914ZC/1620a.zip (1620a4-SCH.pdf) |
Linear | 16/05/2011 | 6141.4 Kb | ZIP | 1620a.zip |