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5962-8863401UC Intersil Corporation 32KX8 EEPROM 5V, 120ns, CPGA28, CERAMIC, PGA-28 visit Intersil
ICM7218DIJIZ Intersil Corporation LED DRVR 64Segment 5V 28-Pin CDIP visit Intersil
X28HC256KMB-12 Intersil Corporation 32KX8 EEPROM 5V, 120ns, CPGA28, CERAMIC, PGA-28 visit Intersil
X28HC256KM-90 Intersil Corporation 32KX8 EEPROM 5V, 90ns, CPGA28, PGA-28 visit Intersil
X28HC256KM-15 Intersil Corporation 32KX8 EEPROM 5V, 150ns, CPGA28, CERAMIC, PGA-28 visit Intersil
X28HC64KMB-90 Intersil Corporation 8KX8 EEPROM 5V, 90ns, CPGA28, PGA-28 visit Intersil

6 pin Package 02n

Catalog Datasheet MFG & Type PDF Document Tags

AZ1015-02N

Abstract: EQUIVALENT 02n IEEE 1394 Firewire Ports Video Graphics Cards SIM ports Pin Configuration Description AZ1015-02N , pin to GND pin 4 5 6 7 8 9 10 11 12 13 Peak pulse Current (A , Protection Array For High Speed Data Interfaces B. Device Connection protection pin of AZ1015-02N becomes very small. Because the pin 4 of AZ1015-02N is directly connected to VDD rail, the VDD rail also , ground pin (pin1) of AZ1015-02N is a negative reference pin. This pin should be directly connected to
Amazing Microelectronics
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Abstract: IEEE 1394 Firewire Ports Video Graphics Cards SIM ports Pin Configuration Description AZ1015-02N , pin to GND pin 4 5 6 7 8 9 10 11 12 13 Peak pulse Current (A , AZ1015-02N becomes very small. Because the pin 4 of AZ1015-02N is directly connected to VDD rail, the , pin3) of AZ1015-02N. The ground pin (pin1) of AZ1015-02N is a negative reference pin. This pin should , inductance, the path length should keep as short as possible. In addition, the power pin (pin 4) of AZ1015-02N Amazing Microelectronics
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HIGH VOLTAGE DIODE 6kv

Abstract: sot143 TOP marking 16 SIM ports Circuit Diagram 4 2 1 Pin Configuration Description SSEPAA5-02N is a high , Parameters: tr=8s td=20s 1.0 I/O pin to GND pin 0.5 0.0 4 5 6 7 8 9 10 11 , pin (pin1) of SSEPAA5-02N is a negative reference pin. This pin should be directly connected to the , keep as short as possible. In addition, the power pin (pin 4) of SSEPAA5-02N is a positive reference pin. This pin should directly connect to the VDD rail of PCB. When pin 4 of SSEPAA5-02N is connected
Silicon Standard
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amazing

Abstract: DIODE T25 4 Protection Array For High Speed Data Interfaces B. Device Connection protection pin of AZC002-02N becomes very small. Because the pin 4 of AZC002-02N is directly connected to VDD rail, the VDD rail also , ground pin (pin1) of AZC002-02N is a negative reference pin. This pin should be directly connected to , should keep as short as possible. In addition, the power pin (pin 4) of AZC002-02N is a positive reference pin. This pin should directly connect to the VDD rail of PCB. When pin 4 of AZC002-02N is
Amazing Microelectronics
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Abstract: operating systems Pin Configuration Description VDD I/O 2 4 AZ1013-02N is a high , power pin (pin 4) of AZ1013-02N dose not be tied the VDD potential of the protected system, e.g. be floated, the leakage current of ESD protection pin of AZ1013-02N becomes large. Therefore, the power pin (pin 4) of AZ1013-02N is not allowed to be floated when the protected system is operating. AZ1013-02N , . The ground pin (pin1) of AZ1013-02N is a negative reference pin. This pin should be directly Amazing Microelectronics
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Abstract: Video Graphics Cards SIM ports Description Pin Configuration AZC015-02N is a high performance , to Pin 1 1 μA 9 V 0.8 1 V 8.1 9 V 6 IF = 15mA, T=25 oC Pin 1 to , Array For High Speed Data Interfaces B. Device Connection protection pin of AZC015-02N becomes very small. Because the pin 4 of AZC015-02N is directly connected to VDD rail, the VDD rail also can , ground pin (pin1) of AZC015-02N is a negative reference pin. This pin should be directly connected to Amazing Microelectronics
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c09x

Abstract: AZC015-02N Video Graphics Cards SIM ports Description Pin Configuration AZC015-02N is a high performance , V 0.8 1 V 8.1 9 V 6 IF = 15mA, T=25 oC Pin 1 to Pin 4 IPP=5A, tp=8/20s, T , Connection protection pin of AZC015-02N becomes very small. Because the pin 4 of AZC015-02N is directly , (pin2 and pin3) of AZC015-02N. The ground pin (pin1) of AZC015-02N is a negative reference pin. This , ) of AZC015-02N is a positive reference pin. This pin should directly connect to the VDD rail of PCB
Amazing Microelectronics
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Abstract: Video Graphics Cards SIM ports Description Pin Configuration AZC015-02N is a high performance , pF Revision 2007/05/15 ©2007 Amazing Micro. 2 6 V V www.amazingIC.com AZC015-02N , Array For High Speed Data Interfaces B. Device Connection protection pin of AZC015-02N becomes very small. Because the pin 4 of AZC015-02N is directly connected to VDD rail, the VDD rail also can , ground pin (pin1) of AZC015-02N is a negative reference pin. This pin should be directly connected to Amazing Microelectronics
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Abstract: Video Graphics Cards SIM ports Description Pin Configuration AZC002-02N is a high performance , Interfaces B. Device Connection protection pin of AZC002-02N becomes very small. Because the pin 4 of , the ESD protection pins (pin2 and pin3) of AZC002-02N. The ground pin (pin1) of AZC002-02N is a , addition, the power pin (pin 4) of AZC002-02N is a positive reference pin. This pin should directly connect to the VDD rail of PCB. When pin 4 of AZC002-02N is connected to the VDD rail, the leakage Amazing Microelectronics
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PL123-02N

Abstract: 6 pin Package 02n Part /Order Number PL123-02NGC-R Marking P123-02N Package Option 6-Pin DFN (Tape and Reel , 200 MHz. A space-saving 6-pin DFN package enables designs requiring minimal board area. BLOCK DIAGRAM PIN CONFIGURATION AND DESCRIPTION 1 2 3 PL123-02N FIN CLK1 GND 6 5 4 OE VDD , Operating temperature range from -40°C to 85°C · Available in space-saving 6-pin DFN GREEN/RoHS compliant , ) PL123-02N DC ­ 200 MHz 1:2 Fan-Out Buffer with OE ORDERING INFORMATION (GREEN PACKAGE COMPLIANT
PhaseLink
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PL123-02N 6 pin Package 02n 6 pin 02n PL-123 MARKING 02n P123-02N

PL123-02NGI-R

Abstract: MARKING 02n non SST · Operating temperature range from -40°C to 85°C · Available in space-saving 6-pin DFN GREEN/RoHS compliant package. DESCRIPTION The PL123-02N is a low-cost general purpose 1-to-2 LVCMOS , space-saving 6pin DFN package enables designs requiring minimal board area. BLOCK DIAGRAM PIN , Output GND 3 P GND connection FIN 1 I Reference input pin OE 6 O , (Preliminary) PL123-02N DC ­ 200 MHz 1:2 Fan-Out Buffer ORDERING INFORMATION (GREEN PACKAGE COMPLIANT
PhaseLink
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PL123-02NGI-R
Abstract: ) Table 1-1 Ordering Information Type Package Configuration Marking code ESD307-U1-02N , 6 Revision 1.0, 2014-05-30 ESD307-U1-02N Typical Characteristics Diagrams 4 Typical , , 2014-05-30 ESD307-U1-02N Typical Characteristics Diagrams 75 Scope: 6 GHz, 20 GS/s VCL [V , positive pulse from pin 1 to pin 2 25 Scope: 6 GHz, 20 GS/s VCL [V] 0 -25 VCL-max-peak = , pin 2 Final Data Sheet 8 Revision 1.0, 2014-05-30 ESD307-U1-02N Typical Characteristics Infineon Technologies
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ESD307-U1-02N AN210
Abstract: 1-1 Pin Configuration and Schematic Diagram (in mm) Table 1-1 Part Information Type Package , 1.0, 2014-05-28 ESD311-U1-02N Typical Characteristics Diagrams 75 Scope: 6 GHz, 20 GS/s , ), 8 kV positive pulse from pin 1 to pin 2 25 Scope: 6 GHz, 20 GS/s VCL [V] 0 -25 , 1 to pin 2 Final Data Sheet 7 Revision 1.0, 2014-05-28 ESD311-U1-02N Typical , Figure 4-5 Clamping voltage (ESD) VCL = f(t), 15 kV positive pulse from pin 1 to pin 2 25 Scope: 6 Infineon Technologies
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ESD311-U1-02N

MARKING 02n

Abstract: -02NGI-R *Note: LLL designates lot number Marking* 02N LLL 02N LLL Package Option 6-Pin DFN (Tape and Reel , temperature range from -40 C to 85 C Available in space-saving 6-pin DFN GREEN/RoHS compliant package. The PL123-02N is a low-cost general purpose 1-to-2 LVCMOS fan-out buffer. An output enable (OE) pin is , by the PL123-02N as the signal passes through the IC. A space-saving 6pin DFN package enables designs , Pin Assignment 1 2 3 4 5 6 Type I O P O P I Reference input pin Clock Output GND connection Clock
Micrel Semiconductor
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123-02N

MARKING 02n

Abstract: PL123-02N : Marking* 02N LLL 02N LLL Package Option 6-Pin DFN (Tape and Reel) 6-Pin DFN (Tape and Reel , Operating temperature range from -40C to 85C Available in space-saving 6-pin DFN GREEN/RoHS compliant package. DESCRIPTION The PL123-02N is a low-cost general purpose 1-to-2 LVCMOS fan-out buffer. An , space-saving 6pin DFN package enables designs requiring minimal board area. BLOCK DIAGRAM PIN , ) Symbol Min 0.50 0.60 A1 0.00 Pin 6 ID Chamfer Max A e b 0.05 A3 b 0.27
PhaseLink
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HT48R01B

Abstract: HT46R02B HT46R01B/02B/01N/02N HT48R01B/02B/01N/02N Small Package 8-Bit OTP MCU Technical Document · , MSOP, 16-pin NSOP package types · Oscillator types: External high frequency Crystal External RC , l O s c illa to r February 12, 2010 HT46R01B/02B/01N/02N HT48R01B/02B/01N/02N Pin , 4 8 R 0 2 N 1 6 N S O P -A H T 4 6 R 0 1 N /H T 4 6 R 0 2 N 1 6 N S O P -A Pin Description , External Timer 1 clock input Oscillator pin 3 February 12, 2010 HT46R01B/02B/01N/02N HT48R01B
Holtek
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HT46R02B PWM PA5 HT48R01 ht48r01n HT-48 HT46R01B HT46R01B/02B/01N/02N HT48R01B/02B/01N/02N HA0075E

D103D

Abstract: Q 101 Q102 TRANSISTOR represents the parasitics as they are measured at a significant distance from an AC ground pin. The package , model and the VCC line. Since the current in the VEE pin is a constant, a package model for VEE pin is , Package ESD and OPEN PIN DEFAULT BIAS VCC VCC D101u R101 39.5m D L101 753.3pH 101 , INPUT BUFFER Input Buffer 16 pin QFN Package ESD and Open Pin Default BIAS VCC VCC R104 , BUFFER Input Buffer QFN Package ESD and OPEN PIN DEFAULT BIAS VCC VCC D101u In R101
ON Semiconductor
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AND8157/D D103D Q 101 Q102 TRANSISTOR d106d D104d C101B cc11b

IR3G01

Abstract: high speed comparator voltage range 5. 14-pin dual-in-line package (IR3G01/IR3G02) 14-pin small-outline package (IR3G01N , High Speed Comparator IR3G 01/IR3G 01N/IR 3G 02/IR3G 02N IR3G01/IR3G01N/IR3G02/IR3G02N High Speed Comparator Description Pin Connections The IR3G01/IR3G01N/IR3G02/IR3G02N is a high speed , circuits. The IR 3G 02/IR 3G 02N has darlington stages in addition to the IR3G01/IR3G01N. and operates on , 3G 02/IR 3G 02N Absolute Maximum Ratings Parameter Supply voltage* Output voltage
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OCR Scan
IR3G01 high speed comparator IR3G02 IR3G01N/ IR3G02N 1R3G02N
Abstract: HT46R01B/02B/01N/02N HT48R01B/02B/01N/02N Small Package 8-Bit OTP MCU Technical Document  , consumption · 10-pin MSOP, 16-pin NSOP package types · Oscillator types: External high freuency , December 15, 2009 HT46R01B/02B/01N/02N HT48R01B/02B/01N/02N Pin Assignment P A 3 /IN T 1 1 0 P , 0 1 N /H T 4 6 R 0 2 N 1 6 N S O P -A Pin Description HT46R01B/HT46R02B Pin Name Function , Oscillator pin 3 December 15, 2009 HT46R01B/02B/01N/02N HT48R01B/02B/01N/02N Pin Name Function Holtek
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Abstract: HT46R01B/02B/01N/02N HT48R01B/02B/01N/02N Small Package 8-Bit OTP MCU Technical Document  , consumption · 10-pin MSOP, 16-pin NSOP package types · Oscillator types: External high frequency , /02B/01N/02N HT48R01B/02B/01N/02N Pin Assignment P A 3 /IN T 1 1 0 P A 4 /T C 1 P A 3 /IN , 0 2 N 1 6 N S O P -A Pin Description HT46R01B/HT46R02B Pin Name Function OPT I/T , Oscillator pin 3 February 12, 2010 HT46R01B/02B/01N/02N HT48R01B/02B/01N/02N Pin Name Function Holtek
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