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1 - 18 of about 18 for 54SX |
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First line: Application Note Power-Up Power-Down Behavior 54SX RT54SX Devices benefits Actels nonvolatile antifuse Abstract: .. Power-Up and Power-Down Behavior of 54SX and RT54SX Devices Introduction. One of the key benefits of Actel’s nonvolatile antifuse FPGA technology is the ability of the devices to be live at power .. datasheet abstract.. |
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First line: Errata v2.0 54SX Family FPGAs RadTolerant HiRel Errata Table page Maximum Input Abstract: .. 54SX Family FPGAs RadTolerant and HiRel Errata In Table 1 on page 8, the Maximum Input Tolerance for the A54SX16 and A54SX32 devices is incorrect. Here is how the table should appear. Table 1 • Supply .. datasheet abstract.. |
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First line: Guide ACTgen Macros more information about Actels products call 888-99-ACTEL visit site Abstract: .. Family Support ACT 1, ACT 2/1200XL, ACT 3, 3200DX, 40MX, 42MX, 54SX, 54SX-A, eX. Description. Cin. Sum. Cout. DataA. DataB. Port Description. Port Name Size Type Req/Opt Function. DataA WIDTH Input Req .. datasheet abstract.. |
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106 Pages 
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First line: v3.1 54SX Family FPGAs Internal Performance Clock-to-Out Pin-to-Pin Input Set-Up Clock Skew Abstract: .. 54SX Family FPGAs Leading Edge Performance. • 320 MHz Internal Performance. 3.7 ns Clock-to-Out Pin-to-Pin 0.1 ns Input Set-Up. 0.25 ns Clock Skew. Specifications. 12,000 to 48,000 System Gates .. datasheet abstract.. |
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57 Pages |
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First line: 54SX Family FPGAs RadTolerant HiRel Available Logic Gates User I / Os Dedicated Flip-Flops Abstract: .. 54SX Family FPGAs RadTolerant and HiRel Features. RadTolerant 54SX Family. • Tested Total Ionizing Dose TID Survivability Level. Radiation Performance to 100Krads Si ICC Standby Parametric .. datasheet abstract.. |
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36 Pages 
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First line: v3.0.1 54SX Family FPGAs Lead ance Feat Internal Performance Clock-to-Out Pin-to-Pin Input Abstract: .. 54SX Family FPGAs Leading Edge Performance. • 320 MHz Internal Performance. 3.7 ns Clock-to-Out Pin-to-Pin 0.1 ns Input Set-Up. 0.25 ns Clock Skew. Specifications. 12,000 to 48,000 System Gates .. datasheet abstract.. |
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70 Pages |
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First line: Preliminary v1.5.2 54SX Family FPGAs RadTolerant HiRel User I / Os Dedicated Flip-Flops Tested Abstract: .. 54SX Family FPGAs RadTolerant and HiRel Features. RadTolerant 54SX Family. • Tested Total Ionizing Dose TID Survivability Level. Radiation Performance to 100Krads Si ICC Standby Parametric .. datasheet abstract.. |
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40 Pages 
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First line: v2.0 Cyclic Redundancy Code Generator Macro highlights Cyclic Redundancy Codes CRC Generator Abstract: .. The CRC Generator application generates VHDL code specifically for use in the 54SX-A family. The RTL VHDL code generated is simply designed to take advantage of the SX-A silicon features. This .. datasheet abstract.. |
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8 Pages |
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First line: v3.0 Arbiter Core Support Five Masters Support Arbitration Schemes Pure Rotation Fair Abstract: .. Device Utilization 54SX Approximately 100-150 Modules. General Description. The Arbiter core is used to efficiently manage access to a PCI bus that is shared by several masters. Access to the .. datasheet abstract.. |
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First line: v3.2 Family FPGAs Leading Edge Performance Internal Performance Clock-to-Out Pin-to-Pin Input Setup Abstract: .. 54SX Family FPGAs. v3.2 2-1. Package Pin Assignments. 84-Pin PLCC. Note For Package .. 54SX Family FPGAs. v3.2 2-3. 208-Pin PQFP. Note For Package Manufacturing and Environmental .. datasheet abstract.. |
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64 Pages 


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First line: Using Synplify Design Actel Radiation-Hardened FPGAs Actels RadHard RadTolerant FPGAs offer Abstract: .. CC-FFs cannot be implemented in 54SX devices at this time. CC-FFs typically use twice the area resources of S-FFs. Using Triple Voting. Triple voting, or triple module redundancy TMR , produces .. datasheet abstract.. |
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8 Pages 
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First line: v4.0 Cyclic Redundancy Code Generator Macro highlights Cyclic Redundancy Codes CRC Generator Abstract: .. Table 2 54SX-A Utilization and Performance Statistics. CRC Configuration with an SXA08 Device Sequential/Total Used Modules. Percent % 54SXA08 Maximum Clock Frequency MHz 1. Maximum System .. datasheet abstract.. |
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6 Pages |
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First line: v2.1 Family FPGAs RadTolerant HiRel Features RadTolerant Family Tested Total Ionizing Dose Abstract: .. For more information on plastic packages, refer to the 54SX Family FPGAs datasheet. The A54SX16 and A54SX32 devices are manufactured using a 0.35 μ technology at the Chartered. Semiconductor .. datasheet abstract.. |
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46 Pages 
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First line: Verilog Simulation Guide Windows UNIX Environments Actel Corporation Sunnyvale Actel Corporation. rights Abstract: .. family ACT1, ACT2 for ACT 2 and 1200XL devices , ACT3, 3200DX, 40MX, 42MX, 54SX, 54SX-A, and eX as needed. For example: edn2vlog fam:<act_fam> <design_name> Compiled Verilog libraries are .. datasheet abstract.. |
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43 Pages 
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First line: v1.0 Controller CoreI2C v2.0 Netlist Version Structural Verilog VHDL Netlists with without Abstract: .. 54SX Family. RT54SXS Family. eX Family. MX Family. Core Deliverables. Evaluation Version .. datasheet abstract.. |
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15 Pages |
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First line: CoreCORDIC CORDIC Generator Product Summary Intended COordinate Rotation DIgital Computer CORDIC Rotator Abstract: .. 54SX-A Speed Grade –2. 54SX72A Bit-serial Rotate 190 105 295 5% 67 8,627. Vector 195 105 300 5% 71 8,141. 54SX72A Word-serial Rotate 656 132 788 13% 55 455. Vector 643 124 767 13% 50 500. RT54SX-S Speed .. datasheet abstract.. |
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First line: v3.1 RadTolerant FPGAs Features General Characteristics Tested Total Ionizing Dose TID Survivability Abstract: .. For more information, refer to the Power-Up and Power-Down Behavior of 54SX and RT54SX Devices application note. Table 1-5 Electrical Specifications. Symbol Parameter Test Condition. Commercial .. datasheet abstract.. |
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54 Pages 
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First line: v3.1 RadTolerant FPGAs Features General Characteristics Tested Total Ionizing Dose TID Survivability Abstract: .. For more information, refer to the Power-Up and Power-Down Behavior of 54SX and RT54SX Devices application note. Table 1-5 Electrical Specifications. Symbol Parameter Test Condition. Commercial .. datasheet abstract.. |
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54 Pages 
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