54SX datasheet and application note, data sheet, circuit, pdf, cross reference, pinout

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		1 - 4 of about 4 for 54SX
54SX	Actel Corporation	FPGAs RadTolerant and HiRel	303.91 Kb, 36 Pages.

54SXxx	Actel Corporation	FPGAs	378.47 Kb, 57 Pages.

54SXxx	Actel Corporation	General Purpose SDRAM Controller	70.11 Kb, 5 Pages.

54SXxxA	Actel Corporation	SX-A Family FPGAs	655.48 Kb, 108 Pages.

	1 - 23 of about 23 for 54SX
First line: actel fpga 54sx32 54SX32* Application Note AC145 Power-Up Power-Down Behavior 54SX RT54SX Devices benefits Actel's nonvolatile antifuse FPGA technology ability devices live power-up. Since configuration PROMs required download design information device, Actel FPGAs ready soon power-up sequence compl Abstract: .. January 2001 1. � 2000 Actel Corporation. Power-Up and Power-Down Behavior of 54SX and RT54SX Devices Introduction. One of the key benefits of Actel’s nonvolatile antifuse FPGA technology is the .. Tags: 54SX32* actel fpga 54sx32 AC145	53.55 Kb	4 Pages	Original

First line: 54SX32* Power-Up Power-Down Behavior 54SX RT54SX Devices benefits Actel's nonvolatile antifuse FPGA technology ability devices live power-up. Since configuration PROMs required download design information device, Actel FPGAs ready soon power-up sequence complete. However, there restrictions that nee Abstract: .. Power-Up and Power-Down Behavior of 54SX and RT54SX Devices Introduction. One of the key benefits of Actel’s nonvolatile antifuse FPGA technology is the ability of the devices to be live at power .. Tags: 54SX32* 54SX* RT54SX	52.15 Kb	4 Pages	Original

First line: actel A54SX32 54SX Family FPGAs RadTolerant HiRel Errata Table page Maximum Input Tolerance A54SX16 A54SX32 devices incorrect. Here table should appear. Table Supply Voltages Devices A54SX16 A54SX32 RT54SX16 RT54SX32 VCCA 3.3V 3.3V VCCI 3.3V 3.3V VCCR 5.0V 5.0V Maximum Input Tolerance 5.0V 5.0V Maxi Abstract: .. 54SX Family FPGAs RadTolerant and HiRel Errata In Table 1 on page 8, the Maximum Input Tolerance for the A54SX16 and A54SX32 devices is incorrect. Here is how the table should appear. Table 1 • Supply .. Tags: A54SX32 actel* RT54SX16 RT54SX32	25.04 Kb	2 Pages	Original

First line: vhdl code for a updown counter for FPGA vhdl code for Booth multiplier vhdl code for 4 bit updown counter vhdl code for a updown counter booth multiplier code in vhdl Guide ACTgen Macros more information about Actel's products, call 888-99-ACTEL visit site http://www.actel.com Actel Corporation East Abstract: .. Family Support ACT 1, ACT 2/1200XL 1200XL , ACT 3, 3200DX 3200DX , 40MX 40MX , 42MX 42MX , 54SX, 54SX-A, eX. Description. Cin. Sum. Cout. DataA. DataB. Port Description. Port Name Size Type Req/Opt Function. DataA WIDTH Input Req .. Tags: booth multiplier code in vhdl vhdl code for 4 bit updown counter vhdl code for Booth multiplier vhdl code for a updown counter for FPGA vital activator vhdl code for a updown counter datasheet abstract..	1196.74 Kb	106 Pages	Original

First line: THERMAL Fuse m20 tf 115 c 54SX Family FPGAs Internal Performance Clock-to-Out (Pin-to-Pin) Input Set-Up 0.25 Clock Skew Abstract: .. 54SX Family FPGAs Leading Edge Performance. • 320 MHz Internal Performance. 3.7 ns Clock-to-Out Pin-to-Pin 0.1 ns Input Set-Up. 0.25 ns Clock Skew. Specifications. 12,000 to 48,000 System Gates .. Tags: THERMAL Fuse m20 tf 115 c A54SX72A datasheet abstract..	378.47 Kb	57 Pages	Original

First line: RTSX32 54SX Family FPGAs RadTolerant HiRel Abstract: .. 54SX Family FPGAs RadTolerant and HiRel Features. RadTolerant 54SX Family. • Tested Total Ionizing Dose TID Survivability Level. Radiation Performance to 100Krads 100Krads Si ICC Standby Parametric .. Tags: RTSX32 RT54SX32-CQ208 datasheet abstract..	303.91 Kb	36 Pages	Original

First line: v3.0.1 54SX Family FPGAs Lead ance Feat Internal Performance Clock-to-Out (Pin-to-Pin) Input Set-Up 0.25 Clock Skew Abstract: .. 54SX Family FPGAs Leading Edge Performance. • 320 MHz Internal Performance. 3.7 ns Clock-to-Out Pin-to-Pin 0.1 ns Input Set-Up. 0.25 ns Clock Skew. Specifications. 12,000 to 48,000 System Gates .. Tags: datasheet abstract..	577.31 Kb	70 Pages	Original

First line: RTSX32 54SX Family FPGAs RadTolerant HiRel Abstract: .. 54SX Family FPGAs RadTolerant and HiRel Features. RadTolerant 54SX Family. • Tested Total Ionizing Dose TID Survivability Level. Radiation Performance to 100Krads 100Krads Si ICC Standby Parametric .. Tags: RTSX32 datasheet abstract..	318.27 Kb	40 Pages	Original

First line: CRC-16 ccitt parallel to serial conversion vhdl CRC8 and crc16 vhdl code CRC� vhdl code CRC Cyclic Redundancy Code Generator Macro highlights Cyclic Redundancy Codes (CRC) Generator follow: Calculation Multiple Algorithm Support CRC8 (HEC) CRC10 (OAM) CANbus (SDLC, HDLC, CRC-CCITT) CRC16 CRC16 inver Abstract: .. The CRC Generator application generates VHDL code specifically for use in the 54SX-A family. The RTL VHDL code generated is simply designed to take advantage of the SX-A silicon features. This .. Tags: vhdl code CRCÂ CRC8 and crc16 parallel to serial conversion vhdl CRC-16 ccitt vhdl code for 9 bit parity generator vhdl code for 8-bit parity generator vhdl code CRC polynomial* CRC-32 for FDDI CRC-16 and CRC-32 Ethernet CRC10 "XOR Gates" CRC10 CRC16 CRC32 Win32	70.85 Kb	8 Pages	Original

First line: voting elements Application Note AC134 Minimizing Single Event Upset Effects Using Synopsys This application note gives overview some single event upset (SEU) resistant design techniques describes implement these techniques using Synopsys. Familiarity with Synopsys FPGA Compiler tool "dc_shell& Abstract: .. The 54SX device family also contains two types of logic modules, register cells R-cells and combinatorial cells C-cells . R-cells contain only a sequential logic element. C-cells contain .. Tags: voting elements ac134 AC134	29.19 Kb	4 Pages	Original

First line: Arbiter Core Support Five Masters Support Arbitration Schemes Pure Rotation Fair Rotation Support Parking Hidden Arbitration Interface with Implementation Actel's Family VHDL Code Device Utilization (54SX) Approximately 100-150 Modules Abstract: .. Device Utilization 54SX Approximately 100-150 Modules. General Description. The Arbiter core is used to efficiently manage access to a PCI bus that is shared by several masters. Access to the .. Tags: datasheet abstract..	60.47 Kb	4 Pages	Original

First line: Family FPGAs Abstract: .. 54SX Family FPGAs. v3.2 2-1. Package Pin Assignments. 84-Pin 84-Pin PLCC. Note For Package .. 54SX Family FPGAs. v3.2 2-3. 208-Pin 208-Pin PQFP. Note For Package Manufacturing and Environmental .. Tags: datasheet abstract..	439.47 Kb	64 Pages	Original

First line: voting elements Synplify tmr cati Using Synplify Design Actel Radiation-Hardened FPGAs Actel's RadHard RadTolerant FPGAs offer advantages applications commercial military satellites, deep space probes, types military high reliability equipment. Synplify version 5.31 later provides designers radiatio Abstract: .. CC-FFs cannot be implemented in 54SX devices at this time. CC-FFs typically use twice the area resources of S-FFs. Using Triple Voting. Triple voting, or triple module redundancy TMR , produces .. Tags: Synplify tmr voting elements Technique datasheet abstract..	92.1 Kb	8 Pages	Original

First line: voting elements Application Note AC139 Using Synplify Design Actel Radiation-Hardened FPGAs Actel's RadHard RadTolerant FPGAs offer advantages applications commercial military satellites, deep space probes, types military high reliability equipment. Synplify version 5.31 later provides designers rad Abstract: .. CC-FFs cannot be implemented in 54SX devices at this time. CC-FFs typically use twice the area resources of S-FFs. Using Triple Voting. Triple voting, or triple module redundancy TMR , produces .. Tags: voting elements AC139 AC139	94.93 Kb	8 Pages	Original

First line: polynomials vhdl code CRC Cyclic Redundancy Code Generator Macro highlights Cyclic Redundancy Codes (CRC) Generator follow: Calculation Multiple Algorithm Support CRC8 (HEC) CRC10 (OAM) CANbus (SDLC, HDLC, CRC-CCITT) CRC16 CRC16 inverted CRC32 User defined polynomial Win32 console application that g Abstract: .. Table 2 54SX-A Utilization and Performance Statistics. CRC Configuration with an SXA08 SXA08 Device Sequential/Total Used Modules. Percent % 54SXA08 Maximum Clock Frequency MHz 1. Maximum System .. Tags: polynomials vhdl code for 9 bit parity generator vhdl code for 8-bit parity generator vhdl code CRC polynomial* CRC-32 for FDDI CRC-16 and CRC-32 Ethernet CRC-16 and CRC-32 CRC10 crc 16 crc 10 in atm CRC10 CRC16 CRC32 Win32	72.49 Kb	6 Pages	Original

First line: RT54SX32-CQ208 RTSX32 Family FPGAs RadTolerant HiRel RadTolerant Family Abstract: .. For more information on plastic packages, refer to the 54SX Family FPGAs datasheet. The A54SX16 and A54SX32 devices are manufactured using a 0.35 μ technology at the Chartered. Semiconductor .. Tags: RTSX32 RT54SX32-CQ208 datasheet abstract..	344.23 Kb	46 Pages	Original

First line: SRFE EGS03(ioooa) MftWf^m Outline drawings GEIMERAL-USE THYRISTOR Features Flat package type Large di/dt Large dv/dt BiifiiS High voltage capability Applications Abstract: .. VT= I, 16+0.54SX 10"' IT. i .I, I TI= 125'1:: Max, I ---T T g25 G~ i / 2500. :.II 2000 ;m I, A ot. VI. "I .. Tags: SRFE datasheet abstract..	205.56 Kb	4 Pages	OCR Scan

First line: Verilog® Simulation Guide Windows UNIX® Environments Actel Corporation, Sunnyvale, 94086 Abstract: .. family ACT1, ACT2 for ACT 2 and 1200XL 1200XL devices , ACT3, 3200DX 3200DX , 40MX 40MX , 42MX 42MX , 54SX, 54SX-A, and eX as needed. For example: edn2vlog fam:<act_fam> <design_name> Compiled Verilog libraries are .. Tags: ftp 7425 datasheet abstract..	1079.79 Kb	43 Pages	Original

First line: Controller CoreI2C v2.0 Abstract: .. 54SX Family. RT54SXS Family. eX Family. MX Family. Core Deliverables. Evaluation Version .. Tags: sla family datasheet abstract..	609.92 Kb	15 Pages	Original

First line: vhdl cordic code vhdl code for rotation cordic� verilog code for cordic cordic vhdl code for cordic CoreCORDIC CORDIC Generator Intended COordinate Rotation DIgital Computer (CORDIC) Rotator Function Actel FPGAs Evaluation Version Supports CORDIC Engine Test Harness Generation with Limited Paramete Abstract: .. 54SX-A Speed Grade –2. 54SX72A Bit-serial Rotate 190 105 295 5% 67 8,627. Vector 195 105 300 5% 71 8,141. 54SX72A Word-serial Rotate 656 132 788 13% 55 455. Vector 643 124 767 13% 50 500. RT54SX-S Speed .. Tags: vhdl code for rotation cordicÂ vhdl cordic code vhdl code for cordic verilog code for cordic vector generator MHZ vector generator CORDIC code for cordic datasheet abstract..	185.26 Kb	18 Pages	Original

First line: Libero Quick Start Guide Software v8.4 Actel Corporation, Mountain View, 94043 2008 Actel Corporation. rights reserved. Printed United States America Part Number: 5029123-14 Release: November 2008 part this document copied reproduced form means without prior written consent Actel. Actel makes warran Abstract: .. 54SX-A and older. Libero IDE Overview. 8 Libero IDE Quick Start Guide for Software v8.4. Project Manager The Project Manager integrates design tools, streamlines your design flow, manages designs .. Tags: Synplify FlashPro3 Core from Libero datasheet abstract..	2327.29 Kb	58 Pages	Original

First line: CQFP 172 PIN A1020 transistor VKS FPGA CQFP 172 RT14100A rt1280 RadTolerant FPGAs General Characteristics Abstract: .. For more information, refer to the Power-Up and Power-Down Behavior of 54SX and RT54SX Devices application note. Table 1-5 Electrical Specifications. Symbol Parameter Test Condition. Commercial .. Tags: rt1280 RT14100A VKS FPGA CQFP 172 CQFP 172 PIN A1280A-CQ172C* A1020A A1020 transistor A1020 datasheet abstract..	292.05 Kb	54 Pages	Original

First line: A1020 transistor VKS FPGA CQFP 106 RadTolerant FPGAs General Characteristics Abstract: .. For more information, refer to the Power-Up and Power-Down Behavior of 54SX and RT54SX Devices application note. Table 1-5 Electrical Specifications. Symbol Parameter Test Condition. Commercial .. Tags: VKS FPGA CQFP 106 RT14100A A1280A-CQ172C* A1020B A1020A A1020 transistor A1020 datasheet abstract..	303.86 Kb	54 Pages	Original