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54S/74S

Catalog Datasheet MFG & Type PDF Document Tags

counter 54LS/74LS

Abstract: N74LS197F AND FAN-OUT TABLE(a) PINS DESCRIPTION 54/74 54S/74S 54LS/74LS CPo Clock (active LOW going edge , Manufacturer DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE(C) PARAMETER TEST CONDITIONS 54/74 54S/74S , CHARACTERISTICS: TA=25°C (See Section 4 for Test Circuits and Conditions) 54/74 54S/74S 54LS/74LS , inside back cover for 54S/74S specifications. signotics This Material Copyrighted By Its Respective Manufacturer 359 PARAMETER 54/74 54S/74S 54LS/74LS TEST CONDITIONS Min Max Min Max Min Max UNIT
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N74LS197N N74LS197F S54LS197F S54LS197W counter 54LS/74LS 74S197 54/74197-S 54S/74S197-S 82S91 54LS/74LS197

74122 Retriggerable Monostable Multivibrator

Abstract: B74122F LOADING AND FAN-OUT TABLE(a) PINS DESCRIPTION 54/74 54S/74S S4LS/74LS Ã'1,Ã'2 Trigger (active LOW , 54S/74S 54LS/74LS UNIT Min Max Min Max Min Max 'OS Output short circuit current Vcc = Max -10 , Test Circuits and Conditions) PARAMETER TEST CONDITIONS 54/74 54S/74S 54LS/74LS UNIT Cl = 15pF , inside back cover for 54S/74S and 54LS/74LS specifications. signotics 193 AC SETUP REQUIREMENTS: Ta = 25°C (See Section 4 for Test Circuits and Conditions) PARAMETER TEST CONDITIONS 54/74 54S/74S
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N74122N B74122F S54122F S54122W 74122 Retriggerable Monostable Multivibrator 54H/74H 54S/74S

74100 Latch

Abstract: latch 74ls 373 TABLE(a) PINS DESCRIPTION 54/74 54S/74S 54LS/74LS E Enable (active HIGH) input â IH (MA) IlLCmA) 320 , TEST CONDITIONS 54/74 54S/74S 54LS/74LS UNIT Min Max Min Max Min Max ICC Supply current Vcc = , for Test Circuits and Conditions) PARAMETER TEST CONDITIONS 54/74 54S/74S 54LS/74LS UNIT , back cover for 54S/74S and 54LS/74LS specifications. AC SETUP REQUIREMENTS: TA = 25°C (See Section 4 for Test Circuits and Conditions) TEST CONDETIONS 54/74 54S/74S 54LS/74LS UNIT PARAMETER Min
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74100 Latch latch 74ls 373 74100

N74LS379F

Abstract: N74LS379N TABLE«» PINS DESCRIPTION 54/74 54S/74S 54LS/74LS CP Clock (active HIGH going edge) input l|H (MA) l|L , ) PARAMETER TEST CONDITIONS 54/74 54S/74S 54LS/74LS UNIT Min Max Min Max Min Max ICC Supply current , ) PARAMETER TEST CONDITIONS 54/74 54S/74S 54LS/74LS UNIT CL = 15pF Rl = 2kS2 Min Max Min Max , /74 and 54H/74H, and see inside back cover for 54S/74S and 54LS/74LS specifications. 488 signatics , Section 4 for Test Circuits and Conditions) 54/74 54S/74S 54LS/74LS UNIT PARAMETER TEST
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N74LS379N N74LS379F S54LS379F S54LS379W d flipflop 54LS/74LS379

74LS299 APPLICATIONS

Abstract: 54LS ) lOH (mA) lOL (mA) lOH , OPERATING TEMPERATURE RANGE(b) PARAMETER TEST CONDITIONS 54/74 54S/74S 54LS/74LS UNIT Min Max Min , inside front cover for 54/74 and 54H/74H, and see inside back cover tor 54S/74S and 54LS/74LS , CONDITIONS 54/74 54S/74S 54LS/74LS UNIT C|_ = 45pF R|_ = 667Ì2 Min Max Min Max Min Max 'MAX , Circuits and Conditions) PARAMETER TEST CONDITIONS 54/74 54S/74S 54LS/74LS UNIT Min Max Min
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N74LS299N N74LS299F S54LS299F 74LS299 APPLICATIONS 54LS 74LS 54LS/74LS299

741s

Abstract: S5477W FAN-OUT TABLE(a) PINS DESCRIPTION 54/74 54S/74S 54LS/74LS d0-D3 Data inputs llH^A) l|L (nA) 80 -3.2 20 , OPERATING TEMPERATURE RANGE(b) PARAMETER TEST CONDITIONS 54/74 54S/74S 54LS/74LS UNIT Min Max Min Max , Test Circuits and Conditions) PARAMETER TEST CONDITIONS 54/74 54S/74S 54LS/74LS UNIT C|_ =15pF R , Conditions) PARAMETER TEST CONDITIONS 54/74 54S/74S 54LS/74LS UNIT Min Max Min Max Min Max tw , cover lor 54/74 and 54H/74H, and see inside back cover for 54S/74S and 54LS/74LS specifications
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OCR Scan
54LS77 S5477W S54LS77W 741s 54LS/741S

54LS221

Abstract: 74LS221 /74 54S/74S 54LS/74LS Ã" Trigger (active LOW) input I IH (mA) l|L (mA) 40 -1.6 20 -0.4 B Trigger , 54S/74S 54LS/74LS UNIT PARAMETER TEST CONDITIONS Min Max Min Max Min Max Ice Supply current Vcc , for Test Circuits and Conditions) 54/74 54S/74S 54LS/74LS PARAMETER TEST , 54S/74S 54LS/74LS UNIT PARAMETER TEST CONDITIONS Min Max Min Max Min Max tw Minimum input pulse , 54S/74S and 54LS/ 74LS specifications- 372 SignDtiCS This Material Copyrighted By Its Respective
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54LS221 74LS221 N74221N N74LS221N N74221F N74LS221F 74221 54221 74LS221 P 54LS/74LS2

LA50B

Abstract: 74LS399 OUTPUT LOADING AND FAN-OUT TABLE(a) PINS DESCRIPTION 54/74 54S/74S 54LS/74LS CP Clock (active HIGH , OVER OPERATING TEMPERATURE RANGE(b) PARAMETER TEST CONDITIONS 54/74 54S/74S 54LS/74LS UNIT Min , Section 4 for Test Circuits and Conditions) PARAMETER TEST CONDITIONS 54/74 54S/74S 54LS/74LS , Conditions) 54/74 54S/74S 54LS/74LS UNIT PARAMETER TEST CONDITIONS Min Max Min Max Min Max tw , tpHLâ'" V f" V l->-Iw- \ fi VM = 1.5V for 54/74 and 54S/74S; VM = 1.3V for 54LS/74LS. Figure 1 tÃ
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OCR Scan
N74LS399N N74LS399F S54LS399F S54LS399W LA50B 74LS399 74LS 04 functions 54LS/74LS399

Truth Table 74190

Abstract: 74LS190 pins INPUT AND OUTPUT LOADING AND FAN-OUT TABLE (a) PINS DESCRIPTION 54/74 54S/74S 54LS/74LS CP Clock , OVER OPERATING TEMPERATURE RANGE(b) 54/74 54S/74S 54LS/74LS UNIT PARAMETER TEST CONDITIONS , for 54S/74S and 54LS/74LS specifications. 328 signotics This Material Copyrighted By Its Respective Manufacturer AC CHARACTERISTICS: TA=25°C (See Section 4 for Test Circuits and Conditions) 54/74 54s/74s , REQUIREMENTS: TA = 25°C (See Section 4 for Test Circuits and Conditions) TEST CONDITIONS 54/74 54S/74S
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N74190N N74LS190N N74190F N74LS190F S54190F S54LS190F Truth Table 74190 74LS190 pins 74190 application 74LS190 application 74LS190 up down decade counter truth table of 74LS190 54LS/74LS190

74LS123A

Abstract: CY323 PINS DESCRIPTION 54/74 54S/74S 54LS/74LS Ã" Trigger (active LOW) input l|H 0"A) l|L (mA) 40 -1.6 20 , CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE(b) PARAMETER 54/74 54S/74S 54LS/74LS UNIT TEST CONDITIONS , Conditions) PARAMETER TEST CONDITIONS 54/74 54S/74S 54LS/74LS UNIT CL = 15pF RL = 4000 Cl = , for Test Circuits and Conditions) PARAMETER TEST CONDITIONS 54/74 54S/74S 54LS/74LS UNIT , back cove* for 54S/74S and 54LS/74LS specifications. signotics 197 This Material Copyrighted By Its
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N74123N N74LS123AN N74123F N74LS123AF S54123F S54LS123AF 74LS123A CY323 74123 74LS123 monostable multivibrator using 74123 54LS/74LS123A

latch 74259

Abstract: 74259 AND OUTPUT LOADING AND FAN-OUT TABLE(a) PINS DESCRIPTION 54/74 54S/74S 54LS/74LS Ao, Ai, A2 Address , /74 54S/74S 54LS/74LS UNIT Min Max Min Max Min Max Ice Supply current Vcc = Max 36 mA AC , /74 54S/74S 54LS/74LS UNIT CL = 15pF R|_ = 2 k Si Min Max Min Max Min Max tPLH , 54S/74S 54LS/74LS UNIT PARAMETER TEST CONDITIONS Min Max Min Max Min Max â'¢w Enable pulse width , 54S/74S; VM = 1.3V for 54LS/74LS. Figure 1 PROPAGATION DELAY DATA TO OUTPUT 4 \l I VM tPLH 1
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74LS259 NE590 N74LS259N N74LS259F S54LS259F S54LS259W latch 74259 74259 demultiplexer 74ls 8bit latch 74ls

74LS

Abstract: 74ls characteristics a) PINS 54/74 54H/74H 54S/74S S4LS/74LS Inputs Iil (mAI 50 -2.0 Outputs .'OH,^ Iol ImA) 250 , /74 54H/74H 54S/74S 54LS/74LS UNIT Min Max Min Max Min Max Min Max Icch Supply current Vcc = , CONDITIONS 54/74 54H/74H 54S/74S 54LS/74LS UNIT CL = 15pF RL = 280Ì1 Min Max Min Max Min , , and see inside back cover for 54S/74S and 54LS/74LS specification. 100 signotics This Material , 54S/74S65 PIN CONFIGURATION PACKAGES PIN CONF. COMMERCIAL RANGES Vcc - 5V ± 5%; TA = 0°C to
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OCR Scan
N74S65N N74S65F S54S65F S54S65W 74ls characteristics 54S/74S65

7428

Abstract: 74LS28 LOADING AND FAN-OUT TABLE (a) PINS 54/74 S4H/74H 54S/74S 54LS/74LS , . IIH (*iA) lnPuts I il 40 , (b> PARAMETER TEST CONDITIONS 54/74 54H/74H 54S/74S 54LS/74LS UNIT Mln Max Mln Max Min Max , characteristics see inside front cover for 54/74 and 54H/74H and see inside back cover for 54S/74S and 54LS/74LS , AC CHARACTERISTICS TA = 25°C (See Section 4 for Waveforms and Conditions.) 54/74 54H/74H 54S/74S 54LS/74LS PARAMETER TEST CONDITIONS rL = 133n ?P il « 45pF 6670 UNIT Min Max Min Max
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N7428N N74LS28N N7428F N74LS28F S5428F S54LS28F 7428 74LS28 S5428W S54LS28W 54LS/74LS28

74S196

Abstract: 82s90 TABLE(a) PINS DESCRIPTION 54/74 54S/74S 54LS/74LS cpo Clock (active LOW going edge) input to -5- 2 , CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE(d) PARAMETER TEST CONDITIONS 54/74 54S/74S 54LS/74LS UNIT , Section 4 for Test Circuits and Conditions) 54/74 54S/74S 54LS/74LS PARAMETER TEST CONDITIONS , ^'m J [â'¢-lw-J IPHL-^ [»-IPLH-^ â'"sl ]/â'" VM = 1.5V for 54/74 and 54S/74S; VM = 1,3V for 54LS/74LS Figure 1 PARALLEL DATA TO OUTPUT DELAYS u V -f-V M VM = 1.5V for 54/74 and 54S/74S; VM
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N74LS196N N74LS196F S54LS196F S54LS196W 74S196 82s90 pin diagram decade counter 74196 BCD counter circuit diagram max plus 54S/74S196 82S90 54LS/74LS196

74122 Retriggerable Monostable Multivibrator

Abstract: 64LS INPUT AND OUTPUT LOADING AND FAN-OUT TABLE(a) PINS DESCRIPTION 54/74 54S/74S 54LS/74LS Ã"1,Ã , CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE(b) TEST CONDITIONS 54/74 54S/74S 54LS/74LS UNIT PARAMETER , ) 54/74 54S/74S 54LS/74LS PARAMETER TEST CONDITIONS ?P II II 15pF 400SÃ UNIT Min Max Min , TEST CONDITIONS 54/74 54S/74S 54LS/74LS UNIT Min Max Min Max Min Max tw Minimum input pulse , 54S/74S; VM = 1.3V lor 64LS/74LS Figure 1 PROPAGATION DELAY B INPUT TO Q AND Q OUTPUT, AND INPUT AND
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64LS 74122 Retriggerable Monostable Multivibrator with 74122 400S 12S-C 54H/74-H

CI 7401

Abstract: N7451F (a) PINS 54/74 S4H/74H 54S/74S 54LS/74LS Inputs l|H , ) PARAMETER TEST CONDITIONS 54/74 54H/74H 54S/74S 54LS/74LS UNIT Min Max Min Max Mln Max Min Max 'CCH , ) PARAMETER TEST CONDITIONS 54/74 54H/74H 54S/74S 54LS/74LS UNIT CL = 15pF RL = 400Ã2 C|_ = 25pF RL = , see inside front cover for 54/74 and 54H. 74H. and see inside back cover for 54S/74S and 54LS/74LS , 54/7451 54H/74H51 54S/74S51 54LS/74LS51 ORDERING CODE (See Section 9 for further Package and
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OCR Scan
N7451N N74H51N N74S51N N74LS51N N7451F N74H51F CI 7401 7451 pin configuration 74H51 ci 7451 54S/74S51

74LS

Abstract: 74LS22 ) PINS 54/74 54H/74H 54S/74S S4LS/74LS Inputs llh (mA) Iil (mA) 50 -2.0 50 -2.0 20 -0.36 Outputs Ioh , Note b) PARAMETER TEST CONDITIONS 54/74 54H/74H 54S/74S 54LS/74LS UNIT Min Max Min Max Min , Conditions.) PARAMETER TEST CONDITIONS 54/74 54H/74H 54S/74S 54LS/74LS UNIT CL = 25 pF R|_ = 280à , cover for 54S/74S and 54LS/74LS specification. signDtics 59 This Material Copyrighted By Its , 54H/74H22 54S/74S22 54LS/74LS22 ORDERING CODE (See Section 9 for further Package and Ordering
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OCR Scan
N74H22N N74S22N N74LS22N N74H22F N74S22F N74LS22F 74LS22 74H22 74LS family 54S/74S22

74LS04 fan-out

Abstract: 7404 pin configuration OUTPUT LOADING AND FAN-OUT TABLE (See Note a) PINS 54/74 54H/74H 54S/74S 54LS/74LS Inputs Iih , 54/74 54H/74H 54S/74S 54LS/74LS UNIT Min Max Min Max Min Max Min Max ICCH Supply current , CONDITIONS 54/74 54H/74H 54S/74S 54LS/74LS UNIT CL = 15 pF RL= 400 a CL = 25 pF Rl = 280Ãà Cl = 15 , for 54S/74S and 54LS/74LS specification signotics 41 This Material Copyrighted By Its Respective , 54/7404 54H/74H04 54S/74S04 54LS/74LS04 ORDERING CODE (See Section 9 for further Package and
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OCR Scan
N74H04F N74LS04F S54H04F S54S04F S54H04W S54S04W 74LS04 fan-out 7404 pin configuration 7404 fan-out 74H04 74LS04 pin configuration 74LS04 54S/74S04 N7404N N74H04N N74S04N N74LS04N N7404F

N7409F

Abstract: N7409N ) Figure A PINS 54/74 54H/74H 54S/74S 54LS/74LS Inputs llh , RANGE (See Note b) PARAMETER TEST CONDITIONS 54/74 54H/74H 54S/74S 54LS/74LS UNIT Min Max Min , Conditions.) PARAMETER TEST CONDITIONS 54/74 54H/74H 54S/74S 54LS/74LS UNIT CL = 15pF RL = 400n CL , for 54S/74S and 54LS/74LS specification. 46 signDtics This Material Copyrighted By Its Respective , 54/7409 54S/74S09 54LS/74LS09 PIN CONFIGURATION ORDERING CODE (See Section 9 for further
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OCR Scan
N7409N N74S09N N74LS09N N7409F N74S09F N74LS09F 54S/74S09

CI 7410

Abstract: CI 74ls10 FAN-OUT TABLE (See Note a) PINS 54/74 54H/74H 54S/74S 54LS/74LS Inputs llH (MA> IIL (mA) 40 -1.6 50 , ) PARAMETER TEST CONDITIONS 54/74 54H/74H 54S/74S 54LS/74LS UNIT Min Max Min Max Min Max Min Max , .) PARAMETER TEST CONDITIONS 54/74 54H/74H 54S/74S 54LS/74LS UNIT C|_ = 15 pF RL = 400 Ã1 CL = 25 pF , see inside back cover for 54S/74S and 54LS/74LS specification sjgnotics 47 This Material , 54/7410 54H/74H10 54S/74S10 54LS/74LS10 ORDERING CODE (See Section 9 for further Package and
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N7410N N74H10N N74S10N N74LS10N N7410F N74H10F CI 7410 CI 74ls10 74LS10 ci 74s 54S/74S10

74LS386

Abstract: AND FAN-OUT TABLE < a) PINS 54/74 54H /74H 54S/74S 54LS/74LS TRUTH TABLE IN P U TS O UTPUT B , Max 54S/74S Min Max 54LS/74LS Min Max U N IT Icc Supply current Vcc = Max 10 mA AC CHARACTERISTICS = 25°C (See Section 4 for Waveforms and Conditions) 54/74 54H /74H 54S/74S 54LS/74LS C l = 15 , characteristics see inside fro n t cover fo r 54/74 and 54H/74H, and see in side back cover fo r 54S/74S and 54LS
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74LS386 54LS/74LS386 N74LS386N N74LS386F S54LS386F S54LS386W

74LS78

Abstract: fro n t cover fo r 54/74 and 54H/74H and see inside back cover fo r 54S/74S and 54LS/74LS specification. 54H/74H Min Max 54S/74S Min Max 54LS/74LS Min Max 8.0 UNIT Max Supply current , . AC CHARACTERISTICS Ta = 25°C (See Section 4 for Waveforms and Conditions) 54/74 54H/74H 54S/74S , /74 Min Max 54H/74H Min Max 54S/74S Min Max 54LS/74LS Min 20 13 25 20 0 Max ns ns ns ns ns UNIT tw , Common Reset input Set input Data inputs < *2 QI Figure A T] < » 2 54/74 3- E 54H/74H 54S
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74LS78 54LS/74LS78 N74LS78N N74LS78F S54LS78F S54LS78W

74152 PIN DIAGRAM

Abstract: Multiplexer 74152 TABLE (a) PINS DESCRIPTION 54/74 54S/74S 54LS/74LS So - s2 Select inputs I ih (mA) Iil (mA) 40 -1.6 , sources of data or control information. AC WAVEFORMS TRUTH TABLE Vm = 1 5V for 54/74 and 54S/74S , OVER OPERATING TEMPERATURE RANGE PARAMETER TEST CONDITIONS 54/74 54S/74S 54LS/74LS UNIT , Section 4 for Test Circuits and Conditions) PARAMETER TEST CONDITIONS 54/74 54S/74S 54LS/74LS UNIT , back cover for 54S/74S and 54LS/74LS specifications. sigiiDtics 231 This Material Copyrighted By Its
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S54152W 74152 PIN DIAGRAM Multiplexer 74152 74152

74LS21

Abstract: 7421 pin configuration 54/74 54H/74H 54S/74S 54LS/74LS . . IIH , CONDITIONS 54/74 54H/74H 54S/74S 54LS/74LS UNIT Min Max Min Max Min Max Min Max icch Supply current , CONDITIONS 54/74 54H/74H 54S/74S 54LS/74LS UNIT CL = 15 pF R|_ = 400 n CL = 25 pF fiL = 280!! CL = , inside front cover for 54/74 and 54H/74H, and see inside back cover for 54S/74S and 54LS/74LS
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N7421N N74H21N N74LS21N N7421F N74H21F N74LS21F 74LS21 7421 pin configuration 54H/74H21 54LS/74LS21

H102

Abstract: H102 D 1 LOADING AND FAN-OUT TABLE (a) PINS 54/74 54H/74H 54S/74S 54LS/74LS CP Clock input Iil (mA) -1.0 -4.8 , OPERATING TEMPERATURE RANGE (b) PARAMETER TEST CONDITIONS 54/74 54H/74H 54S/74S 54LS/74LS UNIT Min , , see inside front cover for 54/74 and 54H/74H and see inside back cover for 54S/74S and 54LS/74LS , Conditions) PARAMETER TEST CONDITIONS 54/74 54H/74H 54S/74S 54LS/74LS UNIT CL = 25pF R|_ = 280Ã , TEST CONDITIONS 54/74 54H/74H 54S/74S 54LS/74LS UNIT Min Max Min Max Min Max Min Max tw
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N74H102N N74H102F S54H102F S54H102W H102 H102 D 1 74H102

74ls145

Abstract: N74145F FAN-OUT TABLE , OVER OPERATING TEMPERATURE RANGEO) PARAMETER TEST CONDITIONS 54/74 54S/74S 54LS/74LS UNIT Min , back cover for 54S/74S and 54LS/74LS specifications. c. This parameter for Commercial range only. 215 , H H H H H H H H H H H \ V r^ VM = 1.5V for 54/74 and 54S/74S; VM 1.3V for 54LS/74LS. Figure 1 , CONDITIONS 54/74 54S/74S 54LS/74LS UNIT C[. = 15pF RL = 100ÃÃ CL = 45pF R|_ = 667Q Min Max
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N74145N N74LS145N N74145F N74LS145F S54145F S54LS145F 74ls145 54LS/74LS145

7448 bcd to seven segment decoder

Abstract: "7 Segment Display" applications loi d GNO [V 3. INPUT AND OUTPUT LOADING AND FAN-OUT TABLE«» PINS DESCRIPTION 54/74 54S/74S , RANGE 54/74 54S/74S 54LS/74LS UNIT PARAMETER TEST CONDITIONS Min Max Min Max Min Max 'OA , : TA = 25°C (See Section 4 for Test Circuits and Conditions) PARAMETER TEST CONDITIONS 54/74 54S/74S , ~ VOUT s| ? VM = 1 5V for 54 / 74 and 54S / 74S. VM = ,3V for 54LS/74LS. Figure 1 VM = 1.SV for 54/74 and 54S/74S: VM = 1.3V for 54LS'74LS. Figure 2 NOTE For family dc characteristics, see
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N7448N N7448F S5448F 7448 bcd to seven segment decoder 7448 7-segment display 7448 BCD to 7-Segment decoder 7448 "BCD to 7-segment" 7448 BCD to Seven Segment display

74162

Abstract: counter 74162 INPUT AND OUTPUT LOADING AND FAN-OUT TABLED) PINS DESCRIPTION 54/74 54S/74S 54LS/74LS CP Clock , CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE«®) PARAMETER TEST CONDITIONS 54/74 54S/74S 54LS/74LS UNIT , CHARACTERISTICS: TA=25°C (See Section 4 for Test Circuits and Conditions) 54/74 54S/74S 54LS/74LS , TEST CONDITIONS 54/74 54S/74S 54LS/74LS Min Max Min Max Min Max UNIT tw , characteristics, see inside front cover for 54/74 and 54H/74H, and see inside back cover for 54S/74S and 54LS/74LS
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N74162N N74LS162AN N74162F N74LS162AF S54162F S54LS162AF 74162 counter 74162 pin diagram of 74162 74LS162 parallel counter 54LS/74LS162A

Flip-Flop 7470

Abstract: N7470F /74 54H/74H 54S/74S 54LS/74LS UNIT Min Max Min Max Min Max Min Max Icc Supply current Vcc = , cover for 54/74 and 54H/74H and see inside back cover for 54S/74S and 54LS/74LS specification , 25°C (See Section 4 for Waveforms and Conditions) PARAMETER TEST CONDITIONS 54/74 54H/74H 54S/74S , /74H 54S/74S 54LS/74LS UNIT Min Max Min Max Min Max Min Max tw(H) Clock pulse width (HIGH , S5470F Flatpak Fig B S5470W INPUT AND OUTPUT LOADING AND FAN-OUT TABLE (a) PINS 54/74 54H/74H 54S
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N7470N N7470F Flip-Flop 7470 7470 pin diagram 7470 flip flop

H103

Abstract: S54H103F Flatpak Fig. A S54H103W INPUT AND OUTPUT LOADING AND FAN-OUT TABLE (a) PINS 54/74 54H/74H 54S/74S 54LS , 02 Figure A PARAMETER TEST CONDITIONS 54/74 54H/74H 54S/74S 54LS/74LS UNIT Min Max Min Max , cover for 54/74 and 54H/74H and see Inside back cover for 54S/74S and 54LS/74LS specification. 168 5il , CONDITIONS 54/74 54H/74H 54S/74S 54LS/74LS UNIT C|_ = 25pF R|_ = 280Ã1 Min Max Min Max , 54S/74S 54LS/74LS UNIT Min Max Min Max Min Max Min Max tw(H) Clock pulse width (HIGH) Waveform
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N74H103N N74H103F S54H103F H103 cock
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