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54/74LS Datasheet

Part Manufacturer Description PDF Type
5474L-SL001 Alpha Wire Multiple Conductor Cables, Cables, Wires, CABLE 4PAIR 24AWG SLATE 1000' Original
5474L-SL002 Alpha Wire Multiple Conductor Cables, Cables, Wires, CABLE 4PAIR 24AWG SLATE 500' Original
5474L-SL005 Alpha Wire Multiple Conductor Cables, Cables, Wires, CABLE 4PAIR 24AWG SLATE 100' Original

54/74LS

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: WITH ENABLE The SN 54/74LS 377 is an 8-bit register built using advanced Low Power Schottky , common clock enable. The S N 54/74LS 378 is a 6-Bit Register with a buffered com mon enable. This device is sim ilar to the S N 54/74LS 174, but with common Enable rather than common Master Reset. The SN 54/74LS 379 is a 4-Bit R egister with buffered common Enable. This device is similar to the SN 54 , DIAGRAM DIPS (TOP VIEW) S N 54/74LS 377 V CC q7 d7 d6 q6 q5 d5 d4 q4 cp -
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54/74LS SN54/74LS377 SN54/74LS378 SN54/74LS379

rs flip-flop IC 7400

Abstract: 74ls105 /74LS logic, CMOS logic and 54/74L. For purposes 8 °C of comparison, a controller will be used. It , types used are shown in table 4. Table 4 QUANTITY 54/74LS TYPE STD TYPE CMOS TYPE 200 54/74LS00 54/7400 54/7474 54/74LS74 8280 54/74LS196 Table 5 DEVICE POWER REQUIREMENTS - Per Package (mW) 54/74LS , 30mW Table 6 SYSTEM POWER CONSUMPTION 54/74LS STD TTL Gates Flip-Flops Static Dynamic Static Dynamic , CMOS. DESIGN RULES FOR UPGRADING 54/74 SYSTEM TO 54/74LS 1. Check fan out requirements at each
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rs flip-flop IC 7400 74ls105 TTL LS 7400 74LS series logic gates 7400 fan-out 74LS 3 input AND gate 54/74XX

Motorola 74LS

Abstract: 74ls399 (M) MOTOROLA QUAD 2-PORT REGISTER The S N 54/74LS 398 and SN 54/74LS 399 are Quad 2 , SN 54/74LS398 fea tures both Q and Q inputs, while the SN 54/74LS 399 has only Q outputs. · Select , SCHOTTKY J SUFFIX CERAMIC CASE 620-09 S N 54/74LS 398 N SUFFIX TBBM H U H nunM S Qa Qa loa ha hb , rarïïirïïintir^inriNm, SN 54/74LS 399 s o ie CASE 751B-03 J SUFFIX CERAMIC CASE 732-03 K m n ïïM T ïïM T ïïT , The SN 54/74LS 398 and SN 54/74LS 399 are high-speed Quad 2-Port Registers. They select four bits of
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Motorola 74LS 74ls399 74LS398N 54/74LS398 SN54/74LS398 SN54/74LS399

74LS 04 N

Abstract: IC 74ls time tp L H tp H L Low -to-high H igh-to-low 18 15 27 22 18 15 27 22 ns ns 54/74LS C|_=15pF R|_»2kti , + p ositive g o in g th resh old V T - negative g o in g th resh old H y stere sis 54/74LS M AX , PERATURE-TYPICAL VALU ES 54/74LS PARAM ETER V f+ V f. P ositive going threshold N egative going threshold H , signuncfi HYSTERESIS VS. TEM PERATURE-TYPICAL V A LU ES 54/74LS PAR AM ETER V j + P ositive going threshold Vy. N egative going threshold H ysteresis HYSTERESIS THRESHOLDS 54/74 54/74LS M AX 2.0 1.1
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74LS 04 N IC 74ls 74ls ic IC PIN CONFIGURATION OF 74 83 74LS 125 AN 54/74S L-280
Abstract: SN 54/74LS 352 is the func tional equivalent of the S N 54/74LS 153 except with inverted outputs. · Inverted Version of the SN 54/74LS 153 · Separate Enables for Each Multiplexer · Input Clamp Diode Limit , DESCRIPTION The S N 54/74LS 352 is a Dual 4-Input Multiplexer. It selects two bits of data from up to four , SN 54/74LS 352 can be used to move data from a group of registers to a common output bus. The , obvious application is a function gen erator. The SN 54/74LS 352 can generate two functions of three -
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54/74LS352 SN54/74LS352

74LS

Abstract: 400fi SPEED/PACKAG E AVAILABILITY 54 F,W 54H F,W 54LS F,W 74 A,F 74H A,F 74LS A,F PIN CONFIGURATION 74, 74H, 54/74LS A,F,W PA CK A G E SWITCHING CHARACTERISTICS 54/74 T EST CON DITIO NS PARAM ETER Propagation delay time tpi_H Low-to-high tpHL High-to-low 13 8 22 15 MIN C|.=15pF RL = 40012 TYP V C C - 5V, TA = 25°C 54/74H C L =25pF RL =280S2 MIN TYP MAX MIN 54/74LS C|.=15pF Ru -2k0 TYP M AX UNIT MAX , CHARACTERISTICS VC C - 5V. TA - 25° C 54/74 54/74LS Ci_=15pF R L =2k$i M AX MIN TYP MAX UNIT T EST CONDITIO
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74LS 400fi 54/74H

74ls characteristics

Abstract: 74LS SPEED /PACK AG E AVAILABILITY 54H F,W 54LS F,W S4S F,W 74H A ,F 74LS A ,F 74S A,F PIN CONFIGURATION 74H,54/74LS,54/74S A,F,W PACK AG E Positive logic: Y-*A8CD NC-No internal connection SWITCHING CHARACTERISTICS v C C - 5V, T A = 25 »c 54/74H T E S T CONDITIONS PARAMETER C L =2SpF R|_=280Q MIN TYP MAX 54/74LS C|_-15pF R|_=2kQ MIN TYP MAX 54/74S C L =15pF RL =280i2 MIN TYP MAX UNIT , 54/74 T E S T CONDITIONS PARAMETER MIN C|_=15pF Rl_=1kfi TYP MAX MIN 54/74LS C L =15pF RL =2kSi
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74ls characteristics 74LS AND propagation delay
Abstract: BI-DIRECTIONAL COUNTERS The SN 54/74LS 168 and SN 54/74LS 169 are fully synchronous 4-stage up/down counters , input to control the direction of counting. The S N 54/74LS 168 counts in a BCD decade (8, 4, 2, 1) sequence, while the SN 54/74LS 169 operates in a Modulo 16 binary sequence. All state changes, whether in , N DECADE COUNTER S N 54/74LS 169 Count Up Count Down SN54/74LS168 UP: TC = Q0 Q3 (U/D , Q2 Q3 (U/D) LOGIC DIAGRAMS SN 54/74LS 168 Qq Qi Q2 FAST AND LS TTL DATA 5-179 Q3 -
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SN54/74LS169
Abstract: DIAGRAM Note: Celt logic is repeated for register stages Qs to Qi. 4-421 54/74LS (U.L.) HIG H/LO , ERATING TEMPERATURE RANGE (unless otherwise specified) SYMBOL 54/74LS PARAMETER UNITS Min , = +5.0 V, Ta = +25° C (See Section 3 for waveforms and load configurations) 54/74LS SYMBOL , OPERATING REQUIREMENTS: V cc = +5.0 V, T a = +25° C SYMBOL 54/74LS PARAMETER Min UNITS CO -
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54LS/74LS503 LS503 LS502 74LS503PC 74LS503DC 54LS503DM

74ls characteristics

Abstract: 74LS SPEED/PACKAGE AVAILABILITY PIN CONFIGURATION 54H F,W 54 LS F,W 54S F,W 74H A,F 74LS A,F 74S A, F 74H,54/74LS,54/74S A,F,W PACKAGE Positive logic: Y = ABCD NC-No internal connection SWITCHING CHARACTERISTICS vCC = 5V, TA = 25°C TEST CONDITIONS 54/74H 54/74LS 54/74S UNIT C|_=25pF R|_=280tt CL , /PACKAGE AVAILABILITY 54 F 74 A,F 54LS F,W 74LS A,F SWITCHING CHARACTERISTICS vcc = 5V, ta = 25°C PIN CONFIGURATION 54/74 54/74LS TEST CONDITIONS CL=15pF R|_=1kiî C|. = 15pF RL=2kS2 PARAMETER MIN TYP
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74LS54 74ls 11 54LS

74LS

Abstract: 74ls characteristics SPEED /PACK AG E AVAILABILITY 54 54H 54LS 54S F,W F,W F,W F,W 74 74H 74LS 74S A,F A,F A,F A,F PIN CONFIGURATION 54/74, 54/74LS, 54S A,F,W PACKAGE 54/74H W PACKAGE SWITCHING CHARACTERISTICS vCc - 5V, t a - 2s°c 54/74 U E 54/74H C[_=25pF RL =280« MAX MIN TYP MAX MIN 54/74LS C L =15pF RL =2kQ , AG E AVAILABILITY 54 F,W 54H F,W 54LS F,W 74 74H 74LS A,F A,F A,F PIN CONFIGURATION 74.54/74LS A , AG E AVAILABILITY 54 F,W 54LS F,W 54S F,W 74 A ,F 74LS A, F 74S A,F PIN CONFIGURATION 74.54/74LS
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74LSc 7454 configuration 54/74L8

OC77

Abstract: 7489DC . definitions PIN NAMES DESCRIPTION 54/74 (U.L.) HIGH/LOW 54/74LS (U.L.) HIGH/LOW Ao â'" A3 CS WE Di â , +25°C (See Section 3 for waveforms and load configurations) SYMBOL PARAMETER 54/74 54/74LS , SYMBOL PARAMETER 54/74 54/74LS UNITS CONDITIONS Min Max Min Max ts (H) ts (L) Setup Time HIGH , 89 J 54/748£y Y 54LS/74LS89 £>1/74*} 64-BIT RANDOM ACCESS MEMORY (With Open-Collector , CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) SYMBOL PARAMETER 54/74 54
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7489PC 74LS89PC 7489DC 74LS89DC 7489FC 74LS89FC OC77 5489DM 5489FM 54LS89DM

74ls90 logic

Abstract: 74LS90 DESCRIPTION 54/74LS (U.L.) HIGH/LOW MS MR CP Qo- Q3 Master Set (Set to 9) Input (Active HIGH) Master , Icc PARAMETER Power Supply Current nless otherwise specified) 54/74LS Min Max 26 UNITS mA CONDITIONS Vcc = Max SYMBOL PARAMETER 54/74LS Cl = 15 pF Min Max UNITS CONDITIONS fmax Maximum Count , Qn 39 ns Figs. 3-1, 3-17 AC OPERATING REQUIREMENTS: Vcc = +5 0 V, Ta = +25° C SYMBOL PARAMETER 54/74LS UNITS CONDITIONS Min Max tw (H) CP Pulse Width HIGH 20 ns Fig. 3-9 tw (H) MR, MS Pulse
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74LS490PC 74LS490DC 54LS490DM 74LS490FC 54LS490FM 74ls90 logic 74LS90 pin diagram of 74LS 74LS90 pin configuration 54LS/74LS490 54LS/74LS90

BA335

Abstract: Pulse Input (Active Rising Edge) Flip-flop Outputs Complement Outputs 54/74LS (U.L.) HIGH/LOW 0.5/0.25 , Supply Current 54/74LS Max 18 mA Vcc * Max UNITS CONDITIONS AC CHARACTERISTICS: Vcc = +5.0 V, Ta = +25° C , LOW 20 20 5.0 5.0 25 25 5.0 5.0 17 54/74LS Max ns ns Fig. 3-6 ns ns ns Fig. 3-8 UNITS CONDITIONS
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BA335 74LS379PC 74LS379DC 74LS379FC 54LS379DM 54LS379FM

74LS374PC

Abstract: = Pin 20 GND = Pin 10 INPUT LOADING/FAN-OUT: See Section 3 for U.L. definitions 54/74LS (U.L , otherwise specified) SYMBOL 54/74LS PARAMETER Min Icc UNITS CONDITIONS Max Power , +5.0 V, Ta = +25° C (See Section 3 for waveforms and load configurations) 54/74LS SYMBOL , REQUIREMENTS: Vcc = +5.0 V, Ta = +25°C SYMBOL 54/74LS PARAMETER Min UNITS CONDITIONS Max
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74LS374PC 54LS/74LS374 74LS374DC 54LS374DM 74LS374FC 54LS374FM

54LS378DM

Abstract: 54LS378FM INPUT LOADING/FAN-OUT: See Section 3 for U.L definitions PIN NAMES DESCRIPTION 54/74LS (U.L , TEMPERATURE RANGE (unless otherwise specified) SYMBOL PARAMETER 54/74LS UNITS CONDITIONS Min Max , = +25°C (See Section 3 for waveforms and load configurations) SYMBOL PARAMETER 54/74LS UNITS , SYMBOL PARAMETER 54/74LS UNITS CONDITIONS Min Max ts (H) Setup Time HIGH, Dn to CP 20 ns Fig. 3-6
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74LS378PC 74LS378DC 54LS378DM 74LS378FC 54LS378FM 6bit register 54LS/74LS378

74ls504

Abstract: 74LS504DC /FAN-OUT: See Section 3 for U.L. definitions PIN NAMES DESCRIPTION 54/74LS (U.L.) HIGH/LOW D S CP , RANGE (unless otherwise specified) SYMBOL PARAMETER 54/74LS Min Max UNITS CONDITIONS lee Power , waveforms ind load configurations) SYMBOL PARAMETER 54/74LS Cl = 15 pF Min Max UNITS CONDITIONS fmax , REQUIREMENTS: Vcc = +5.0 V, Ta = +25°C SYMBOL PARAMETER 54/74LS Min Max UNITS CONDITIONS ts (H) ts (L , 74LS504FC Vcc = +5.0 V ±10%, Ta = -55° C to +125°C 54 LS504DM 54LS504FM PKG TYPE 9N 6N 4M LOGIC
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74LS504PC 74LS504DC 74ls504 ls504 54LS/74LS504 12-BIT LS504
Abstract: Latches 1, 2 Enable Input Latches 3, 4 Enable Input Latch Outputs Com plem entary Latch Outputs 54/74LS , TEMPERATURE RANGE (unless otherw ise specified) SYMBOL Icc PARAMETER Min Pow er S upply Current 54/74LS Max 12 , for waveforms and load configurations) 54/74LS SYMBOL PARAMETER C l = 15 pF M in tP L H tP H L tP L H , LOW Dn to En H old Tim e HIGH or LOW Dn to En En Pulse Width HIGH 20 0 20 54/74LS Max ns Fig. 3-14 ns -
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4LS/74LS375 74LS375PC 74LS375D 74LS375FC 54LS375DM 54LS375FM

54LS379DM

Abstract: 54LS379FM » Flip-flop Outputs Complement Outputs 54/74LS (U.L.J HIGH/LOW 0.5/0.25 0.5/0.25 0.5/0.25 10/5.0 (2.5) 10 , TEMPERATURE RANGE (unless otherwise specified) SYMBOL Icc PARAMETER Power Supply Current 54/74LS Min Max 18 UNITS mA CONDITIONS Vcc = Max 54/74LS SYMBOL PARAMETER Cl = 15 pF UNITS CONDITIONS , LOW Dn to CP Setup Time HIGH or LOW E to CP Hold Time HIGH or LOW E to CP CP Pulse Width LOW 54/74LS Min Max 20 20 5.0 5.0 25 25 5.0 5.0 17 UNITS ns ns ns ns ns CONDITIONS Fig. 3-6
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74LS379D 54LS379 54LS/74LS379
Abstract: 54/74S (U.L.) HIG H/LO W 54/74LS (U.L.) HIG H/LO W 1.0/1.0 1.0/1.0 1.0/1.0 20/10 1.25 , Max 54/74LS Min 144 UNITS CONDITIONS Max 26 mA V cc = Max Dn = MR = 4.5 V CP , configurations) 54/74 SYMBOL PARAMETER 54/74S 54/74LS Cl = 15 pF C l = 15 pF C l = 15 pF Rl = 400 , +5.0 V, T a = +25° C SYMBOL PARAMETER 54/74 Min Max 54/74S Min Max 54/74LS Min , 174 CO NNECTIO N DIAGRAM PINOUT A /54/74174 b l l S ^ l , /54S/74S174 o // -
OCR Scan
I/54LS/74LS174 74174PC 74S174PC 74LS174PC 74174DC

74LS503DC

Abstract: 74LS503 . definitions PIN NAMES DESCRIPTION 54/74LS (U.L.) HIGH/LOW D S CP E CC Qo â'" Q7 Qt Serial Data Input , Supply Current 54/74LS Min Max 65 UNITS mA CONDITIONS Vcc = Max AC CHARACTERISTICS: Vcc = +5.0 V, Ta = +25°C (See Section 3 for waveforms and load configurations) SYMBOL PARAMETER 54/74LS Cl = , _ CP = 4.5 V, S = Gnd AC OPERATING REQUIREMENTS: Vcc = +5.0 V, TA = +25°C SYMBOL PARAMETER 54/74LS
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74LS503FC 54LS503FM 74LS503 2503 successive approximation

74ls76 jk flip-flop logic symbol and truth table

Abstract: 7476PC Respective Manufacturer 76 PIN NAMES DESCRIPTION 54/74 (U.L.) HIGH/LOW 54/74H (U.L.) HIGH/LOW 54/74LS (U.L , specified) SYMBOL PARAMETER 54/74 54/74H 54/74LS UNITS CONDITIONS Min Max Min Max Min Max Icc , (See Section 3 for waveforms and load c onfigurations) SYMBOL PARAMETER 54/74 54/74H 54/74LS , PARAMETER 54/74 54/74H 54/74LS UNITS CONDITIONS Min Max Min Max Min Max ts (Hi Setup Time HIGH Jn or
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OCR Scan
74ls76 jk flip-flop logic symbol and truth table 7476PC 7476 PIN DIAGRAM 7476 truth table 74LS76PC 74LS76 dual flip-flop 54H/74H76 CLS76

54170DM

Abstract: 54170FM .) HIGH/LOW 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 OC/IO 54/74LS (U.L.) HIGH/LOW 0.5/0.25 0.5/0.25 , otherwise specified) SYMBOL PARAMETER 54/74 54/74LS UNITS CONDITIONS Min Max Min Max loh Output , Section 3 for waveforms and load configurations) SYMBOL PARAMETER 54/74 54/74LS CONDITIONS Cl = 15 pF , OPERATING REQUIREMENTS: Vcc = +5.0 V, Ta = +25°C SYMBOL PARAMETER 54/74 54/74LS UNITS CONDITIONS
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74170PC 74LS170PC 74170DC 74LS170DC 74170FC 74LS170FC 54170DM 54170FM 54LS170DM 54LS/74LS170

8 pin dip j k flipflop ic

Abstract: 74LS112P 2.5/4.375 25/12.5 54/74LS (U.L.) HIG H /LO W 0.5/0.25 2.0/0.5 1.5/0.5 1.5/0.5 10/5.0 (2.5) 1185 , urrent 54/74S Min Icc Max 50 54/74LS Min Max 8.0 mA V cc = M a x , V c p = 0 V UNITS C O ND ITIO N S , ) 54/74S SYMBOL PARAMETER 54/74LS UNITS CO ND ITIO N S C l = 15 pF C l = 15 pF Rl = 280 n Min Max , Min Max 54/74LS Min 20 15 0 0 20 15 15 Max UNITS CO ND ITIO N S ts 7.0 7.0 0 0 6.0 6.5
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OCR Scan
8 pin dip j k flipflop ic 74LS112P 74ls112 pin diagram 74LS112PC 74LS112D 54S/74S112 54LS/74LS112

74164PC

Abstract: 74LS164PC ) Outputs 54/74 (U.L.) HIGH/LOW 1.0/1.0 1.0/1.0 1.0/1.0 10/5.0 54/74LS (U.L.) HIGH/LOW 0.5/0.25 0.5/0.25 0.5 , XC 54/74 Min los Icc Max T- V i - o f- o s ' 54/74LS Min -20 -20 Max -100 -100 27 mA mA Vcc = Max , , Ta = +25°C (See Section 3 for waveforms and load configurations) 54/74 SYMBOL PARAMETER 54/74LS UNITS , Pulse Width LOW Recovery Time MR to CP 54/74 Min 15 15 0 0 20 20 20 Max 54/74LS Min 15 15 5.0 5.0
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74164PC 74LS164PC 54LS/74LS164 74164DC 74LS164DC
Abstract: Outputs Qo, Q7 Serial Outputs 4-363 54/74LS (U.L.) HIGH/LOW 0.5/0.25 0.5/0.25 0.5/0.25 , (unless otherwise specified) SYMBOL 54/74LS PARAMETER Min Icc UNITS CONDITIONS mA , +25°C (See Section 3 for waveforms and load configurations) 54/74LS SYMBOL PARAMETER Cl = 15 , REQUIREMENTS: Vcc = +5.0 V, Ta = +25°C SYMBOL 54/74LS PARAMETER Min UNITS CONDITIONS Max -
OCR Scan
54LS/74LS299 74LS299PC 74LS299DC 54LS299DM 74LS299FC 54LS299FM

74107PC

Abstract: 74ls107 (U.L.) HIGH/LOW 54/74LS (U.L.) HIGH/LOW Jr, J2J , CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) SYMBOL PARAMETER 54/74 54/74LS , PARAMETER 54/74 54/74LS UNITS CONDITIONS Cl = 15 pF rl = 400 n Cl = 15 pF Min Max Min Max fmax , , Ta = +25°C SYMBOL PARAMETER 54/74 54/74LS UNITS CONDITIONS Min Max Min Max ts (H) Setup Time
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LS107 74107PC 74LS107PC 74107DC 74ls107 74LS107DC 74107 pin diagram 54LS107DM 54107DM 54LS/74LS107 74LS10

74LS298PC

Abstract: 54298DM NAMES DESCRIPTION 54/74 (U.L.) HIGH/LOW 54/74LS (U.L.) HIGH/LOW S_ CP loa â'" lod ha â'" lid Qa , CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) SYMBOL PARAMETER 54/74 54/74LS , , Ta = +25°C SYMBOL PARAMETER 54/74 54/74LS UNITS CONDITIONS Min Max Min Max ts , CHARACTERISTICS: Vcc = +5.0 V, Ta = +25° C (See Section 3 for waveforms and load configurations) 54/74 54/74LS SYMBOL PARAMETER Cl = 15 pF RL = 400 n Cl = 15 pF UNITS CONDITIONS Min Max Min Max tPLH
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LS298 74298PC 74LS298PC 74298DC 74LS298DC 74298FC 54298DM 54298FM 54LS298DM

74ls189 ram

Abstract: 74LS189 DESCRIPTION 54/74S (U.L.) HIGH/LOW 54/74LS (U.L.) HIGH/LOW Ao â'" A3 CS WE Di â'" D4 OI â'" 04 , otherwise specified) SYMBOL PARAMETER 54/74S Min Max 54/74LS Min Max UNITS CONDITIONS Vol Output , PARAMETER 54/74S 54/74LS UNITS CONDITIONS Cl = 30 pF Rl = 300 n Cl = 15 pF Min Max Min Max , RECOMMENDED Vcc AND Ta RANGE (unless otherwise specified) SYMBOL PARAMETER 54/74S 54/74LS UNITS
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74S189PC 74LS189PC 74S189DC 74LS189DC 74S189FC 74LS189FC 74ls189 ram 74LS189 74LS189 logic diagram 4S/74S189 54LS/74LS189

74ls786

Abstract: 74LS78 /LO W 1.25/1.25 2.5/2.5 5.0/5.0 2.5/2.5 12.5/12.5 54/74LS (U.L.) HIG H/LO W 0.5/0.25 4.0/1.0 3.0/1.0 , Min Max 50 54/74LS Min Max 8.0 mA Vcc = Max, VCP = 0 V UNITS CO NDITIONS AC C H AR AC TER ISTIC S , PARAMETER 54/74LS UNITS CO NDITIONS Cl = 25 pF C l = 15 pF Rl = 280 n Min Max Min 30 21 27 13 24 20 30 20 , > 0 0 0 0 12 28 16 Max 54/74LS Min 20 0 20 0 20 13.5 25 Max ns ns ns ns ns ns Fig. 3-9 Fig. 3-10 UNITS
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74ls786 74LS78 ic 74ls78 CLS78

OF IC 74170

Abstract: /74 (U.L.) H IG H /LO W 1 .0/ 1.0 1.0/ 1.0 1.0/ 1.0 1 .0/ 1.0 1.0/ 1.0 54/74LS (U.L.) HIG H/LO W , SYMBOL PARAMETER O utput HIG H Current Power Supply Current Icc XC XM 54/74 Min lOH ^ 54/74LS Min , waveforms and load configurations) 54/74 SYMBOL PARAMETER 54/74LS UNITS CO NDITIONS C l = 15 pF Cl = 15 , LOW WAn to rising WE WE or RE Pulse W idth LOW 54/74 Min ts 54/74LS Min 10 5.0 10 5,0 25 Max
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OF IC 74170 S01122

74S113PC

Abstract: 54S113DM ) Outputs 54/74S (U .L.) HIGH/LOW 1.25/1.0 2.5/2.5 2.5/4.375 25/12.5 54/74LS (U .L.) HIGH/LOW 0.5/0.25 2.0 , specified) SYM BO L Icc PARAM ETER Power Supply Current 54/74S Min Max 50 54/74LS Min Max 8.0 mA V cc = Max , Section 3 for waveforms and load configurations) 54/74S SYM BO L PARAM ETER 54/74LS UN ITS CONDITION S , 54/74S Min 7.0 7.0 0 0 6.0 6.5 8.0 Max 54/74LS Min 20 15 0 0 20 15 15 Max UN ITS CO NDITION
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74S113PC 54S113DM 74LS113PC 74S113DC 74LS113DC 74S113FC
Abstract: DESCRIPTION 54/74S (U.L.) H IG H /LO W 54/74LS (U.L.) H IG H /L O W Data Inputs C lo ck Pulse , 54/74S Min ic c Max 54/74LS M in 50 Power S upply Current UNITS CONDITIONS , Propagation Delay tP H L 54/74LS 16 24 ns Figs. 3-1, 3-10 A C OPERATING REQUIREMENTS: V c c = +5.0 V, T a =+25°C SYMBOL PARAMETER 54/74S Min Max 54/74LS Min UNITS -
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4LS/74LS112 74S112DC 54S112DM 54LS112DM 74S112FC 74LS112FC
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