NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: ROMA ROM A or ROM B ROM B 64K 60K 56K 48K 32K 16K 8K 4K AO.8 512 x 128 512x120 512x 112 512x96 , 4K x 2 4K x 1 ^0:12 8K x 8 - - - - - - - ROM Block Diagrams Single ROM Dual ROM Normal Operation , array • 65,536-bit Read Only Memory (ROM) -Metal mask programmable -Metal mask configurable as either one or two ROMs -Fully static -ROM widths up to 128 bits -Built-in scan testability -Programmable , upward compatibility to ceramic packages, where required. Does not apply to military designs. ROM AC ... | OCR Scan |
2 pages, |
LSA2010 2k x 4 RAM 1kx8 static ram 1K x 8 static ram General Purpose Mask Programmable ROM 512x 8 ROM S1985 LSA201G LL7000 LSA2010 abstract |
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| Abstract: signotics 2048-BIT 2048-BIT BIPOLAR READ-ONLY MEMORY (512x4 ROM) JUNE 1975 DIGITAL 8000 SERIES TTL/MEMORY , military temperature ran&e ( -55 Cto + 125"C) specifyS82S230/231, Fonly. FEATURES • ORGANIZATION - 512x 4 , SIGNETICS 2048 - BIT BIPOLAR READ ONLY MEMORY (512 x 4 ROM) â- 82S230 82S230, 82S231 82S231 ABSOLUTE MAXIMUM RATINGS , Output Capacitance Vcc = 5.0V, Vout = 2.0V 8 8 pF , +25° C. 44 SIGNETICS 2048-BIT 2048-BIT BIPOLAR READ ONLY MEMORY (512 X 4 ROM) â- 82S230 82S230,82S231 82S231 AC TEST FIGURE ... | OCR Scan |
4 pages, |
signetics 1016 82S231 82S230 2048-BIT 82S130/131 N82S230/231 2048-BIT abstract |
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| Abstract: signotics 2048-BIT 2048-BIT BIPOLAR READ-ONLY MEMORY (512x4 ROM) JUNE 1975 DIGITAL 8000 SERIES TTL/MEMORY , military temperature ran&e ( -55 Cto + 125"C) specifyS82S230/231, Fonly. FEATURES • ORGANIZATION - 512x 4 • , 3°4 •B - Plastic F - C*rdip BLOCK DIAGRAM SIGNETICS 2048 - BIT BIPOLAR READ ONLY MEMORY (512 x 4 ROM , Vcc = 5.0V, VlN = 2.0V 5 5 PF cout Output Capacitance Vcc = 5.0V, Vout = 2.0V 8 8 pF , Typical values are at V CC - 5.0V, T - +25° C. 44 SIGNETICS 2048-BIT 2048-BIT BIPOLAR READ ONLY MEMORY (512 X 4 ROM ... | OCR Scan |
3 pages, |
82S231 82S230 512 ttl prom 2048-BIT 82S130/131 N82S230/231 2048-BIT abstract |
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| Abstract: . 7 5.4. SPEECH DURATION VS. ROM SIZE . 8 5.5. D/A OPTION , ) . 16 8. PACKAGE/PAD LOCATIONS , rate associated with it, 4.8K and 7.2Kbps. ! Speech output sampling at 8 KHz The SPDS102A-01D SPDS102A-01D , 8 I Test input, internal pull high, no connection TEST2 9 I Test input, internal ... | Original |
20 pages, |
SPC81A SPC41A SPC251A PDS102A-01D S480/S720 PDS102A-01D abstract |
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| Abstract: . 7 5.4. SPEECH DURATION VS. ROM SIZE . 8 5.5. D/A OPTION , ) . 16 8. PACKAGE/PAD LOCATIONS , 10 O NC TEST1 8 I Test input, internal pull high, no connection TEST2 9 I , use on-chip resources, including the instruction PC environment. ROM and data ROM to construct ... | Original |
20 pages, |
SPDS102A-01E SPC81A SPC41A SPC251A PDS102A-01E S480/S720 PDS102A-01E abstract |
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| Abstract: . 8 6.14. POWER SAVING MODE . 8 6.15. MULTI-DUTY CYCLE MODE , .11 8. APPLICATION CIRCUITS , with DSP (Digital Signal 8-bit 6502-compatible microprocessor Processing) mechanism, involves an 8-bit CPU and a 16-bit DSP (GENERALPLUS code transformation required). speech decoder to ... | Original |
17 pages, |
GPDS107A A2400 GPDS107A abstract |
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| Abstract: engine with DSP (Digital Signal 8-bit 6502-compatible microprocessor Processing) mechanism, involves an 8-bit CPU and a 16-bit DSP (SUNPLUS code transformation required). speech decoder to accomplish long-speech applications. 1M-byte ROM embedded The amount of 1024K-byte of ROM offers , capability great flexibility to drive other devices and components. 8 RTC sources with interrupt and , of speech is natural divided by N to CPU, where N = 4, 6, 8, 10, 12, 14 and smooth. Volume ... | Original |
14 pages, |
423 MHz resonator SPDS107A SPDS107A abstract |
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| Abstract: Synchronous and EDO DRAM (256 KBytes to 8 MBytes) for ESP Supports one bank of FLASH and ROM (up to 2 MBytes) for nonvolatile storage 4-, 8-, or16-bit data bus for DRAM, 8-bit data bus for ROM 2.2.5 · · , also connect to SRAM that would emulate a ROM on a development system. The bus width is always 8 bits. , ROM Interfaces to external SDRAM or EDO DRAM (for shock protection), and to external ROM/FLASH (for , RISC processor, one DSP, integrated audio modulator, large internal SRAM and program ROM, and ... | Original |
35 pages, |
IEC958 CS7410-IQZ CS7410-CQ CS7410 100-PIN IEC-958 ISO9660 CS7410 abstract |
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| Abstract: ROM (up to 2 MBytes) for nonvolatile storage 4-, 8-, or16-bit data bus for DRAM, 8-bit data bus for , would emulate a ROM on a development system. The bus width is always 8 bits. Most of these pins are , ROM Interfaces to external SDRAM or EDO DRAM (for shock protection), and to external ROM/FLASH (for , modulator, large internal SRAM and program ROM, and glueless interface to popular CD chip sets, the CS7410 CS7410 , http://www.cirrus.com ROM/SRAM Control Mini DMA Flash Control DRAM Control 256 KB ... | Original |
40 pages, |
CS7410-CQ CS7410-CM CS7410 100-PIN IEC-958 ISO9660 CS7410 abstract |
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| Abstract: FLASH and ROM (up to 2 MBytes) for nonvolatile storage 4-, 8-, or16-bit data bus for DRAM, 8-bit data , also connect to SRAM that would emulate a ROM on a development system. The bus width is always 8 bits. , internal ROM l Interfaces to external SDRAM or EDO DRAM (for shock protection), and to external ROM/FLASH , processor, one DSP, integrated audio modulator, large internal SRAM and program ROM, and glueless , : (512) 445 7581 http://www.cirrus.com 80 KB Internal SRAM ROM/SRAM Control Mini DMA ... | Original |
39 pages, |
CS7410-CQ CS7410-CM CS7410 100-PIN IEC-958 ISO9660 CS7410 abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| } - - Definition of two block RAMs configured in 512 x 8-bit mode and conneceted to act as - a single port ROM of . * This template defines two block RAMs configured in 512 x 8-bit single port mode and conneceted to act as a single port ROM of 512 x 16-bit using the MS-address as a multiplexer switch between lower and ; - - Attributes to define ROM contents during implementation synthesis. - attribute INIT_00 of lower_ram_512_x_8 : label is "{L_INIT_00}"; attribute INIT_01 of lower_ram_512_x_8 : label is "{L_INIT_01 www.datasheetarchive.com/download/50185293-995924ZC/xapp213.zip (psmsplit.vhd) |
Xilinx | 17/12/2002 | 236.83 Kb | ZIP | xapp213.zip |
| 2 512 x 8 RAM ROM 32 0 to 33 ROM 80C51 80C51 80C51 80C51 UART 32 512 4 2 0 to 33 UART 512 x 8 RAM 0 to 33 ROM 4 32 80C51 80C51 80C51 80C51 8-bit 12-clock C51+ core ROM ROM 512 x 8 RAM 512 x 8 RAM 32 80C + core 0 to 33 UART 4 0 to +70 ROM 32k x 8 ROM 32 512 x 8 RAM 2 32k x 8 ROM 512 x 8 RAM 32 0 to 33 ROM P89C51RC P89C51RC P89C51RC P89C51RC+JA 2 www.datasheetarchive.com/files/philips/pip/p89c51rc_p89c51rd_7.html |
Philips | 14/02/2002 | 20.4 Kb | HTML | p89c51rc_p89c51rd_7.html |
| 32Kx8 rom 1Kx8 512x8 No 2 2 Up to 6 Up to 6 Up to 4 0 28 41 2 196CB 196CB 196CB 196CB 16&8 56Kx8 otp, qrom 1.5Kx8 512x8 1M 2 2 Up to 10 Up to 10 Up 512x8 No 2 2 Up to 6 Up to 6 Up to 4 6 35 41 2 No No Yes Yes ,12,16 68ld PLCC 8XC196KT 16&8 32Kx8 otp,qrom 1Kx8 512x8 No 2 2 Up 8XC196EA 16&8 8K rom 1Kx8 3Kx8 2M 4 0 17 25 8 16 43 76 www.datasheetarchive.com/files/intel/products/design/auto/mcs96/index.htm |
Intel | 23/10/1996 | 15.92 Kb | HTM | index.htm |
| Yes Yes 8,12,16 52ld PLCC 8XC196JT 16&8 32Kx8 otp,qrom,rom 1Kx8 512x8 CB 16&8 56Kx8 otp, qrom 1.5Kx8 512x8 1M 2 2 Up to 10 Up to 10 Up 8XC196KT 16&8 32Kx8 otp,qrom 1Kx8 512x8 No 2 2 Up to 10 Up to 10 Up Kx8 512x8 No 2 2 Up to 6 Up to 6 Up to 4 0 28 41 2* No No 8XC196EA 16&8 8K rom 1Kx8 3Kx8 2M 4 0 17 25 8 16 43 76 www.datasheetarchive.com/files/intel/design/auto/mcs96/index-v2.htm |
Intel | 03/08/1997 | 15.37 Kb | HTM | index-v2.htm |
| 32Kx8 rom 1Kx8 512x8 No 2 2 Up to 6 Up to 6 Up to 4 0 28 41 2 196CB 196CB 196CB 196CB 16&8 56Kx8 otp, qrom 1.5Kx8 512x8 1M 2 2 Up to 10 Up to 10 Up 512x8 No 2 2 Up to 6 Up to 6 Up to 4 6 35 41 2 No No Yes Yes ,12,16 68ld PLCC 8XC196KT 16&8 32Kx8 otp,qrom 1Kx8 512x8 No 2 2 Up 8XC196EA 16&8 8K rom 1Kx8 3Kx8 2M 4 0 17 25 8 16 43 76 www.datasheetarchive.com/files/intel/design/auto/mcs96/index-v4.htm |
Intel | 31/01/1997 | 15.58 Kb | HTM | index-v4.htm |
| . Functional descriptions for this product are found in the 4-Mbit (256K x 16, 512 x 8) Boot Block Flash Memory Family, 4-Mbit (256K x 16, 512 x 8) Low-Power Boot Block Flash Memory Family, 2-Mbit (128K x 16, 256K x 8) Boot Block Flash Memory Family, and 2-Mbit (128K x 16, 256K x 8) Low-Power Boot Block Flash 16, 512 x 8) Boot Block Flash Memory Family datasheet/290451 4-Mbit (256K x 16, 512 x 8) Low-Power Boot Block Flash Memory Family datasheet/290450 2-Mbit (128K x 16, 256K x 8) Boot Block Flash Memory www.datasheetarchive.com/files/intel/design/flcomp/specupdt/297187.htm |
Intel | 01/02/1999 | 3.52 Kb | HTM | 297187.htm |
| . Functional descriptions for this product are found in the 4-Mbit (256K x 16, 512 x 8) Boot Block Flash Memory Family, 4-Mbit (256K x 16, 512 x 8) Low-Power Boot Block Flash Memory Family, 2-Mbit (128K x 16, 256K x 8) Boot Block Flash Memory Family, and 2-Mbit (128K x 16, 256K x 8) Low-Power Boot Block Flash 16, 512 x 8) Boot Block Flash Memory Family datasheet/290451 4-Mbit (256K x 16, 512 x 8) Low-Power Boot Block Flash Memory Family datasheet/290450 2-Mbit (128K x 16, 256K x 8) Boot Block Flash Memory www.datasheetarchive.com/files/intel/design/flcomp/specupdt/297187-v6.htm |
Intel | 31/10/1998 | 3.53 Kb | HTM | 297187-v6.htm |
| . Functional descriptions for this product are found in the 4-Mbit (256K x 16, 512 x 8) Boot Block Flash Memory Family, 4-Mbit (256K x 16, 512 x 8) Low-Power Boot Block Flash Memory Family, 2-Mbit (128K x 16, 256K x 8) Boot Block Flash Memory Family, and 2-Mbit (128K x 16, 256K x 8) Low-Power Boot Block Flash 16, 512 x 8) Boot Block Flash Memory Family datasheet/290451 4-Mbit (256K x 16, 512 x 8) Low-Power Boot Block Flash Memory Family datasheet/290450 2-Mbit (128K x 16, 256K x 8) Boot Block Flash Memory www.datasheetarchive.com/files/intel/design/flcomp/specupdt/297187-v3.htm |
Intel | 01/08/1998 | 3.53 Kb | HTM | 297187-v3.htm |
| . Functional descriptions for this product are found in the 4-Mbit (256K x 16, 512 x 8) Boot Block Flash Memory Family, 4-Mbit (256K x 16, 512 x 8) Low-Power Boot Block Flash Memory Family, 2-Mbit (128K x 16, 256K x 8) Boot Block Flash Memory Family, and 2-Mbit (128K x 16, 256K x 8) Low-Power Boot Block Flash 16, 512 x 8) Boot Block Flash Memory Family datasheet/290451 4-Mbit (256K x 16, 512 x 8) Low-Power Boot Block Flash Memory Family datasheet/290450 2-Mbit (128K x 16, 256K x 8) Boot Block Flash Memory www.datasheetarchive.com/files/intel/design/flcomp/specupdt/297187-v7.htm |
Intel | 30/04/1998 | 3.53 Kb | HTM | 297187-v7.htm |
| . Functional descriptions for this product are found in the 4-Mbit (256K x 16, 512 x 8) Boot Block Flash Memory Family, 4-Mbit (256K x 16, 512 x 8) Low-Power Boot Block Flash Memory Family, 2-Mbit (128K x 16, 256K x 8) Boot Block Flash Memory Family, and 2-Mbit (128K x 16, 256K x 8) Low-Power Boot Block Flash 16, 512 x 8) Boot Block Flash Memory Family datasheet/290451 4-Mbit (256K x 16, 512 x 8) Low-Power Boot Block Flash Memory Family datasheet/290450 2-Mbit (128K x 16, 256K x 8) Boot Block Flash Memory www.datasheetarchive.com/files/intel/design/flcomp/specupdt/297187-v1.htm |
Intel | 16/02/1998 | 3.56 Kb | HTM | 297187-v1.htm |