NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: To inquire for this product | USA / English 1. Monolithic single linear PCM CODEC/Filter 2. On chip PLL for deriving internal clock & external audio device clock from master clock(26MHz). (MCLK: 26MHz, PLLOUT; 256KHz/512KHz/ 11.29MHz /12.288MHz ) 3. PCM Data Interface Timing: 14bit linear data (16bit format serial interface) 4. Long Frame/Short Frame are selected automatically. 5. Variable PCM Data Rate: 256kHz/512kHz 6. Operational amplifiers for gain adjustment 7. On chip voltage detector ... | Original |
2 pages, |
26MHz clock "Voltage Detector" 512-kHz 26MHZ datasheet abstract |
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| Abstract: 512kHz and 800kHz frequencies are defined as follow: Address Memory area 0000H 0000H Sector 1 , 0FE1H 0FE2H 0FE3H 0FE4H 0FE5H ; 512kHz Trim STI RegOscTrimH, 0xH STI RegOscTrimL, 0xH RET , Trim_osc_base_512kHz EQU Trim_osc_base_800kHz EQU 0FE0H 0FE3H If you need to use trimming for your the , Trim_osc_base_512kHz or CALL Trim_osc_base_800kHz Programming Note : On the ELNEC programmers, you are able to , edge on PA[4]). When the trim word is found it must be loaded in the sector 2 (after the 512kHz/800kHz ... | Original |
5 pages, |
FE6H EM6580 75CA EM6580 abstract |
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| Abstract: 32QFN 32QFN 5.2mm*6.2mm / 0.9mm(H) PCM PCM PLL (MCLK: 26MHz, PLL: 256KHz/ 512KHz /11.29MHz/12.288MHz) PCM:14bit(16bit ) Long Frame / Short Frame PCM:256KHz/512kHz CODEC Voltage Detector (2.7V , /512kHz) BCLKPLLOUT PCM BCLKA/DPCM 14L PCM(PCMN'0') BCLKPCM NIN (PCMN'1') I2S SDTO NIN , ] TXAnalog Ground 150uA1.0uF PLL(26MHz) NIN PLL256KHz/512KHz/11.29MHz/12.288MHz NOUT P.18 PLL NIN , +1.0% MHz *) VSS0V *)CODECMCLKPLL256KHz/512KHz(PLLOUT) 8kHz(FS) BCLKPLLOUT MCLKSLEEP'1' VDD = ... | Original |
23 pages, |
14L SMF AK2301BX AK2301BX abstract |
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| Abstract: PCM14 PCM14 16 LongFrame/ShortFrame PCM 256kHz/512kHz CODEC 2 +3.0+3.6V A/DD/A , FS PCMBCLK8kHz * 3 NIN PCM(256kHz/512kHz) BCLK * 2 TOUT PCM DX BCLKA/DPCM 16 4 DR , 0.4 0.7VDD VIL -10 5 V V 0.3VDD VRG 1.4 1.5 ILT -10 BCLK=512kHz VFTN , DR14PCMAnalog D/ASMF D/A (1.5V typ) VREF1.0 uF AMPT AGNDTAGND 1.0uF BCLK(256kHz/512kHz)14PCM 14PCM(2's , BCLK1 SF PCMFS1(125s)14DX,DR 14(BCLK=512kHz) LSIPCM 15 2005/8 ... | Original |
21 pages, |
AK2301A AK2301A abstract |
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| Abstract: To inquire for this product | USA / English 16-pinTSSOP(4.4�6�07mm) 1 of 2 1. High quality voice switched algorithm 2. Selectable PCM Data Interface Timing 稬ong Frame/Short Frame/16bit linear mode/AK130 B1,2mode 3. PCM Data Rates at 512kHz & 2.048MHz 4. A-law/�-law Register Selectable 5. Digital volume for input level adjustment 6. ALC function for receive side 7. Noise suppress function for transmit side 8. Tone detect function for receive side 9. Serial CPU Interface to access the ... | Original |
2 pages, |
AKD2510A AKD2510A abstract |
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| Abstract: power dissipation: 0.42mA(VDD=3.3V)/0.23mA(VDD=1.8V) @fs=8kHz,BCLK=512kHz Packed in a small 16pin QFN ... | Original |
2 pages, |
AK2511 AK2511A AKD2511 AK2511/2511A AK2511 abstract |
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| Abstract: Bluetooth(256kHz/512kHz) LR1 I BluetoothLR(8kHz) - 3.03.6V - 0V XTI pinXTO pin I , fs=8kHz 512kHz (n x 512kHz ±4.66kHz; n=0,1,2,3) 2. fs=48kHz (Ta=-40~85, AVDD=DVDD=3.0~3.6V , 20: "n x 512kHz ±3.665kHz" "n x 512kHz ±4.66kHz" Note 23: "n x 3.072MHz ±21.99kHz" "n x 3.072MHz ... | Original |
24 pages, |
AK7734XQ AKD7734 AK7734 AK7734 abstract |
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| Abstract: HT3146B HT3146B 15 Key Simple Piano Features · · · · · · · · Operating voltage: 2.4V~5.1V System frequency: 512KHz Pull-High resistance is 50K 15key instrument and compass range from C4~D5 Auto power off · · 6 timbres 15 melodies Mode selection by either a push-button or a slide switch One-key-playing function 28 DIP enclosed General Description The HT3146B HT3146B is a CMOS LSI , VSS - 0.2VDD - 0.8VDD - VDD No load FOSC=512KHz VOH=0.6V VIL=VSS 3V ... | Original |
7 pages, |
K1-5 45585 um musical ic saxophone HT3146B HT3146B abstract |
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| Abstract: BLANK "L"(SEGn="L") 45 OSC 45 68pF 512kHz 46 MODEA , 1.0 V SEL IDD fOSC=512kHz 20 mA VDD-VSS 7/14 MSC1209 MSC1209 l l AC ... | Original |
16 pages, |
MSC1209 datasheet abstract |
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| Abstract: fed into a shaping amplifier and then into two logic dividers, to generate a 512-kHz and a , outputs the suppression (both LO and side tone) is ... | Original |
6 pages, |
U7001BG U3770M-MFPG3 U3770M-MFP U3770M U2783B U2760B oscillator 18,432mhz 12,8MHz Am79C4xx U3770M abstract |
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| Abstract: Subscriber Subscriber Line Board DIR SICOFI ® PIC PEB 2052 SCLK PEB 2060 PEB 2260 Backplan EPIC ®-1 PEB 2055 SIP SLD Bus uP 1 Frame (125 us)-512 kbit / s SCLK SIP Transmit (upstream) Receive (downstream) DIR 512 kHz A B FC S A B FC S ITA00538 ITA00538 ... | Original |
1 pages, |
PEB 2055 ITA00538 datasheet abstract |
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| Abstract: Development Systems for Information Technology 2 Tools for ISDN Basis Rate Line Card Designs 2.1 U Transceiver Development Tool (2B1Q) The IEC-Q Reference Board interfaces ISDN transmission lines and terminal areas providing echo cancellation and message recovery using digital techniques. Hence the main use of the IEC-Q Reference Board is to accomplish performance measurements i.e. bit error rate (BER) measurements on the ETSI and ANSI defined loops. The optimized layout of ... | Original |
3 pages, |
PLCC44 socket plcc 44 socket line echo cancellation ic ITS05944 ITS05943 ITS05942 siemens isdn nt1 2092-H 2092-H abstract |
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| Abstract: U3770M U3770M MATRA MHS CT2 I/Q Modulator and Clock Circuitry Description U3770M U3770M is a quadrature modulator realized with MATRA MHS' advanced 0.8 micron CMOS process. The IC is especially designed for CT2 application in con-junction with TELEFUNKEN's RF/IF signal processor U2760B U2760B and a CT2 baseband controller (i.e., AMD PhoXTM controller Am79C4xx Am79C4xx). Together with TELEFUNKEN's PLL IC U2783B U2783B and the GaAs front end U7001BG U7001BG, a complete CT2 chip set is available. Features D Programmable 0 ... | Original |
5 pages, |
U7001BG U3770M U2783B U2760B MHS IC cmos vco ic "Analog switches" oscillator 18,432mhz U3770M abstract |
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| Abstract: U3770M U3770M MATRA MHS CT2 I/Q Modulator and Clock Circuitry Description U3770M U3770M is a quadrature modulator realized with MATRA MHS' advanced 0.8 micron CMOS process. The IC is especially designed for CT2 application in conjunction with TELEFUNKEN's RF/IF signal processor U2760B U2760B and a CT2 baseband controller (i.e., AMD PhoXTM controller Am79C4xx Am79C4xx). Together with TELEFUNKEN's PLL IC U2783B U2783B and the GaAs front end U7001BG U7001BG, a complete CT2 chip set is available. Features D Programmable 0.8 ... | Original |
5 pages, |
U7001BG U3770M U2783B U2760B U3770M abstract |
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| Abstract: U3770M U3770M CT2 I/Q Modulator and Clock Circuitry Description with TEMIC's PLL IC U2783B U2783B and the GaAs front end U7001BG U7001BG, a complete CT2 chip set is available. U3770M U3770M is a quadrature modulator realized with MATRA MHS' advanced 0.8 micron CMOS process. The IC is especially designed for CT2 application in conjunction with TEMIC's RF/IF signal processor U2760B U2760B and a CT2 baseband controller (i.e., AMD PhoXTM controller Am79C4xx Am79C4xx). Together Electrostatic sensitive device. Observe precau ... | Original |
5 pages, |
U7001BG U3770M U2783B U2760B AMP MODU 2 "Analog Switches" oscillator 18,432mhz Am79C4xx U3770M abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
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| kbit/s, continuous Data clock input, f = 512 KHz Frame clock input, f = 8 KHz (1:1) 15.36 MHz Xtal LTrep DOUT DIN CL FR HYBRID XTAL2 CLOUT 512KHz VCO 15.36MHz PHASE COMPARATOR AND LOOP FILTER(*) UIC NTrep CLOUT 512KHz 15.36MHz DOUT DIN CL FR XTAL1 XTAL2 HYBRID To line - LT side A-wire B-wire B-wire DC , datarate = 256 kbit/s, continuous Data output, datarate = 256 kbit/s, continuous Data clock input, f = 512 KHz Frame clock input, f = 8 KHz (1:1) System clock input, f = 15.36 MHz (Tx clock synchronous to www.datasheetarchive.com/files/stmicroelectronics/books/ascii/docs/1439.htm |
STMicroelectronics | 25/05/2000 | 21.83 Kb | HTM | 1439.htm |
| kbit/s, continuous Data clock input, f = 512 KHz Frame clock input, f = 8 KHz (1:1) 15.36 MHz Xtal LTrep DOUT DIN CL FR HYBRID XTAL2 CLOUT 512KHz VCO 15.36MHz PHASE COMPARATOR AND LOOP FILTER(*) UIC NTrep CLOUT 512KHz 15.36MHz DOUT DIN CL FR XTAL1 XTAL2 HYBRID To line - LT side A-wire B-wire B-wire DC , datarate = 256 kbit/s, continuous Data output, datarate = 256 kbit/s, continuous Data clock input, f = 512 KHz Frame clock input, f = 8 KHz (1:1) System clock input, f = 15.36 MHz (Tx clock synchronous to www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/1439.htm |
STMicroelectronics | 02/04/1999 | 19.04 Kb | HTM | 1439.htm |
| kbit/s, continuous Data clock input, f = 512 KHz Frame clock input, f = 8 KHz (1:1) 15.36 MHz Xtal LTrep DOUT DIN CL FR HYBRID XTAL2 CLOUT 512KHz VCO 15.36MHz PHASE COMPARATOR AND LOOP FILTER(*) UIC NTrep CLOUT 512KHz 15.36MHz DOUT DIN CL FR XTAL1 XTAL2 HYBRID To line - LT side A-wire B-wire B-wire DC , datarate = 256 kbit/s, continuous Data output, datarate = 256 kbit/s, continuous Data clock input, f = 512 KHz Frame clock input, f = 8 KHz (1:1) System clock input, f = 15.36 MHz (Tx clock synchronous to www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/1439-v2.htm |
STMicroelectronics | 14/06/1999 | 19 Kb | HTM | 1439-v2.htm |
| Data output, datarate = 256 kbit/s, continuous Data clock input, f = 512 KHz Frame clock input, f = 256 kbit/s, continuous Data clock input, f = 512 KHz Frame clock input, f = 8 KHz (1:1) 15 XTAL2 CLOUT 512KHz VCO 15.36MHz PHASE COMPARATOR AND LOOP FILTER(*) UIC NTrep CLOUT 512KHz 15.36MHz DOUT DIN CL FR XTAL1 XTAL2 HYBRID To line - LT side A www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/1439-v1.htm |
STMicroelectronics | 25/05/2000 | 20.81 Kb | HTM | 1439-v1.htm |
| ; 512 KHz to 6176 KHz in format 4. When BCLK is an output, its frequency is 256 KHz, 512 KHz, 1536 KHz the configuration. When BCLK is an input, its frequency may be any multiple of 16 KHz from 512 KHz to 6176 KHz. When BCLK is an output, its frequence is 512 KHz in NT1 auto and NTRR auto frequencies are: 256 KHz, 512 KHz, 1536 KHz, 2048 KHz, 2560 KHz. In format 4 the use of 256kHz is -AUTO or NT-RR-AUTO configuration is selected, BCLK bit clock frequency of 512 kHz is automatically www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/1574-v2.htm |
STMicroelectronics | 25/05/2000 | 145.52 Kb | HTM | 1574-v2.htm |
| ; 512 KHz to 6176 KHz in format 4. When BCLK is an output, its frequency is 256 KHz, 512 KHz, 1536 KHz configuration. When BCLK is an input, its frequency may be any multiple of 16 KHz from 512 KHz to 6176 KHz. When BCLK is an output, its frequency is 512 KHz in NT1 auto and NTRR auto configurations, 1536 KHz : 256 KHz, 512 KHz, 1536 KHz, 2048 KHz, 2560 KHz. In format 4 the use of 256kHz is forbidden. BCLK . When NT1-AUTO or NT-RR-AUTO configuration is selected, BCLK bit clock frequency of 512 kHz is www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5634-v2.htm |
STMicroelectronics | 25/05/2000 | 152.33 Kb | HTM | 5634-v2.htm |
| of 8 KHz from 256 KHz to 4096 KHz in formats 1, 2, 3; 512 KHz to 6176 KHz in format 4. When BCLK is an output, its frequency is 256 KHz, 512 KHz, 1536 KHz, 2048 KHz or 2560 KHz depending of the from 512 KHz to 6176 KHz. When BCLK is an output, its frequence is 512 KHz in NT1 auto and NTRR auto and the frequency selected. Possible frequencies are: 256 KHz, 512 KHz, 1536 KHz, 2048 KHz, 2560 KHz -RR-AUTO configuration is selected, BCLK bit clock frequency of 512 kHz is automatically selected When NT configuration www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/1574-v1.htm |
STMicroelectronics | 02/04/1999 | 143.73 Kb | HTM | 1574-v1.htm |
| input, its frequency may be any multiple of 8 KHz from 256 KHz to 4096 KHz in formats 1, 2, 3; 512 KHz to 6176 KHz in format 4. When BCLK is an output, its frequency is 256 KHz, 512 KHz, 1536 KHz, 2048 multiple of 16 KHz from 512 KHz to 6176 KHz. When BCLK is an output, its frequence is 512 KHz in NT1 auto depending on the format and the frequency selected. Possible frequencies are: 256 KHz, 512 KHz, 1536 KHz bit clock frequency of 512 kHz is automatically selected When NT configuration is selected, BCLK www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/1574.htm |
STMicroelectronics | 20/10/2000 | 149.98 Kb | HTM | 1574.htm |
| KHz to 4096 KHz in formats 1, 2, 3; 512 KHz to 6176 KHz in format 4. When BCLK is an output, its frequency is 256 KHz, 512 KHz, 1536 KHz, 2048 KHz or 2560 KHz depending of the selection in CR1 register. In from 512 KHz to 6176 KHz. When BCLK is an output, its frequency is 512 KHz in NT1 auto and NTRR auto : 256 KHz, 512 KHz, 1536 KHz, 2048 KHz, 2560 KHz. In format 4 the use of 256kHz is forbidden. BCLK is or NT-RR-AUTO configuration is selected, BCLK bit clock frequency of 512 kHz is automatically www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5634-v1.htm |
STMicroelectronics | 02/04/1999 | 150.49 Kb | HTM | 5634-v1.htm |
| ; 512 KHz to 6176 KHz in format 4. When BCLK is an output, its frequency is 256 KHz, 512 KHz, 1536 KHz multiple of 16 KHz from 512 KHz to 6176 KHz. When BCLK is an output, its frequency is 512 KHz in NT1 auto depending on the format and the frequency selected. Possible frequencies are: 256 KHz, 512 KHz, 1536 KHz frequency of 512 kHz is automatically selected When NT configuration is selected, BCLK bit clock www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/5634.htm |
STMicroelectronics | 20/10/2000 | 157.11 Kb | HTM | 5634.htm |