| Contextual Datasheet Results |
1 - 16 of about 16 for 40MX |
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First line: v3.1 40MX 42MX Automotive FPGA Families Features High Capacity Single-Chip ASIC Alternative Abstract: .. 40MX and 42MX Automotive FPGA Families. Features. High Capacity • Single-Chip ASIC Alternative for Automotive Applications 3,000 to 54,000 System Gates Up to 2.5 kbits Configurable Dual-Port .. datasheet abstract.. |
477.09 Kb |
78 Pages 
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First line: v6.1 40MX 42MX FPGA Families Features High Capacity Single-Chip ASIC Alternative System Abstract: .. 40MX and 42MX FPGA Families. Features. High Capacity • Single-Chip ASIC Alternative 3,000 to 54,000 System Gates Up to 2.5 kbits Configurable Dual-Port SRAM Fast Wide-Decode Circuitry Up to 202 .. datasheet abstract.. |
3068.89 Kb |
124 Pages
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First line: v6.0 40MX 42MX FPGA Families Features High Capacity Single-Chip ASIC Alternative System Abstract: .. 40MX and 42MX FPGA Families. Features. High Capacity • Single-Chip ASIC Alternative 3,000 to 54,000 System Gates Up to 2.5 kbits Configurable Dual-Port SRAM Fast Wide-Decode Circuitry Up to 202 .. datasheet abstract.. |
785.2 Kb |
123 Pages
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First line: v5.0 40MX 42MX FPGA Families High apaci Single-Chip ASIC Alternative System Gates Abstract: .. 40MX and 42MX FPGA Families Features. High Capacity. • Single-Chip ASIC Alternative 3,000 to 54,000 System Gates Up to 2.5 kbits Configurable Dual-Port SRAM Fast Wide-Decode Circuitry Up to 202 .. datasheet abstract.. |
748.02 Kb |
116 Pages |
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First line: v5.0 40MX 42MX FPGA Families High apaci Single-Chip ASIC Alternative System Gates Abstract: .. 40MX and 42MX FPGA Families Features. High Capacity. • Single-Chip ASIC Alternative 3,000 to 54,000 System Gates Up to 2.5 kbits Configurable Dual-Port SRAM Fast Wide-Decode Circuitry Up to 202 .. datasheet abstract.. |
745.61 Kb |
116 Pages |
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First line: 40MX 42MX FPGA Families High apaci Single-Chip ASIC Alternative System Gates kbits Abstract: .. 40MX and 42MX FPGA Families Features. High Capacity. • Single-Chip ASIC Alternative 3,000 to 54,000 System Gates Up to 2.5 kbits Configurable Dual-Port SRAM Fast Wide-Decode Circuitry Up to 202 .. datasheet abstract.. |
683.92 Kb |
115 Pages |
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First line: 40MX 42MX FPGA Families Features High Capacity Certification Ceramic Devices Available DSCC Abstract: .. 40MX and 42MX FPGA Families. Features. High Capacity. • Single Chip ASIC Alternative • 2,000 to 36,000 Available Logic Gates • Up to 2.5 Kbits Configurable Dual-Port SRAM • Fast Wide-Decode Circuitry .. datasheet abstract.. |
510.64 Kb |
116 Pages
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First line: 40MX 42MX Families FPGAs Features High Capacity Certification Ceramic Devices Available DSCC Abstract: .. 40MX and 42MX Families FPGAs. Features. High Capacity. • Single Chip ASIC Alternative • 2,000 to 36,000 Available Logic Gates • Up to 2.5 Kbits Configurable Dual-Port SRAM • Fast Wide-Decode Circuitry .. datasheet abstract.. |
702.5 Kb |
116 Pages
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First line: v6.0 40MX 42MX FPGA Families High apaci Single-Chip ASIC Alternative System Gates Abstract: .. 40MX and 42MX FPGA Families Features. High Capacity. • Single-Chip ASIC Alternative 3,000 to 54,000 System Gates Up to 2.5 kbits Configurable Dual-Port SRAM Fast Wide-Decode Circuitry Up to 202 .. datasheet abstract.. |
743.27 Kb |
117 Pages
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First line: Preliminary Datasheet Integrator Series FPGAs 40MX 42MX Families Features High Capacity Abstract: .. Integrator Series FPGAs ‐ 40MX and 42MX Families. Features. High Capacity. • 2,000 to 52,000 available logic gates • Up to 3 Kbits configurable dual-port SRAM • Fast wide-decode circuitry • Up to 250 .. datasheet abstract.. |
420.91 Kb |
84 Pages
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First line: Guide ACTgen Macros more information about Actels products call 888-99-ACTEL visit site Abstract: .. Family Support ACT 1, ACT 2/1200XL, ACT 3, 3200DX, 40MX, 42MX, 54SX, 54SX-A, eX. Description. Cin. Sum. Cout. DataA. DataB. Port Description. Port Name Size Type Req/Opt Function. DataA WIDTH Input Req .. datasheet abstract.. |
1196.74 Kb |
106 Pages
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First line: Silicon Explorer Users Guide Actel Corporation Mountain View 94043-4655 Actel Corporation. rights Abstract: .. ACT1 and 40MX families of devices do not contain SDO pin. PRA from the device must be connected to SDO input of Silicon Explorer. 2. For devices not listed i.e. 42MX24/A42MX36, SX, eX, SX-A, RTSX .. datasheet abstract.. |
376.96 Kb |
32 Pages |
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First line: Using Synplify Design Actel Radiation-Hardened FPGAs Actels RadHard RadTolerant FPGAs offer Abstract: .. ACT 1 and 40MX devices use CC-FFs by default. CC-FFs cannot be implemented in 54SX devices at this time. CC-FFs typically use twice the area resources of S-FFs. Using Triple Voting. Triple voting .. datasheet abstract.. |
92.1 Kb |
8 Pages
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First line: CHIP RESISTORS Series DATA SHEET Product Specification Sep. Supersedes Date Jan. Chip Abstract: .. 10mX, 20mX, 30mX, 40mX, 50mX, 60mX 3 digits Uses MIL Standard resistance marking “R” signifies decimal place. RL0402 / ALL STYLE NOT IN E-24 SERIES / R<100mR FOR RL0603. No marking. MARKING. RL XXXX .. datasheet abstract.. |
217.89 Kb |
7 Pages |
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First line: FPGA / CPLD CONVERSION SERVICE WITH RISK COST REDUCTION MADE EASY todays market cost Abstract: .. 40MX ACT3. 42MX 1200XL. ProASIC ACT1. ACT2. Lattice®. ispLSI5000V. ispLSI6000. ispLSI8000 .. datasheet abstract.. |
977.71 Kb |
8 Pages 
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First line: Verilog Simulation Guide Windows UNIX Environments Actel Corporation Sunnyvale Actel Corporation. rights Abstract: .. family ACT1, ACT2 for ACT 2 and 1200XL devices , ACT3, 3200DX, 40MX, 42MX, 54SX, 54SX-A, and eX as needed. For example: edn2vlog fam:<act_fam> <design_name> Compiled Verilog libraries are .. datasheet abstract.. |
1079.79 Kb |
43 Pages
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