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CD4001BM Texas Instruments CMOS Quad 2-Input NOR Gate 14-SOIC -55 to 125 ri Buy
CD4001BMT Texas Instruments CMOS Quad 2-Input NOR Gate 14-SOIC -55 to 125 ri Buy
CD4001BNSR Texas Instruments CMOS Quad 2-Input NOR Gate 14-SO -55 to 125 ri Buy

4001 4011 cmos

Catalog Datasheet Results Type PDF Document Tags
Abstract: Multivibrator Similar Devices 7403 / 74132 / 4011 / 4093 / 40107 4001 7400 / 74132 / 4011 / 4093 / 40107 , devices that belong to the same group. Device 4001 4002 4007 4008 4009 4011 4012 4013 4014 , CMOS chips that are readily available over the counter ( from such places as Maplin Electronics in the UK ). Tables of both TTL and CMOS devices are provided along with tables grouping chips with the same functionality together. The following tables are available . TTL Device Summary CMOS Device ... Original
datasheet

12 pages,
125.46 Kb

7404 ttl inverter 7476 3 bit ripple counter 4070 CMOS XOR 74241 74374 74244 7476 J-K Flip-Flop 4001 4011 cmos 7476 counter 7493 flip-flop counter design a BCD counter using j-k flipflop 74373 cmos dual s-r latch 7408, 7404, 7486, 7432 datasheet abstract
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Abstract: /CD4011C /CD4011C are monoli thic complementary MOS (CMOS) quadruple two-input NOR and NAND gate integrated , Current VDD = 5.0V, V0 = 0.4V, V| = VDD N-Channel (4001) Vdd = 10V, V0 = 0.5V, V| = Vdd (Note 2) tDp mA mA mA mA mA mA mA pA Output Drive Current Vdd = 5.0V, V0 = 2.5V, V| = Vss P-Channel (4001) VDD , (4011) Vdd = 10V, V0 = 0.5V, V, = Vdd (Note 2) idn Id P Output Drive Current Vdd = 5.0V, V0 = 2.5V,V i =V ss P-Channel (4011) Vdd = 10V, V0 = 9.5V, V, = Vss (Note 2) li Input Current 5-9 ... OCR Scan
datasheet

4 pages,
122.72 Kb

4011 c-mos CD4011M CD4011CJ 4011 cmos cmos ic 4011 ic nand 4011 MOS 4011 IC 4011 CMOS 4011 CMOS NAND GATE ic cmos 4011 4001 4011 cmos CD4001CN CD4011CN integrated circuit 4011 CD4001M/CD4001C C04011M/C04011C CD4001M/CD4001C abstract
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Abstract: , CD4011M/CD4011C CD4011M/CD4011C are mono lithic complementary MOS (CMOS) quadruple two-input NOR and NAND gate integrated , Immunity (All Inputs) Output Drive Current N-Channel (4001) (Note 2) Output Drive Current P-Channel (4001) (Note 2) Output Drive Current N-Channel (4011) (Note 2) Id P Output Drive Current P-Channel (4011) (Note , Immunity (All Inputs) Output Drive Current N-Channel (4001) (Note 2) Output Drive Current P-Channei (4001) (Note 2) Output Drive Current N-Channel (4011) (Note 2) Output Drive Current P-Channel (4011) (Note 2 ... OCR Scan
datasheet

4 pages,
132.42 Kb

4001 4011 cmos IC CD4011 cmos ic cd4001 BE 4011 IC NAND CD4001 4011 CMOS CD4001C CD4011M ic cmos 4011 or ic cmos 4011 CD4001M/CD4001C/CD4011M/CD4011C CD4001M/CD4001C CD4011M/CD4011C CD4001M/CD4001C/CD4011M/CD4011C abstract
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Abstract: , LX1G, V2G, V2T CMOS 4000 NAND 4011; 4012; 4093 02; 27 4001; 4002 AND 08; 09; 11 , 4001 4002 4006 4010 4011 4012 4013 4014 4015 4016 4017 4018 4019 4020 4021 4022 4024 , advanced HCMOS ALVC: Advanced low-voltage HCMOS CMOS 4000B 4000B Dual gate VHC/VHCT HC/HCT: high-speed CMOS , low-voltage HCMOS LVT: low-voltage CMOS technology LVX: 3.3V low-voltage, low noise HCMOS, 5V input tolerant ... Original
datasheet

10 pages,
1086.94 Kb

act 4514 DATASHEET vhct 126 4081 nand 4049 DIP14 cmos 4047 equivalent hcf 4093 datasheet 4017 14 pin package hcf 4541 be m74 display 4048 datasheet hct vhc 595 HC 4093 hcf 4541 equivalent datasheet abstract
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Abstract: CMOS QUAD TWO-INPUT NOR GATE GENERAL DESCRIPTION The 4001 quad 2-inpui NOR gate is constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. These complementary MOS logic gates find primary use where low power dissipation and/or high noise immunity is desired. This device contains circuitry to protect the inputs against damage due to high sialic voltages , 4011 is constructed with P and N channel enhancement mode devices in a single monolithic structure ... OCR Scan
datasheet

1 pages,
60.16 Kb

4011 CMOS NAND GATE 4001 nor gate HE 4011 CI 4001 MOS 4011 4011 cmos logic gate 4001 4011 cmos 4011 fan-out CI 4011 datasheet abstract
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Abstract: KG10000 KG10000 SERIES SEMI-CUSTOM CMOS GATE ARRAY CMOS SILOCON GATE ARRAY The KG10000 KG10000 Series is consists of silicon gate CMOS arrays whose interconnection are initially unspecified, therefore custom LSI , intervals along the row and column of the chip, also consist of I/O pads which are compatible of CMOS or , place and route and a design rule check. • High performance oxide isolated silicon gate CMOS technology , (famout: 2) • Maximum Toggling Frequency: 40MHz • High density 3.5 micron geometries • TTL and CMOS I/O ... OCR Scan
datasheet

6 pages,
126.58 Kb

74144 ttl 74266 TTL 74139 74395 4001 4011 cmos 74226 7498 ttl 74381 ttl 74395 74289 74142 CMOS 4017 series 74106 TTL 74289 7408, 7404, 7486, 7432 KG10000 KG10000 KG10000 abstract
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Abstract: , LX1G, V2G, V2T CMOS 4000 NAND 4011; 4012; 4093 02; 27 4001; 4002 AND 08; 09; 11 , 597 623 640 646 651 652 670 688 4001 4002 4006 4010 4011 4012 4013 4014 4015 4016 , HCMOS ALVC: Advanced low-voltage HCMOS CMOS 4000B 4000B Dual gate VHC/VHCT HC/HCT: high-speed CMOS LCX , HCMOS LVT: low-voltage CMOS technology LVX: 3.3V low-voltage, low noise HCMOS, 5V input tolerant ... Original
datasheet

10 pages,
417.98 Kb

MM 4054 M22100 LVT 4502 LVC 161284 4000B LVC 139 hcf 4093 HCT CMOS 4017 family characteristics hct 4094 hct 4010 datasheet C3245 hcf 4541 be m013tr CMOS4000 datasheet abstract
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Abstract: cKO O -•- ZT^ O 005388 ™ FERRA^T_ INC. FKK MISERIES HIGH VOLTAGE SILICON GATE CMOS ARRAYS FEATURES • Oxide Isolated Polysilicon Gate CMOS Technology. • 3V to 15V Specified Operating Voltage. • , Complexity. • Accomodates High Performance Analog Functions. • All Inputs and Outputs are TTL/CMOS , utilize an enhanced oxide isolated polysilicon gate 18 volt CMOS process technology. Ideal application , Supply Current I in and Iout - 0/iA 10* MA VlL Low Level Input Voltage CMOS Type Input 1.5 V TTL ... OCR Scan
datasheet

8 pages,
444.59 Kb

ic 40138 PIN DIAGRAM OF 4017 DECODED DECADE 40138 4011 nand gate IC 4027 CMOS Flip-Flop IC 4027 pin diagram 4000 SERIES cmos logic data cmos logic 4000 series mhb 4013 MHB 4012 4017-DECADE COUNTER transistor 2248 datasheet abstract
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Abstract: Other TTL Families DTL 9300 9600 93L 96L 54L 93S Other CMOS Families CD4K 70 80C 78 88C FAST is a , Industrial M e Mil Aero Function Bipolar BiCMOS CMOS CROSSVOLT FASTr FAST 00 A ALS , C C A C M A 2 A Cross Reference Function Bipolar BiCMOS CMOS , Bipolar BiCMOS CMOS CROSSVOLT FASTr FAST ALS AS 123 LS S C TTL ABT , Bipolar BiCMOS CMOS CROSSVOLT FASTr FAST ALS AS LS 188 S TTL ABT LCX ... Original
datasheet

14 pages,
164.98 Kb

4066 Cross Reference lcx 574 LS 373 CMOS 4002 cmos 4082B ECL 9324 4013 datasheet hct 646B national hct 4049 datasheet hct 4049 datasheet 4001 4011 cmos HC 4011 FCT 322 F100K F100K abstract
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Abstract: 4016 DC method; VR = 3 V dc IR 1.0 µA dc Forward voltage 4011 DC method, IF = 20 , DC method; VR = 3 V dc IR 1.0 µA dc Forward voltage 4011 DC method, IF = 20 mA dc , dc IR 1.0 µA dc Forward voltage 4011 DC method, IF = 20 mA dc VF 3.0 V dc 4001 VR = 0; f = 1 MHz C 100 pF Subgroup 4 Capacitance Subgroups 5, 6, and 7 Not , 1.0 µA dc Forward voltage 4011 DC method, IF = 20 mA dc VF 3.0 V dc ... Original
datasheet

11 pages,
76.57 Kb

JAN1N6610 janm19500 JAN1N6093 C 520D JANTX1N6610 JANTXM19500 M19500/519-01 JAN JANTX1N6093 51901 4001 4011 cmos ttl 4011 jantxm19500/51902 M19500/519-02 JANM19500/51901 MIL-PRF-19500/520D MIL-PRF-19500/520C MIL-PRF-19500/520D abstract
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EESchema-DOCLIB Version 2.0 Date: 17/2/2005-08:14:38 # $CMP 14528 D Monostable K CMOS $ENDCMP # $CMP 14529 D Dual 4 to 1 Multiplexer K CMOS MUX MUX4 $ENDCMP # $CMP 14538 D Monostable K CMOS $ENDCMP # $CMP 4001 D Quad Nor 2 inputs K CMOS Nor2 $ENDCMP # $CMP 4002 D Dual Nor 4 input K CMOS Nor4 $ENDCMP # $CMP 4011 D Quad Nand 2 inputs K CMOS Nand2 $ENDCMP # $CMP 4012 D Dual Nand 4 inputs K CMOS Nand4 $ENDCMP # $CMP 4013 D Dual D FlipFlop, Set & reset K CMOS DFF
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PRELIMINARY - 3.3V CMOS Dual Asynchronous FIFO Dual 512 x 9, Dual 1024 x 9 Multi-Port and FIFO Memories and Low power 3.3V 1-Meg CMOS Static RAM (128K x 8-bit) High-Speed Static RAMs and Modules/Asynchronous and FIFO Memories and Modules/Multi-Port I/O Models/IBIS Models 07/01/97 n/a pgs. 89 KB 4001 71421PF 71421PF 71421PF 71421PF and Modules/Multi-Port I/O Models/HSPICE Models 07/01/97 n/a pgs. 31 KB 4011 70V25J 70V25J 70V25J 70V25J HSPICE Model Models/HSPICE Models 07/01/97 n/a pgs. 45 KB 4012 74ALVCH16260 74ALVCH16260 74ALVCH16260 74ALVCH16260 3.3V CMOS 12-Bit Tri-Port Bus Exchanger
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Inc. DS40160A/4_011-page 1 Microchip Technology Incorporated, has been granted a nonexclusive original� 1997 Microchip Technology Inc. DS40160A/4_001-page 1 Microchip Technology Incorporated, has been
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Answers Database Index Number of Solutions: 3125 Xilinx Answer #100 : Xilinx Libraries: All Xilinx/Viewlogic components have a LEVEL= attribute to decrease runtime Xilinx Answer #101 : Viewsim: About ? Nodes in Timing Simulations Xilinx Answer #102 : FPGA Configuration: DONE Doesn't Go High; General XC4000 XC4000 XC4000 XC4000 Debugging Hints Xilinx Answer #103 : XC4000 XC4000 XC4000 XC4000: The Five
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Xilinx 16/02/1999 433.95 Kb HTM wcd00072-v1.htm
> LVC: 5V-Tolerant 3.3V CMOS Logic Speed CMOS >TTL/CMOS LVTTL SN74LVC08A SN74LVC08A >Application Reports for SN74LVC08A SN74LVC08A Implications of Slow or Floating CMOS : 5V-Tolerant 3.3V CMOS Logic
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Texas Instruments 09/01/1997 3378.32 Kb SGM asl.sgm
1 1 0 /catalog/appnotes/15106.html Applicationnotes for Bipolar power transistors Title Date FS072 FS072 FS072 FS072: Horizontal Deflection for 17 64kHz monitors - BU4522AF/AX BU4522AF/AX BU4522AF/AX BU4522AF/AX 1998-04-14 FS078 FS078 FS078 FS078: Horizontal deflection transistors for 17, 70 kHz monitors 2 1 0 /catalog/appnotes/15107.html Applicationnotes for Lighting Title Date AN BUJ100 BUJ100 BUJ100 BUJ100: Philips BUJ100 BUJ100 BUJ100 BUJ100 transistor in TO-92 suits all Philips BUJ100 BUJ100 BUJ100 BUJ100 transistor in TO-92 suits all Compact Fluorescent Lamp 3 1 0 /catalog/appnotes/15230.html Applicationnotes for Deflecti
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Answers Database Index Number of Solutions: 4710 Xilinx Answer #100 : Xilinx Libraries: All Xilinx/Viewlogic components have a LEVEL= attribute to decrease runtime Xilinx Answer #101 : Viewsim: About ? Nodes in Timing Simulations Xilinx Answer #102 : FPGA Configuration: DONE Doesn't Go High; General XC4000 XC4000 XC4000 XC4000 D
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