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1 - 50 of about 452 for 4000B |
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First line: 4000b 42RLU-4000B Series 4000B Series 4000B full size self-contained sensors designed operate wide range industrial applications. wide selection plug-in timing modules including Delay, One-Shot, Delayed One-Shot, Motion Detector counting module increase application solving capability Series 4000B se Abstract: .. Description Series 4000B full size self-contained sensors are designed to operate in a wide range of industrial applications. A wide selection of plug-in timing modules including On and Off .. Tags: 42RLU-4000B 4000b 5V 1A DPDT RELAY 42RLU-4200B 42RLR-4001B voltmeter DC TRIAC MODULE triac catalog triac 214 215 216 photoswitch npn photoswitch* photoelectric motion detector Photoelectric motion-detector light dark sensor circuit Infrared Receiver (sensor) datasheet abstract.. |
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First line: Transceiver Edimax Transceiver Series Ethernet network world mixed with types medium connectors. very common that single installation site requires multiple media. Edimax provides several transceivers apply such conditions. Abstract: .. to 10Base-T 10Base-T twisted-pair ET-4000T ET-4000T , 10Base-2 10Base-2 coaxial ET-4000B and 10Base-FL 10Base-FL fiber optic ET-4000FL ET-4000FL . All units can be connected directly to AUI port and requiring no configuration. F Features .. Tags: mark CA 4000B 4000* datasheet abstract.. |
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First line: K3N7V(U)4000B-DC 64M-Bit (4Mx16) CMOS MASK Switchable organization 4,194,304 16(word mode) Fast access time 3.3V Operation 100ns(Max.) 3.0V Operation 120ns(Max.) Supply voltage single +3.3V/ single +3.0V Current consumption Operating 40mA(Max.) Fully static operation inputs outputs compatible Three Abstract: .. K3N7V U 4000B-DC CMOS MASK ROM. Preliminary Information. Pin Name Pin Function. A0 - A21 Address Inputs. Q0 - Q15 Data Outputs. OE Output Enable. VCC Power. VSS Ground. 64M-Bit 64M-Bit 4Mx16 4Mx16 CMOS MASK ROM. The .. Tags: 4000B datasheet abstract.. |
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First line: K3N7V(U)4000B-DC 64M-Bit (4Mx16) CMOS MASK Switchable organization 4,194,304 16(word mode) Fast access time 3.3V Operation 100ns(Max.)@CL=50pF, 120ns(Max.)@C L=100pF 3.0V Operation 120ns(Max.)@CL=100pF Supply voltage single +3.3V/ single +3.0V Current consumption Operating 40mA(Max.) Fully static op Abstract: .. K3N7V U 4000B-DC CMOS MASK ROM. Pin Name Pin Function. A0 - A21 Address Inputs. Q0 - Q15 Data Outputs. OE Output Enable. VCC Power. VSS Ground. 64M-Bit 64M-Bit 4Mx16 4Mx16 CMOS MASK ROM. The K3N7V U 4000B-DC is a fully .. Tags: 4000B datasheet abstract.. |
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First line: TN1019 Using ispMACH 4000 Devices Multiple JTAG Voltage Environments Technical Note TN1019 Abstract: .. A 1.8V ispMACH 4000C 4000C device has 1.8V LVCMOS JTAG pins; the ispMACH 4000B has 2.5V JTAG pins. When a JTAG chain of ispMACH 4000C 4000C or ispMACH 4000B devices is designed onto a board, the JTAG signals .. Tags: TN1019 jtag cable isptm 74LVC07A 4000B TN1019 |
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First line: PUMA67 Pinout EEPROM Summary features PUMA (Pinned Uncommitted Memory Array) product range well defined upgrade path. Definition Assuming relevant address lines routed system board, upgrade achieved simply removing device replacing with next generation part. PUMA67 pinout standard established 1991 w Abstract: .. Pin 4000 4000A 4000A 4000B. 1 GND GND GND. 2 /CS3 /CS3 /CS3. 3 A5 A5 A5. 4 A4 A4 A4. 5 A3 A3 A3. 6 A2 A2 A2. 7 A1 A1 A1. 8 A0 A0 .. Pin 4000 4000A 4000A 4000B. 49 D26 D26 D26. 50 D25 D25 D25. 51 D24 D24 D24. 52 GND GND GND. 53 D23 D23 D23. 54 D22 D22 .. Tags: PUMA67 |
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First line: 4073B TRIPLE 3-INPUT GATE DESCRIPTION This CMOS logic element provides positive Triple 3-lnptrt fully buffered highest noise immunity pattern insensitivity output impedance. LOGIC CONNECTION DIAGRAM (TOP VIEW) NOTE: Flatpak version same pinouts (Connection Diagram) Dual n-line Package. Abstract: .. Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described in this .. Tags: datasheet abstract.. |
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First line: 4071B QUAD 2-INPUT GATE DESCRIPTION 4071 positive logic Quad 2-lnput Gate. outputs fully buffered highest noise immunity pattern insensitivity output impedance. LOGIC CONNECTION DIAGRAM (TOP VIEW) _5>J Abstract: .. Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described in this .. Tags: 40718 CMOS 4071 datasheet abstract.. |
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First line: 4082B^ DUAL 4-INPUT GATE DESCRIPTION This CMOS logic element provides positive Dual 4-lnput function. outputs fully buffered highest noise immunity pattern insensitivity output impedance. LOGIC CONNECTION DIAGRAM (TOP VIEW) NOTE: Flatpak version same pinouts (Connection Diagram) Dual In-line Package Abstract: .. Additional DC Characteristics are listed in th Is section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described in this .. Tags: datasheet abstract.. |
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First line: 9664 DIGIT DRIVER (Reference: Fairchild 9664 Data Sheet) This driver ideal driving high current devices such LEDs, relays lamps. High input impedance allows direct drive from Fairchild 4000B CMOS devices; however, there some degradation logic level CMOS output. 9664 specified operation, 9664A SINK C Abstract: .. High input impedance allows direct drive from Fairchild 4000B CMOS devices; however, there is some degradation in logic level at the CMOS output. The 9664 is specified to 10 V operation, the 9664A 9664A .. Tags: CMOS 4000B series device 9374 datasheet abstract.. |
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First line: 4023B DESCRIPTION This CMOS logic element provides 3-input positive NAND function. outputs fully buffered highest immunity pattern insensitivity output impedance. LOGIC CONNECTION DIAGRAM (TOP VIEW) Abstract: .. Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described in this .. Tags: datasheet abstract.. |
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First line: 4075B TRIPLE 3-1NPUT GATE DESCRIPTION This CMOS logic element provides positive Triple 3-lnpoi fully buffered highest noise immunity pattern insensitivity output impedance. LOGIC CONNECTION DIAGRAM (TOP VIEW) NOTE: Flatpak version same pinouts (Connection Diagram) Dual In-line Package., CHARACTERIST Abstract: .. Additional DC Characteristics are I isted in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described in this .. Tags: arne 4075B datasheet abstract.. |
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First line: d28 diode PUMA Pinout SRAM Summary features PUMA (Pinned Uncommitted Memory Array) product range well defined upgrade path. Definition Assuming relevant address lines routed system board, upgrade achieved simply removing device replacing with next generation part. PUMA67 pinout standard established Abstract: .. Pin 4000 4000A 4000A 4000B 16000 16000A 16000A 16000B 16000B . 1 GND GND GND GND GND GND. 2 /CS3 /CS3 /CS3 /CS3 /CS3 /CS3. 3 A5 A5 A5 A5 A5 A5. 4 A4 A4 A4 A4 A4 A4. 5 A3 A3 A3 A3 A3 A3. 6 A2 A2 A2 A2 A2 A2. 7 A1 A1 A1 A1 A1 A1. 8 A0 A0 A0 A0 A0 A0. 9 NC NC .. Tags: d28 diode PUMA67 |
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First line: 4000B DC/DC Power Modules Input Series; 1.8V, 2.5V 3.3V Outputs High efficiency full load High power density, 48.2 W/in3, (3.3V 40A) Fast dynamic response, 200µs, mVpeak output ripple, mVp-p Parallelable with external components Wide input voltage range (36-75V) 1,500Vdc isolation voltage case Abstract: .. PKJ 4000B PIT. 40A DC/DC Power Modules. 48V Input Series; 1.8V, 2.5V and 3.3V Outputs. • High efficiency 92% Typ at full load • High power density, 48.2 W/in3, 3.3V @ 40A • Fast dynamic response, 200μs .. Tags: 5V 40A DESIGN POWER SUPPLY 4110B 4000B datasheet abstract.. |
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First line: HUV-2000B G/CANADA/OPTOELEK 3030blD D000314 Series (1100BG; 1100BQ; 2000B; 4000B) T.v/.<7 Built-in Noise Amplifier Groundable Case Shielded Amplifier Large Active Area Wide Spectral Range Oxide Passivated Structure Operating Data Specifications Typical Performance Bias (Photodiode) (Amplifier) Ch Abstract: .. 47E  ■3030blD 3030blD D000314 D000314 T  CANA HUV Series 1100BG 1100BG ; 1100BQ 1100BQ ; 2000B 2000B ; 4000B T.v/.<7 Features †Built-in Low Noise Amplifier †Groundable Case Shielded Amplifier Large Active Area Wide Spectral .. Tags: HUV-2000B datasheet abstract.. |
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First line: 4060B GATE BUFFER NAND INVERTER BUFFER STATE BIDIRECTIONAL MULTI SCHMITT TRIGGER FLIP FLOP FLIP FLOP FLIP FLOP STATE INTERFACE CIRCUIT LATCH STATE MULTIVIBRATOR DECODER SEGMENT ENCODER DISPLAY DRIVER WITH COUNTER REGISTER HC/HCT, AC/ACT, VHC/VHCT, LCX, LVQ, LVX, VCX, V2G, V2T, V1G, STANDARD CODE 400 Abstract: .. 4000B, 4001B 4001B , 4002B 4002B , 4025B 4025B 4068B 4068B , 4073B 4073B , 4081B 4081B , 4082B 4082B 4071B 4071B , 4072B 4072B , 4075B 4075B 4077B 4077B 4030B 4030B , 4070B 4070B 4069UB 4069UB , 4502B 4502B 4007UB 4007UB , 4009UB 4009UB , 4010B 4010B , 4041UB 4041UB , 4049B 4049B , 4050B 4050B , 4052B 4052B , 40107B 40107B 4503B 4503B 4019B 4019B .. Tags: 4060B 40106B 4017B 40107B 4039B lcx 574 hct 4052 datasheet hct 4049 datasheet hct 4016 hct 241 datasheet hct 138 HC 40106* ex-or gate ex-nor datasheet alu 181 datasheet 4017 C4245 C3245 |
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First line: 4030B QUAD EXCLUSIVE-OR GATE DESCRIPTION 4030B CMOS logic element provides Exclusive-OR function. outputs fully buffered best performance. 4030B direct replacement 74C86/54C86 14507. F4030 QUAD EXCLUSIVE-OR GATE Flatpak version same pinouts (Connection Diagram) Dual In-line Package. Abstract: .. Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transitio n Times are graphically described in this .. Tags: 4000b datasheet abstract.. |
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First line: 0.4" Blue Numeric Displays LTS-4X01B LTD-4000B LTC-4000B inch (10.0mm) digit height Continuous uniform segments. power requirement. Excellent characters appearance. Solid state reliability. Wide viewing angle. Categorized luminous intensity. I.C. compatiable. Easy mounting P.C. board socket. Abstract: .. 2-30. PRELIMINARY. 0.4" Blue LED Numeric Displays LTS-4X01B LTS-4X01B LTD-4000B Series LTC-4000B. Features 0.4 inch 10.0mm digit height Continuous uniform segments. Low power requirement. Excellent .. Tags: seven segment common cathode display LTS-4301B LTS 400* led 7 segment anode dual common cathode dual 7 segment common anode display dual 7 Segment (common anode) common cathode seven segment LED display common cathode display common cathode 7 segment 7 segment common anode LTS-4X01B LTD-4000B LTC-4000B |
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First line: MACRONIX INTERNATIONAL Co., Abstract: .. MX26C1000B MX26C1000B /2000B 2000B /4000B. The MX26C1000B MX26C1000B , MX26C2000B MX26C2000B and MX26C4000B, 1Mb, 2Mb and 4Mb MTP ROM Multiple Time Programmable Read Only Memory , are posited between Flash and EPROM technologies .. Tags: 4000B 2N440 datasheet abstract.. |
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First line: 4512c ispMACH 4000B/C Family 2.5V/1.8V In-System Programmable SuperFAST High Density PLDs December 2001 Data Sheet Abstract: .. 4000B/C Family. 2.5V/1.8V In-System Programmable SuperFAST. High Density PLDs. December 2001 Data Sheet. TM. TM. Features. ■. High Performance. • f. MAX. = 350MHz 350MHz maximum operating frequency • t. PD. = 2.5ns .. Tags: am 4512C LC45* m6 pt80 thermal fuse M10 LC4256B-5T176C JX4 48 JX4 148 CMOS 4032 4512c* 4256b* 4256* 4128B* datasheet abstract.. |
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First line: 4081B quad 2-1nput gate DESCRIPTION 4081 positive logic Quad 2-lnput Gate. outputs fully buffered highest noise immunity pattern insensitivity output impedance. LOGIC CONNECTION DIAGRAM VIEW) Flatpak version same pinouts (Connection Diagram) Dual In-line Package. Abstract: .. Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described in this .. Tags: CMOS 4081 datasheet abstract.. |
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First line: 4072B DUAL 4-1N GATE DESCRIPTION This CMOS logic element provides positive Dual 4-lnput function. outputs fully buffered highest noise immunity pattern insensitivity output impedence. LOGIC CONNECTION DIAGRAM (TOP VIEW) Abstract: .. ns INt-l I co: 1 Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described .. Tags: datasheet abstract.. |
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First line: 45118* COS/MOS INTEGRATED CIRCUITS (continued) HCC/HCF 4000B/4500B series (continued) Abstract: .. COS/MOS INTEGRATED CIRCUITS continued HCC/HCF 4000B/4500B 4500B series continued on z oc < 3 X c_> o i—1 ; z LLJ UJ Z oc z " oc < =3 X . O O , a uj E CD < O < Counters Synchronous 4518B 4518B 4520B 4520B Dual BCD up counter .. Tags: 45118* 40938 datasheet abstract.. |
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First line: CORPORATION AURORA, 60505 PHONE (630) 851-4722 (630) 851-5040 OSCILLATOR SPECIFICATIONS RTC623 Frequency Range 32.768 Frequency Calibration Frequency Stability (Inclusive operating temperature range, input voltage change, load change, shock vibration) Temperature Range +85"C Abstract: .. and vibration Temperature Range —40"C to +85"C Waveform 4000B series CMOS Squarewave Load 15pF 15pF Voltage Voh Vdd —0.5V Minimum  xx Vol Vss +0.05V Maximum UUXpUt Current loh —600uA 600uA Typical .. Tags: datasheet abstract.. |
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First line: CORPORATION AURORA, 60505 PHONE (630) 851-4722 (630) 851-5040 OSCILLATOR SPECIFICATIONS RTC523 Frequency Range 32.768 Frequency Calibration Frequency Stability (Inclusive operating temperature range, input voltage change, load change, shock vibration) Temperature Range O'C 70"C Abstract: .. and vibration Temperature Range O'C to 70"C Waveform 4000B series CMOS Squarewave Load 15pF 15pF Voltage Voh Vdd —0.5V Minimum  xx Vol Vss +0.05V Maximum UUXpUt Current loh —600uA 600uA Typical lol .. Tags: datasheet abstract.. |
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First line: 4086B 4-WIDE 2-1NPUT AND-OR-INVERT GATE DESCRIPTION 4086B 4-Wide 2-lnput AND-OR-lnvert (AOI) Gate with additional inputs which used either expander inputs inhibit inputs connecting them standard CMOS output. HIGH forces Output independent other eight inputs Output fully buffered highest noise immuni Abstract: .. 35 ns wu 1 eo: 1 Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described .. Tags: connection diagram of lg 17" pin diagram datasheet abstract.. |
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First line: 4731B/4731BX QUAD 64-BIT STATIC SHIFT REGISTER DESCRIPTION 4731 B/4731 BX_is Quad 64-Bit Shift Register each with separate Serial Data Inputs (D^-Dq), Clock Inputs (CP^-CPd) Data Outputs (Q63A"Q63D^ from 64th register position. Information present Serial Data Inputs shifted into first register Abstract: .. Additional DC Characteristics are listed in this section uncO' 4000B Series CMOS Family Characteristics 2. Propagation Delays and Output Transition Times are graphically described in this .. Tags: 4731B 4 bit datasheet abstract.. |
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First line: 4019B QUAD 2-IN MULTIPLEXER DESCRIPTION 4019B provides four multiplexing circuits with common selection inputs; each circuit contains inputs output. used select four bits information from sources. inputs selected when HIGH, inputs when HIGH. When HIGH, output (Zn) logical inputs Bn). When LOW, outpu Abstract: .. Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics 2. Propagation Delays and Output Transition Times are graphically described In this .. Tags: 4019B* datasheet abstract.. |
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First line: 4531B 13-INPUT PARITY CHECKER GENERATOR DESCRIPTION 4531 13-lnput Parity Checker/Generator with Parity Inputs Parity Output (Z). When number Parity Inputs that HIGH even, Output LOW. When number Parity Inputs that HIGH odd, Output HIGH. words bits less, Output used generate either even parity approp Abstract: .. Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described in this .. Tags: datasheet abstract.. |
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First line: 4068B 8-INPUT NANDGATE DESCRIPTION This CMOS logic element provides positive 8-lnput NAND functimftiiTto outputs fully buffered highest noise immunity pattern insensitivity output impedance. CONNECTION DIAGRAM 4068B LOGIC SYMBOL Pins 4068B NAMES Abstract: .. Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics. 2 Propagation Delays and Output Transition Times are graphically described in this .. Tags: datasheet abstract.. |
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First line: 4085B DUAL 2-WIDE 2-INPUT AND-OR-INVERT GATE DESCRIPTION 4085B Dual 2-Wide 2-lnput AND-OR-lnvert (AQT) Gate; each wish additional input l4B) which used either Expander Input Inhibit Input connecting 3i>y standard CMOS output. HIGH this Input (I4) forces Output independent other four inputs Output Abstract: .. Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described in this .. Tags: 4085B datasheet abstract.. |
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First line: 4077B QUAD EXCLUSIVE-NOR GATE DESCRIPTION 4077B CMOS logic element provides Exclusive-NQR function, Tt\e ouffJets fully buffered best performance. 4077B used interchangeably 4811. LOGIC CONNECTION DIAGRAM (TOP VIEW) Flatpak version same pinouts {Connection Diagram) Dual In-line Package. CHARACTERIST Abstract: .. Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described in this .. Tags: datasheet abstract.. |
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First line: 4070B/74C86/54C86 QUAD EXCLUSIVE-OR GATE DESCRIPTION 4070B CMOS logic element provides Exclusive-OR function. outputs fully buffered best perfor 4070B direct replacement 74C86/54C86. UatU .HP1 LOGIC CONNECTION DIAGRAM (TOP VIEW) Abstract: .. Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described in this .. Tags: 4070B datasheet abstract.. |
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First line: 4007UB DUAL COMPLEMENTARY PAIR PLUS INVERTER description 4007UB Dual Complementary Pair Inverter with access each device. three n-channel three p-channel enhancement mode transistors. proper operation VDD- INPUT DIODE PROTECTION INPUTS DRAINS SOURCES P-CHANNEL TRANSISTORS AVAILABLE NAMES SP2. Dpi, D Abstract: .. Additional DC Characteristics are I isted in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times ere graphically described in this .. Tags: datasheet abstract.. |
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First line: 4069UB/74C04/54C04 INVERTER DESCRIPTION 4069UB general purpose Inverter which standard Fairchild input output characteristics. single-stage design been used since output impedance single-input gate pattern sensitive. 4096UB Direct Replacement 74C04/54C04. LOGIC CONNECTION DIAGRAM (TOP VIEW) L^O-I L[ Abstract: .. Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described in this .. Tags: 74C04 4069UB 4096ub datasheet abstract.. |
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First line: PUMA68 (COTS) Pinout SRAM Summary features PUMA (Pinned Uncommitted Memory Array) product range well defined upgrade path Definition Abstract: .. Pin 4000 4000A 4000A 4000B 16000 16000A 16000A 16000B 16000B 32000 32000A 32000A . 1 GND GND GND GND GND GND GND GND. 2 /CS3 /CS3 /CS3 /CS3 /CS3 /CS3 /CS3 /CS3. 3 A5 A5 A5 A5 A5 A5 A5 A5. 4 A4 A4 A4 A4 A4 A4 A4 A4. 5 A3 A3 A3 A3 A3 A3 A3 A3. 6 A2 A2 A2 .. Tags: PUMA68 |
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First line: HCF Family S-THOdSON 7=^537 7^-2/ cosmos INTEGRATED ^h^BBSM CIRCUITS HCC/HCF 4000 HCC/HCF 4025 7929225 SEMICONDUCTOR CORP GATES: DUAL INPUT PLUS INVERTER HCC/HCF 4000B QUAD INPUT HCC/HCF 4001B Abstract: .. ; 7929225 S G S SEMICONDUCTOR CORP NOR GATES: DUAL 3 INPUT PLUS INVERTER HCC/HCF 4000B QUAD 2 INPUT HCC/HCF 4001B 4001B DUAL 4 INPUT HCC/HCF 4002B 4002B TRIPLE 3 INPUT HCC/HCF 4025B 4025B • PROPAGATION DELAY TIME = 60 .. Tags: HCF Family datasheet abstract.. |
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First line: COS/MOS 4001 GATES: DUAL INPUT PLUS INVERTER HCC/HCF 4000B QUAD INPUT HCC/HCF 4001B DUAL INPUT HCC/HCF 4002B TRIPLE INPUT HCC/HCF 4025B PROPAGATION DELAY TIME (TYP.) VDD= BUFFERED INPUTS OUTPUTS STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS Abstract: .. ooû > < odi r> 4001 e> NOR GATES: DUAL 3 INPUT PLUS INVERTER HCC/HCF 4000B QUAD 2 INPUT HCC/HCF 4001B 4001B DUAL 4 INPUT HCC/HCF 4002B 4002B TRIPLE 3 INPUT HCC/HCF 4025B 4025B • PROPAGATION DELAY TIME = 60 ns TYP. AT .. Tags: datasheet abstract.. |
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First line: 4006B 18-STAGE STATIC SHIFT REGISTER DESCRIPTION 4006B 18-stage Shift Register arranged 4-stage 5-stage shift regsiters with common Clock Input (CP). 4-stage shift registers, each have Data Input (Da, Data Output (Q3a, Q3b'; 5-stage shift registers each have Data Input (Dc, Drf) Data Outputs from fo Abstract: .. Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described in this .. Tags: cmos 4006 datasheet abstract.. |
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First line: 74HC/HCT/HCU/HCMOS Logic Family Specifications 74HC/HCT/HCU/HCMOS Logic Package Information IC06 74HC/HCT/HCU/HCMOS Logic Package Information IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications IC06 74HC/HCT/HCU/HCMOS Logic Package Information IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines Abstract: .. Si-gate CMOS device and is pin compatible with the “4049” of the “4000B” series. It is specified in compliance with JEDEC standard no. 7A. The 74HC4049 74HC4049 provides six inverting buffers with a modified .. Tags: IC06 74HC/HCT/HCU/HCMOS Logic Package Information 74HC/HCT/HCU/HCMOS Logic Package Information 74HC/HCT/HCU/HCMOS Logic Family Specifications IC06 datasheet hct 4049 datasheet CMOS 4000B series device 74HC/HCT 150 4049 hex "Level Shifter" datasheet abstract.. |
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First line: hct 4050 datasheet 74HC4050* 74HC4050* 74HC/HCT/HCU/HCMOS Logic Package Information IC06 74HC/HCT/HCU/HCMOS Logic Package Information IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications IC06 74HC/HCT/HCU/HCMOS Logic Package Information IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines Abstract: .. Si-gate CMOS device and is pin compatible with the “4050” of the “4000B” series. It is specified in compliance with JEDEC standard no. 7A. The 74HC4050 74HC4050 provides six non-inverting buffers with .. Tags: IC06 74HC/HCT/HCU/HCMOS Logic Package Information 74HC/HCT/HCU/HCMOS Logic Package Information 74HC4050*Â hct 4050 datasheet CMOS 4000B series device 74HC4050* 74HC/HCT 150 datasheet abstract.. |
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First line: 4024B 7-STAGE BINARY COUNTER DESCRIPTION 4024B 7-Stage Binary Ripple Counter with Clock Input (CP), overriding asynchronous Master Reset Input (MR) seven fully BufferedParallel Outputs (Qo-Qfi)-The counter advances HIGH-to-LOW transition Clock Input (CP). HIGH Master Reset Input (MR) clears counter Abstract: .. Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described in this .. Tags: datasheet abstract.. |
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First line: 40175B/74C175/54C175 QUAD FLIP-FLOP DESCRIPTION Quad Edge-Triggered Flip-Flop with four Data Inputs (D0-D3), Clock Input (CP) overriding asynchronous Master Reset {MR), four Buffered Outputs (Q0-Q3) four Complementary Buffered Outputs (Q0-Q3). Information Data Inputs (D0-D3) transferred Outputs (Q0- Abstract: .. Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described in this .. Tags: fairchild CMOS 4000B series datasheet abstract.. |
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First line: 40174B/74C174/54C174 FLIP-FLOP DESCRIPTION Edge-Triggered Flip-Flop with Data Inputs (Do-D5),a Clock Input overriding asynchronous Master Reset Buffered Outputs (QQ-Q5). Information Data Inputs (DQ-D5) transferred Buffered Outputs (QQ-Qg) LOW-to-HIGH transition Clock Input Master Reset Input HIGH. W Abstract: .. Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described in this .. Tags: datasheet abstract.. |
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First line: 4582B CARRY LOOKAHEAD GENERATOR DESCRIPTION 4582B Carry Lookahead Generator which provides high speed lookahead over word lengths more than four bits. device Carry Input (Cn). four active Carry Generate Inputs (G0-G3), four active Carry Propagate lnputs (P0-P3). three Carry Outputs (cn+x,cn+y.cn+z), Abstract: .. Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described in this .. Tags: datasheet abstract.. |
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First line: 4000B Dual Input Gate Plus Inverter NOR/INV i'aS Abstract: .. - 18 - 4000B Dual 3 Input NOR Gate Plus Inverter ■CBË y-Y WS NOR/INV A* 3/1 3 i'aS "ß h iL. NCI NC 2 S < "SS w w 5<l2,—C>0—L_i—N 3 M — >0— >—T>o—6UO 4U3V. 5- 3- 3-* ^ uEj u^ INVERTER .. Tags: datasheet abstract.. |
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First line: 4035B 4-BIT UNIVERSAL SHIFT REGISTER DESCRIPTION 4035B fully synchronous edge-triggered 4-Bit Shift Register with Clock Input (CP), four synchronous Parallel Data Inputs (P0-P3), synchronous Serial Data Inputs synchronous Parallel Enable Jnput (PE), Buffered Parallel Outputs from 4-bit positions (Q0 Abstract: .. Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described in this .. Tags: 4035B* datasheet abstract.. |
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First line: 4025B TRIPLE 3-1NPUT GATE DESCRIPTION This CMOS logic element provides 3-input positive function. outputs fully buffered highest noise immunity pattern insensitivity output impedance. LOGIC CONNECTION DIAGRAM (TOP VIEW) "nPi Flatpak version same pinouts (Connection Diagram) Dual In-line Package Abstract: .. Additional DC Characteristics are listed In this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described in this .. Tags: datasheet abstract.. |
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First line: 4539B DUAL 4-INPUT MULTIPLEXER DESCRIPTION 4539B Dual 4-lnput Digital Multiplexer with common select logic. Each multiplexer four Multiplexer Inputs (I0-I3). active Enable Input Multiplexer Output (Z). When HIGH, Enable Input forces Multiplexer Output respective multiplexer LOW, independent Select ( Abstract: .. Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described in this .. Tags: 4539B CMOS Multiplexer datasheet abstract.. |
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First line: 4519B QUAD 2-INPUT MULTIPLEXER DESCRIPTION 4519B provides four multiplexing circuits with common selection inputs; each circuit contains inputs output. be"used select four bits information from sources. inputs selected when HIGH, inputs when HIGH. When HIGH, output (Za) logical Exclusive-NOR in Abstract: .. Additional DC Characteristics are listed in this section under 4000B Series CMOS Family Characteristics. 2. Propagation Delays and Output Transition Times are graphically described in this .. Tags: 4519B datasheet abstract.. |
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