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LTC1414CGN#PBF Linear Technology LTC1414 - 14-Bit, 2.2 Msps,Sampling A/D Converter; Package: SSOP; Pins: 28; Temperature Range: 0°C to 70°C visit Linear Technology - Now Part of Analog Devices Buy
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LTC1414IGN#PBF Linear Technology LTC1414 - 14-Bit, 2.2 Msps,Sampling A/D Converter; Package: SSOP; Pins: 28; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy
LTC1414CGN#TRPBF Linear Technology LTC1414 - 14-Bit, 2.2 Msps,Sampling A/D Converter; Package: SSOP; Pins: 28; Temperature Range: 0°C to 70°C visit Linear Technology - Now Part of Analog Devices Buy
LTC1414IGN Linear Technology LTC1414 - 14-Bit, 2.2 Msps,Sampling A/D Converter; Package: SSOP; Pins: 28; Temperature Range: -40°C to 85°C visit Linear Technology - Now Part of Analog Devices Buy
LTC1414CGN#TR Linear Technology LTC1414 - 14-Bit, 2.2 Msps,Sampling A/D Converter; Package: SSOP; Pins: 28; Temperature Range: 0°C to 70°C visit Linear Technology - Now Part of Analog Devices Buy

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400-MSPS

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: rates of up to 400MSPS. On-chip edge-triggered input latches provide for minimum setup and hold times , (each tone at -16dBfs) (1) (2) (3) (4) Noise averaged up to 400MHz when operating at 400MSPS. See , DAC5675A www.ti.com SBAS334C ­ NOVEMBER 2004 ­ REVISED MARCH 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES · · · 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range (SFDR) to Nyquist: ­ 69dBc at 70MHz IF, 400MSPS W-CDMA Adjacent Channel Power Ratio (ACPR Texas Instruments
Original
88MSPS 76MSPS CDMA2000 IS-95 IS-136

IF-61

Abstract: 15MHZ 5675 14-BIT, 400MSPS DIGITAL-TO-ANOALOG CONVERTER Functional Block Diagram FEATURES , . 400-MSPS Update Rate LVDS-Compatable Input Interface Differential Scalable Current Outputs: 2mA to , ©2004 Maxwell Technologies All rights reserved. 5675 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter , ABSOLUTE MAXIMUM RATINGS 1 5675 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter TABLE 2. 5675 ABSOLUTE , -BIT, 400MSPS DIGITAL-TO-ANALOG Converter TABLE 5. 5675 DC ELECTRICAL CHARACTERISTICS (DVDD = 3.3±10%, AVDD =
Maxwell Technologies
Original
IF-61 15MHZ orbit 6144 400MH
Abstract: rates of up to 400MSPS. On-chip edge-triggered input latches provide for minimum setup and hold times , (each tone at -16dBfs) (1) (2) (3) (4) Noise averaged up to 400MHz when operating at 400MSPS. See , DAC5675A www.ti.com SBAS334C ­ NOVEMBER 2004 ­ REVISED MARCH 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES · · · 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range (SFDR) to Nyquist: ­ 69dBc at 70MHz IF, 400MSPS W-CDMA Adjacent Channel Power Ratio (ACPR Texas Instruments
Original
Abstract: rates of up to 400MSPS. On-chip edge-triggered input latches provide for minimum setup and hold times , DAC5675A www.ti.com SBAS334A ­ NOVEMBER 2004 ­ REVISED FEBRUARY 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES · · · 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range (SFDR) to Nyquist: ­ 69dBc at 70MHz IF, 400MSPS W-CDMA Adjacent Channel Power Ratio (ACPR , fCLK = 400MSPS, fOUT = 20MHz Package: 48-Pin HTQFP PowerPadTM, TJA = 28.8°C/W APPLICATIONS · Texas Instruments
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ad12400

Abstract: PRELIMINARY TECHNICAL DATA a PERFORMANCE FEATURES 400MSPS Sample Rate SNR of 63dBFS @128MHz , Data 12-Bit 400MSPS A/D Converter AD12400 FUNCTIONAL BLOCK DIAGRAM APPLICATIONS Wireless and , . The product operates at 400MSPS conversion rate with outstanding dynamic performance in wideband , " module. Performance is rated over 0° to 70°C. 1. Guaranteed sample rate of 400MSPS 2. Input signal , Specifications (3.8VA = 3.8V, 3.3VD = 3.3V, 1.5VD = 1.5V, Encode = 400MSPS, Tcase = 25°C, unless otherwise noted
Analog Devices
Original
128MH 188MH QTE-060-01-L-A-K-TR AD12400BWS QSE-060-01-L-A-KTR
Abstract: rates of up to 400MSPS. On-chip edge-triggered input latches provide for minimum setup and hold times , (each tone at -16dBfs) (1) (2) (3) (4) Noise averaged up to 400MHz when operating at 400MSPS. See , DAC5675A www.ti.com SBAS334C ­ NOVEMBER 2004 ­ REVISED MARCH 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES · · · 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range (SFDR) to Nyquist: ­ 69dBc at 70MHz IF, 400MSPS W-CDMA Adjacent Channel Power Ratio (ACPR Texas Instruments
Original
Abstract: rates of up to 400MSPS. On-chip edge-triggered input latches provide for minimum setup and hold times , (each tone at -16dBfs) (1) (2) (3) (4) Noise averaged up to 400MHz when operating at 400MSPS. See , DAC5675A www.ti.com SBAS334C ­ NOVEMBER 2004 ­ REVISED MARCH 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES · · · 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range (SFDR) to Nyquist: ­ 69dBc at 70MHz IF, 400MSPS W-CDMA Adjacent Channel Power Ratio (ACPR Texas Instruments
Original

DAC5675A-SP

Abstract: DAC5675A architecture supports update rates of up to 400MSPS. On-chip edge-triggered input latches provide for minimum , averaged up to 400MHz when operating at 400MSPS. See Figure 9. See Figure 10. See Figure 12 5 , DAC5675A www.ti.com SBAS334C ­ NOVEMBER 2004 ­ REVISED MARCH 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES · · · · · · · · · 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range (SFDR) to Nyquist: ­ 69dBc at 70MHz IF, 400MSPS W-CDMA
Texas Instruments
Original
DAC5675A-SP DAC5675AIPHP

400MSPS

Abstract: DAC5675A architecture supports update rates of up to 400MSPS. On-chip edge-triggered input latches provide for minimum , averaged up to 400MHz when operating at 400MSPS. See Figure 9. See Figure 10. See Figure 12 5 , DAC5675A www.ti.com SBAS334C ­ NOVEMBER 2004 ­ REVISED MARCH 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES · · · · · · · · · 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range (SFDR) to Nyquist: ­ 69dBc at 70MHz IF, 400MSPS W-CDMA
Texas Instruments
Original
Abstract: All information in this data sheet is preliminary and subject s and to change. 10/96 ADVANCE INFORMATION JVKJIXAJVK _ Features 400Msps Nominal Conversion Rate RS , Ultra-High-Speed (400Msps), 8-Biî DAC _ General Description The MAX5140 is a monolithic, 8-bit digital-to-analog converter (DAC) capable of accepting video data at a 400Msps rate. Complete with video , phone 1-800-998-8800 Ultra-High-Speed (400Msps), 8-Bit DAC MAX5140 Pin Configuration TOP VIEW 03 -
OCR Scan
RS-343-A MAX51 MAX5140IPG
Abstract: rates of up to 400MSPS. On-chip edge-triggered input latches provide for minimum setup and hold times , (each tone at -16dBfs) (1) (2) (3) (4) Noise averaged up to 400MHz when operating at 400MSPS. See , DAC5675A www.ti.com SBAS334C ­ NOVEMBER 2004 ­ REVISED MARCH 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES · · · 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range (SFDR) to Nyquist: ­ 69dBc at 70MHz IF, 400MSPS W-CDMA Adjacent Channel Power Ratio (ACPR Texas Instruments
Original
Abstract: . The DAC5675A current-sink-array architecture supports update rates of up to 400MSPS. On-chip , fCLK = 245.76MSPS, IF = Noise averaged up to 400MHz when operating at 400MSPS. See Figure 9. See , DAC5675A www.ti.com SBAS334C â'" NOVEMBER 2004 â'" REVISED MARCH 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range (SFDR) to Nyquist: â'" 69dBc at 70MHz IF, 400MSPS Texas Instruments
Original
ISO/TS16949

composite to rgb converter ic

Abstract: composite video converter ADVANCEthis data sheet is preliminary INFORMATION All information in and subject to change. 10/96 Ultra-High-Speed (400Msps), 8-Bit DAC _Features The MAX5140 is a monolithic, 8-bit digital-to-analog converter (DAC) capable of accepting video data at a 400Msps rate , is 7.5 IRE. o 400Msps Nominal Conversion Rate o RS-343-A Compatible o Complete Video Controls , _General Description MAX5140 Ultra-High-Speed (400Msps), 8-Bit DAC _Pin
Maxim Integrated Products
Original
composite to rgb converter ic composite video converter RS-343 monochrome diagram bandgap reference blank IC data sheet
Abstract: 19-2007; Rev 0; 5/01 Dual, 6-Bit, 400Msps ADC with On-Chip, Wideband Input Amplifier General , I and Q components to digital outputs at 400Msps while achieving a signal-to-noise ratio (SNR) of , 6-Bit, 400Msps ADCs Excellent Dynamic Performance 36.7dB SINAD at fIN 125MHz and fCLK 400MHz , 400Msps LVDS Digital Outputs in Two's Complement Format Features MAX107 Ordering Information , -Bit, 400Msps ADC with On-Chip, Wideband Input Amplifier MAX107 ABSOLUTE MAXIMUM RATINGS AVCC, AVCCI, AVCCQ Maxim Integrated Products
Original
125MH A5I77 P5I75 A4I73 P4I63 A2I61

C288C

Abstract: rates of up to 400MSPS. On-chip edge-triggered input latches provide for minimum setup and hold times , (each tone at -16dBfs) (1) (2) (3) (4) Noise averaged up to 400MHz when operating at 400MSPS. See , DAC5675A www.ti.com SBAS334C ­ NOVEMBER 2004 ­ REVISED MARCH 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES · · · 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range (SFDR) to Nyquist: ­ 69dBc at 70MHz IF, 400MSPS W-CDMA Adjacent Channel Power Ratio (ACPR
Texas Instruments
Original
C288C

DAC5675A

Abstract: rates of up to 400MSPS. On-chip edge-triggered input latches provide for minimum setup and hold times , ) (1) (2) (3) (4) Noise averaged up to 400MHz when operating at 400MSPS. See Figure 9. See Figure 10 , DAC5675A www.ti.com SBAS334B ­ NOVEMBER 2004 ­ REVISED MARCH 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES · · · 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range (SFDR) to Nyquist: ­ 69dBc at 70MHz IF, 400MSPS W-CDMA Adjacent Channel Power Ratio (ACPR
Texas Instruments
Original
Abstract: rates of up to 400MSPS. On-chip edge-triggered input latches provide for minimum setup and hold times , ) (1) (2) (3) (4) Noise averaged up to 400MHz when operating at 400MSPS. See Figure 9. See Figure 10 , DAC5675A www.ti.com SBAS334C ­ NOVEMBER 2004 ­ REVISED MARCH 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES · · · 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range (SFDR) to Nyquist: ­ 69dBc at 70MHz IF, 400MSPS W-CDMA Adjacent Channel Power Ratio (ACPR Texas Instruments
Original
Abstract: rates of up to 400MSPS. On-chip edge-triggered input latches provide for minimum setup and hold times , (each tone at -16dBfs) (1) (2) (3) (4) Noise averaged up to 400MHz when operating at 400MSPS. See , DAC5675A www.ti.com SBAS334C ­ NOVEMBER 2004 ­ REVISED MARCH 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES · · · 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range (SFDR) to Nyquist: ­ 69dBc at 70MHz IF, 400MSPS W-CDMA Adjacent Channel Power Ratio (ACPR Texas Instruments
Original

DAC5675A

Abstract: DAC5675AIPHP architecture supports update rates of up to 400MSPS. On-chip edge-triggered input latches provide for minimum , DAC5675A www.ti.com SBAS334A ­ NOVEMBER 2004 ­ REVISED FEBRUARY 2005 14-Bit, 400MSPS Digital-to-Analog Converter FEATURES · · · · · · · · · 400MSPS Update Rate LVDS-Compatible Input Interface Spurious-Free Dynamic Range (SFDR) to Nyquist: ­ 69dBc at 70MHz IF, 400MSPS W-CDMA , Operation Power Dissipation: 660mW at fCLK = 400MSPS, fOUT = 20MHz Package: 48-Pin HTQFP PowerPadTM
Texas Instruments
Original
Abstract: 19-2007; Rev 0; 5/01 Dual, 6-Bit, 400Msps ADC with On-Chip, Wideband Input Amplifier In , 6-Bit, 400Msps ADCs o Excellent Dynamic Performance 36.7dB SINAD at fIN ≠125MHz and fCLK â , : 1016 Metastable States at 400Msps o LVDS Digital Outputs in Twoâ'™s Complement Format Ordering , the analog signals of both I and Q components to digital outputs at 400Msps while achieving a , metastable performance of only one error per 1016 clock cycles. MAX107 Dual, 6-Bit, 400Msps ADC with Maxim Integrated Products
Original
MAX105 25LSB 200MH MAX107ECS
Abstract: ADS5474 www.ti.com . SLAS525A ­ JULY 2007 ­ REVISED AUGUST 2008 14-Bit, 400-MSPS Analog-to-Digital Converter 1 · · · · · · · · · · · 23 FEATURES 400-MSPS Sample Rate 14-Bit Resolution, 11.2-Bits ENOB 1.4 , Instrumentation Radar · DESCRIPTION The ADS5474 is a 14-bit, 400-MSPS analog-to-digital converter (ADC , . www.ti.com APPLICATIONS INFORMATION Theory of Operation The ADS5474 is a 14-bit, 400-MSPS, monolithic Texas Instruments
Original
TQFP-80 ADS5463 ADS5440/ADS5444
Abstract: DAC5675 SLAS352C - DECEMBER 2001 - REVISED AUGUST 2004 14BIT, 400MSPS DIGITAL-TO-ANALOG CONVERTER FEATURES D 400-MSPS Update Rate D LVDS-Compatible Input Interface D Spurious Free Dynamic Range (SFDR) to D Nyquist - 69 dBc at 70-MHz IF, 400 MSPS W-CDMA Adjacent Channel Power Ratio ACPR - 73 dBc at 30.72-MHz IF, 122.88 MSPS - 71 dBc at 61.44-MHz IF, 245.76 MSPS Differential Scalable Current Outputs: 2 mA to 20 mA On-Chip 1.2-V Reference Single 3.3-V Supply Operation Power Dissipation: 820 at Texas Instruments
Original
70-MH 72-MH 44-MH
Abstract: DAC5675 SLAS352C - DECEMBER 2001 - REVISED AUGUST 2004 14BIT, 400MSPS DIGITAL-TO-ANALOG CONVERTER FEATURES D 400-MSPS Update Rate D LVDS-Compatible Input Interface D Spurious Free Dynamic Range (SFDR) to D Nyquist - 69 dBc at 70-MHz IF, 400 MSPS W-CDMA Adjacent Channel Power Ratio ACPR - 73 dBc at 30.72-MHz IF, 122.88 MSPS - 71 dBc at 61.44-MHz IF, 245.76 MSPS Differential Scalable Current Outputs: 2 mA to 20 mA On-Chip 1.2-V Reference Single 3.3-V Supply Operation Power Dissipation: 820 at Texas Instruments
Original
Abstract: DAC5675 SLAS352C - DECEMBER 2001 - REVISED AUGUST 2004 14BIT, 400MSPS DIGITAL-TO-ANALOG CONVERTER FEATURES D 400-MSPS Update Rate D LVDS-Compatible Input Interface D Spurious Free Dynamic Range (SFDR) to D Nyquist - 69 dBc at 70-MHz IF, 400 MSPS W-CDMA Adjacent Channel Power Ratio ACPR - 73 dBc at 30.72-MHz IF, 122.88 MSPS - 71 dBc at 61.44-MHz IF, 245.76 MSPS Differential Scalable Current Outputs: 2 mA to 20 mA On-Chip 1.2-V Reference Single 3.3-V Supply Operation Power Dissipation: 820 at Texas Instruments
Original

D11A

Abstract: D12A DAC5675 SLAS352B ­ DECEMBER 2001 ­ REVISED JUNE 2002 14-BIT, 400-MSPS DIGITAL-TO-ANALOG CONVERTER FEATURES D 400-MSPS Update Rate D LVDS-Compatible Input Interface D Spurious Free Dynamic Range (SFDR) to D D D D D D Nyquist ­ 69 dBc at 70-MHz IF, 400 MSPS W-CDMA Adjacent Channel Power Ratio ACPR ­ 73 dBc at 30.72-MHz IF, 122.88 MSPS ­ 71 dBc at 61.44-MHz IF, 245.76 MSPS Differential Scalable Current Outputs: 2 mA to 20 mA On-Chip 1.2-V Reference Single 3.3-V Supply Operation
Texas Instruments
Original
D11A D12A D12B
Abstract: ADS5474 SLAS525B â'" JULY 2007 â'" REVISED FEBRUARY 2012 www.ti.com 14-Bit, 400-MSPS Analog-to-Digital Converter Check for Samples: ADS5474 FEATURES 1 â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ â'¢ 23 â'¢ â'¢ 400-MSPS Sample Rate 14-Bit Resolution, 11.2-Bits ENOB 1.4 , -bit, 400-MSPS analog-to-digital converter (ADC) that operates from both a 5-V supply and 3.3-V supply , a 14-bit, 400-MSPS, monolithic pipeline ADC. Its bipolar analog core operates from 5-V and 3.3 Texas Instruments
Original

SLWA034

Abstract: ADS5474 www.ti.com SLAS525 ­ JULY 2007 14-Bit, 400-MSPS Analog-to-Digital Converter FEATURES · · · · · · · · · · · 400-MSPS Sample Rate 14-Bit Resolution, 11.2-Bits ENOB 1.4-GHz Input Bandwidth SFDR = 80 dBc at 230 MHz and 400 MSPS SNR = 69.8 dBFS at 230 MHz and 400 MSPS 2.2 VPP Differential , DESCRIPTION The ADS5474 is a 14-bit, 400-MSPS analog-to-digital converter (ADC) that operates from both a 5 , APPLICATIONS INFORMATION Theory of Operation The ADS5474 is a 14-bit, 400-MSPS, monolithic pipeline ADC. Its
Texas Instruments
Original
SLWA034

TAD100

Abstract: MAX105 19-2007; Rev 0; 5/01 Dual, 6-Bit, 400Msps ADC with On-Chip, Wideband Input Amplifier Features o Two Matched 6-Bit, 400Msps ADCs o Excellent Dynamic Performance 36.7dB SINAD at fIN 125MHz and , : 1016 Metastable States at 400Msps o LVDS Digital Outputs in Two's Complement Format Ordering , the analog signals of both I and Q components to digital outputs at 400Msps while achieving a , refer to the MAX105 data sheet. MAX107 Dual, 6-Bit, 400Msps ADC with On-Chip, Wideband Input
Maxim Integrated Products
Original
TAD100 MAX2108

8226 rfid

Abstract: ADS5463 ADS5474 www.ti.com. SLAS525A ­ JULY 2007 ­ REVISED AUGUST 2008 14-Bit, 400-MSPS Analog-to-Digital Converter FEATURES 1 · · · · · · · · · · · 23 · · 400-MSPS Sample Rate 14-Bit Resolution, 11.2 , Amplifier Linearization Communication Instrumentation Radar DESCRIPTION The ADS5474 is a 14-bit, 400-MSPS , . www.ti.com APPLICATIONS INFORMATION Theory of Operation The ADS5474 is a 14-bit, 400-MSPS, monolithic
Texas Instruments
Original
8226 rfid ADS5474IPFP ADS5474IPFPR diagram radar circuit
Abstract: ADS5474 www.ti.com SLAS525 ­ JULY 2007 14-Bit, 400-MSPS Analog-to-Digital Converter FEATURES · · · · · · · · · · · 400-MSPS Sample Rate 14-Bit Resolution, 11.2-Bits ENOB 1.4-GHz Input Bandwidth SFDR = 80 dBc at 230 MHz and 400 MSPS SNR = 69.8 dBFS at 230 MHz and 400 MSPS 2.2 VPP Differential , DESCRIPTION The ADS5474 is a 14-bit, 400-MSPS analog-to-digital converter (ADC) that operates from both a 5 , APPLICATIONS INFORMATION Theory of Operation The ADS5474 is a 14-bit, 400-MSPS, monolithic pipeline ADC. Its Texas Instruments
Original

PAD1000

Abstract: ADS5474 www.ti.com . SLAS525A ­ JULY 2007 ­ REVISED AUGUST 2008 14-Bit, 400-MSPS Analog-to-Digital Converter 1 · · · · · · · · · · · 23 FEATURES 400-MSPS Sample Rate 14-Bit Resolution, 11.2-Bits ENOB 1.4 , Instrumentation Radar · DESCRIPTION The ADS5474 is a 14-bit, 400-MSPS analog-to-digital converter (ADC , . www.ti.com APPLICATIONS INFORMATION Theory of Operation The ADS5474 is a 14-bit, 400-MSPS, monolithic
Texas Instruments
Original
PAD1000
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