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Part Manufacturer Description Datasheet BUY
SN5438W-10 Texas Instruments TTL/H/L SERIES, QUAD 2-INPUT NAND GATE, CDFP14 visit Texas Instruments
SN7422J Texas Instruments TTL/H/L SERIES, DUAL 4-INPUT NAND GATE, CDIP14 visit Texas Instruments
SN54132W-10 Texas Instruments TTL/H/L SERIES, QUAD 2-INPUT NAND GATE, CDFP14 visit Texas Instruments
SN7401N-00 Texas Instruments TTL/H/L SERIES, QUAD 2-INPUT NAND GATE, PDIP14 visit Texas Instruments
SN7413J-00 Texas Instruments TTL/H/L SERIES, DUAL 4-INPUT NAND GATE, CDIP14 visit Texas Instruments
SN7430J-00 Texas Instruments TTL/H/L SERIES, 8-INPUT NAND GATE, CDIP14 visit Texas Instruments

4-input nand gates ttl

Catalog Datasheet MFG & Type PDF Document Tags

Flip Flops

Abstract: 74 series logic gates /NOR/AND/OR GATES Function HD74Series HD74S Series Quad. 2-input Positive NAND Gates 00 w" 00 ' Quad, 2-input Positive NAND Gates (with Open Collector Output) 01 â'¢ â'" QtMld. 2-input Positive NOR , Triple 3-input Positive NAND Gates 10, 10 - Triple 3-input Positive AND Gates 11 . Triple 3-input Positive NAND Gates {with Open Collector Output) 12- 12 «V- Dual 4-input Schmitt NAND Gates 13 - Hex , High-voltage Output J 17 - Dual 4-input Positive NANI) Gate* 20 ^ 20 Dual 4-input Positive NAND Gates (with
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DP-14 Flip Flops 74 series logic gates H183 HD74 quad jk flip flop HD74/HD74S HD74/74S DP-16 DP-20 DP-24

16-LINE TO 4-LINE PRIORITY ENCODERS

Abstract: 74 series logic gates /AND/OR GATES Function HD74Series HD74S Series Quad. 2-input Positive NAND Gates 00 i_ 00 - Quad. 2-input Positive NAND Gates (with Open Collector Output) 01 - Quad. 2-input Positive NOR Gates 02 , Positive NAND Gates 10 10 - Triple 3-input Positive AND Gates - 11 , Triple 3-input Positive NAND Gates (with Open Collector Output) 12 12 -V- Dual 4-input Schmitt NAND Gates 13 - Hex Schmitt-trigger , High-voltage Output) 17 - Dual 4-input Positive NAND Gates 20 20 - Dual 4-input Positive NAND Gates (with
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16-LINE TO 4-LINE PRIORITY ENCODERS NAND Gates J-K Flip flops Synchronous 8-Bit Binary Counters synchronous binary counter with latch

4-bit bidirectional shift register 74 194

Abstract: 16-LINE TO 4-LINE PRIORITY ENCODERS â'¢ NAND/NOR/AND/OR GATES Function HD74Series HD74S Series Quad. 2-input Positive NAND Gates 00 ^ 00 - Quad. 2-input Positive NAND Gates (with Open Collector Output) 01 â'" Quad. 2-input Positive , ) 09 â'" Triple 3-input Positive NAND Gates 10,- 10 - Triple 3-input Positive AND Gates - 11 Triple 3-input Positive NAND Gates (with Open Collector Output) 12 - 12 -V- Dual 4-input Schmitt NAND , '" Hex Buffers/Drivers (with Open Collector High-voltage Output) 17 - Dual 4-input Positive NAND Gates
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4-bit bidirectional shift register 74 194 4-bit even parity checker 4-bit shift register 74 194 J-K latches 2 input nand gate 24v 74 series 7 segment decoders DG-14 DG-16 DG-16A DG-20 DG-24

dtl logic gates

Abstract: ttl NAND gate circuit Direct-coupled master-slave J-K flip-flop with one J input and one K input MIC 9002 Quad. 2-input NAND gate MIC 9003 Triple 3-input NAND gate MIC 9004 Dual 4-input NAND gate MIC 9005 Dual expandable AND-OR INVERT gate MIC 9006 Dual 4-input expander for use with MIC 9005 and MIC 9008 gates MIC 9007 8-input NAND gate MIC 9008 2-2-2-3 expandable AND-OR-INVERT gate MIC 9009 Dual 4-input NAND power gate MIC 9012 Quad. 2-input NAND gate with open collector output MIC 9016 Hex. inverter MIC 9017 « MIC 9007. 8-input
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9016-5D dtl logic gates ttl NAND gate circuit series inverter circuit diagrams ttl NAND gate with expander 9000 ttl 930 series dtl

schematic of TTL XOR Gates

Abstract: TTL XOR Gates technology Operating voltage: 5V/3V Propagation delay of 2-input NAND with fanout=2 ­ 0.3ns for 5V high , Buffers ­ Inverting, noninverting, tri-state, clock buffer NAND/AND gates NOR/OR gates AOI/OAI gates , NAND/AND gates NOR/OR gates AOI/OAI gates XNOR/XOR gates D Flip-Flops T Flip-Flops Multiplexed , Operating voltage: 5V/3V Propagation delay 120ps of 2-input NAND with fanout=2 Output driving capability , Buffers ­ Inverting, noninverting, tri-state, clock buffer NAND/AND gates NOR/OR gates AOI/OAI gates
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schematic of TTL XOR Gates TTL XOR Gates ttl 2-bit half adder cmos XOR Gates schematic XOR Gates xnor ttl RP01D1

ns 4248

Abstract: THREE INPUT TTL OR GATE Gates 2 to 8 Input NAND Gates Dual 2 Input NAND Gates High Speed 2 Input NAND Gate High Speed 3 Input NAND Gate High Speed 4 Input NAND Gate NOR Gates 2 to 8 Input NOR Gates Dual 2 Input NOR Gates High , ) OR-AND / NAND Gates 2-1 Input 2 Wide OR-NAND Gate 2-1-1 Input 3 Wide OR-NAND Gate 3-1 Input 2 Wide , . t f g » Normal C M O S level input t rc . t j c * Schmitt TTL level input, t r q ' ( ( q Schmitt , 0 70°C Specified Value Kent High level input voltage Low level input voltage TTL level Schmitt
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ns 4248 THREE INPUT TTL OR GATE Toggle flip flop DUAL FLIP FLOP TRISTATE MSM10V0000

3 input or gates TTL

Abstract: cmos XOR Gates Input buffers ­ CMOS, CMOS Schmitt ­ TTL, TTL Schmitt NAND/AND gates NOR/OR gates AOI/OAI gates , low power 32kHz Cell Libraries · · · · Basic gates ­ Inverting x1, x2, x3 ­ NAND 2 , voltage: 5V Propagation delay 0.3ns for 2-input NAND with fanout=2 Output driving capability ­ 2mA , architecture Operating voltage: 5V/3V Propagation delay 120ps of 2-input NAND with fanout=2 Output driving , buffer NAND/AND gates NOR/OR gates AOI/OAI gates XNOR/XOR gates Delay cells ­ 2ns, 4ns, 7ns, 10ns
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3 input or gates TTL XOR GATES Nand gate Crystal Oscillator 4-input nand gates ttl 0.8um cmos HTA3000 HT3A000 HT3A100 HT3A200 HT3A300 HT3A400

msm10t0209

Abstract: MSM10T0106 '" Internal Gate Delay Time tpd 2-input NAND (ND2H) FO=2, L=2 â'" 0.66 â'" TTL Input tpd Input buffer FO , LIBRARY Inverters Invert Gate Dual Inverter Gates NAND Gates 2 to 8 Input NAND Gates Dual 2 Input NAND Gates High Drive 2 Input NAND Gate High Drive 3 Input NAND Gate High Drive 4 Input NAND Gate NOR Gates , OR-AND / NAND Gates 2-1 Input 2 Wide OR-NAND Gate 2-1-1 Input 3 Wide OR-NAND Gate 3- 1 Input 2 Wide , types) Input Protect No Buffer Type I/O Other Gates Internal TTL Schmitt Trigger Internal CMOS Schmitt
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msm10t0209 MSM10T0106 MSM10T0055 MSM10T0416 nor gate using TTL schematic diagram NAND gates MSM10T0000

MSM10T0106

Abstract: MSM10T0055 Input AND and 2 Input NOR into 2 Input NOR Gate NAND Gates 2 to 8 Input NAND Gates Dual 2 Input NAND Gates High Drive 2 Input NAND Gate High Drive 3 Input NAND Gate High Drive 4 Input NAND Gate NOR , ) D-type Flip Flop with Scan Test (4 types) OR-AND / NAND Gates 2-1 Input 2 Wide OR-NAND Gate 2 -1 -1 , Buffers with Pull-up (14 types) Input Protect No Buffer Type I/O Other Gates Internal TTL Schmitt , Normal TTL level input Normal CMOS level input Schmitt TTL level input Schmitt CMOS level input * The
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Standard TTL AOI Dual 2-Wide 2-Input

Abstract: of 7400 Series - TTL Gates Quad 2-Input Pos NAND Gates Quad 2-Input Pos NAND Gate (w/O.C. Output) Quad 2-Input Pos NOR Gates , Pos AND Gates Quad 2-Input Pos AND Gate (W/ O.C. Output) Triple 3'-lnput Pos NAND Gates Dual NAND Schmitt Triggers Hex Schmitt Triggers Quad 2-Input Pos NAND Schmitt Dual 4-Input Positive NAND Gates Expandable Dual 4-Input Pos NOR Gate (w/ Strobe) Dual 4-Input Pos NOR Gates Quad 2-Input HV Interface NAND Gates Triple 3-Input Positive NOR Gates 8-Input Positive NAND Gates Buffers/Drivers Hex Inverter Buffers
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Standard TTL AOI Dual 2-Wide 2-Input of 7400 Series - TTL LN 5406 4 nand dip 16 supply voltage 30 v 7400 J-K Flip-Flop CD 5401 DG003Q 14-LEAD 16-LEAD 24-LEAD 54H51 54H52

CMOS XNOR Gates

Abstract: 3 input or gates TTL Buffers ­ Inverting, noninverting, tri-state, clock buffer Input buffers ­ CMOS, CMOS Schmitt ­ TTL, TTL Schmitt NAND/AND gates NOR/OR gates AOI/OAI gates XNOR/XOR gates D Flip-Flops T Flip-Flops , for 2-input NAND with fanout=2 Output driving capability ­ 2mA, 4mA, 8mA, 12mA, 16mA, 20mA, 24mA , /3V Propagation delay 120ps of 2-input NAND with fanout=2 Output driving capability ­ 4mA, 8mA , · · · · Buffers ­ Inverting, noninverting, tri-state, clock buffer NAND/AND gates NOR/OR
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HT5D048 CMOS XNOR Gates cmos gate nand nor xor cmos XOR schmitt trigger CMOS OR Gates and gate ttl gates 8 bit XOR Gates HT5D028

74573

Abstract: 74574 Summary NAND Gates NOR Gates AND Gates OR Gates XOR Gates Buffers Inverters Interface Devices , 7476 7483 7485 7486 7490 7493 74121 2 of 12 Function Quad 2-Input NAND Gate Quad 2-Input NOR Gate Quad 2-Input NAND Gate ( Open collector ) Hex Inverter Hex Inverter ( Open collector ) Hex Inverter ( Open collector ) Hex Buffer Quad 2-Input AND Gate Triple 3-Input NAND Gate Triple 3-Input AND Gate Hex Inverter ( Schmitt trigger ) Dual 4-Input NAND Gate Dual 4-Input AND Gate Triple 3-Input
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74573 74574 7486 XOR GATE 7486 full adder latch 74574 7408, 7404, 7486, 7432

SN74L04N

Abstract: sn74h04n DM74H22N Dual 4 NAND Gate (Open Collector) 30635X B21 DM74H30N Eight Input NAND Buffer 30624E B26 , /SN74L03N Ouad 2-input NAND gate with open collector output "nOBBBE B2 SN7401N/AN SN74H01N Ouad 2-input NAND gate with open collector output Vcc f kS k^J B3 SN7402N SN74L02N/SN74C02N Quad 2-input NOR , National Semiconductor Semiconductors Integrated Circuits - Digital TTL. 74H Series TTL (High-Speed) The gates, inverters and expanders in the 74H series are high speed versions of the similarly
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DM74H76N SN7404N SN74L04N sn74h04n 74h ttl inverter or gate DM74H04N SN74H00N 31048X DM74H53N 30628H DM74H54N 30629F DM74H55N

Signetics TTL

Abstract: 7 INPUT NOR GATE 11 10 2 3 4 5 387A QUAD 2-INPUT NAND GATE 7 NOR GATES OR GATES 14 13 12 11 10 9 8 "â â -.â â . , , thus ensuring that an expanded 337 will have the same input characteristics as the other NAND gates , both the "0" and "1" states. Input Characteristics The input structure of the NAND gates makes them , NAND gate inputs. As with the AND gates, the input load of the NAND gates may be simulated by a 2k£2 , inputs to a driven input, the unused inputs may be returned to Vcc. 20 The UTILOGIC II NAND gates have
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Signetics TTL 7 INPUT NOR GATE TTL johnson ring counter LU300 DTL NOR gate

dtl 333

Abstract: Inverter Gates resistor while the 333 has puliup resistor j on the chip. The 334 and 335 contain six 2-input NAND gates connected such that two gates share one strobe input and four gates share another strobe input. The , Gates â'¢ 4-lnverter, 2-NAND (Open Collector) â'¢ 4-lnverter, 2-NAND (Passive Pullup) â'¢ Strobed Hex , voltage level. To use the NAND gates as inverters, the A and B inputs may both be connected to the same , high. Data on the A inputs of those gates will appear inverted on the outputs. When the strobe input is
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dtl 333 Inverter Gates 1UL0 function of x- or gates 333 dtl TSC332/333/334/335

m60013

Abstract: M60016 Input 7 X X X NAND GATES N02S NAND Gate, 2 Input 3 X X X N022 X2 NAND Gate, 2 Input 5 X , . Gate Delay (2 input NAND, 2x drive, FO = 2, 2 mm metal) Gate Delay (2 input NAND, 4x drive, FO = 2, 2 , silicon. The 1.0 jim arrays have a propagation delay of 370 picoseconds for a 2-input NAND (FO =* 2,2 mm , transistors) instead of two-input NAND gates increases gate utilization. This three-input NAND example , .1.3 ^m Drawn Gate Delay (2 input NAND, FO = 2, 2 mm metal) .900 psec Toggle Rate
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m60013 M60016 m60011 M60014 z46n M60030 M6005X M6006X MDS-GA-11-90-RK

7A SF

Abstract: NAND Gates 6 12 10 60 17 7,5 33 15 # # 15« E-J-K SF.C 405 S 98 5 4,5 667 Quadruple 2 input NAND gates , 10 60 8 7,5 33 71 591 # E-J SF.C 401 LS 8 17 15 7» Quadruple 2 input NAND gates Quadruple opà , » E-J-K SF.C 403 S 65 5 4,5 663 Triple 3 input NAND gates Triple opérateur ET-NON à 3 entrées E-J SF.C 412 LS 6 17 15 Duel 4 input NAND gates Doubles opérateurs ET-NON à 4 E-J E-J SF.C 422 H , 1 TOH 6 (CB-2) TO-85 (CB-78) NAND gates and inverters with open collector outputs OpÃ
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7A SF BO 411 LS-912 S944 PHL 405 C405H

74H series

Abstract: 3Q62 DM74H22N Dual 4 NAND Gate (Open Collector) 30635X B21 DM74H30N Eight Input NAND Buffer 30624E B26 , S 6 7 1Y 1A 1B 2Y 2A 2B GND B26 SN7430N SN74H30N/SN74S30N SN74L30N 8-input NAND gate j 14 U 13 , 2 A 2B GND 829 SN7437N SN74S37N Quad 2-input NAND gate Vc,: Br® 1 2 3 4 5 6 7 B27 SN7432N SN74S32N Quad 2-input OR gate Vcc 100001 B30 SN743SN/AN Quad 2-input NAND Buffer with open collector , National Semiconductor Semiconductors Integrated Circuits - Digital TTL. 74H Series TTL
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74H series 3Q62 TTL family DM74H08N quad-2-input NOT gate SN74137N 30630R DM74H60N 30631G DM74H61N 30636H DM74H62N

DM74H04N

Abstract: SN7421N DM74H22N Dual 4 NAND Gate (Open Collector) 30635X B21 DM74H30N Eight Input NAND Buffer 30624E B26 , NAND gate v,. B22 SN7425N Dual 4-input NOR gate V cc 20 2C 20 2B 2A 2Y 14 I 13 W 12 J 11 | 10 | 9 , SN7426N Quad 2-input NAND gate with open collector output » CC _ _ _ _ _ _ 1« [ 13 [ 12 [ 11 y 10 | 9 [ 8 ^ J 13 I «1 11 I 10 9 «1 WW SJB Jl1 B21 SN74H22N/SN74S22N Dual 4-input NAND , National Semiconductor Semiconductors Integrated Circuits - Digital TTL. 74H Series TTL
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SN7421N SN74L20N DM74H01N DM74H05N DM74H10N 30632E DM74H71N DM74H72N 30633C DM74H73N 31322X

asynchronous 4bit up down counter using jk flip flop

Abstract: counter 74168 , 4,290, 6,000, 8,118, and 10,008 2-input gates converted into NAND/NOR ones respectively; and 74, 74 , Notes Inverters 1 INV Invert gate 1 2 INV2 Dual invert gates 1 NAND gates 3 2ND 2-input NAND gate , OR-AND/ NAND gates 52 G201 2-1 input 2 wide OR-NAND gate 2 53 G202 2-1-1 input 3 wide OR-NAND gate 2 , Logic function No. of unit cell Notes OR-AND/ NAND gates 54 G203 3-1 input 2 wide OR-NAND gate 2 55 , is able to convert levels of both CMOS and TTL for all input/output buffers. Ten types of master
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asynchronous 4bit up down counter using jk flip flop counter 74168 Multiplexer 74152 3-8 decoder 74138 synchronous counter using 4 flip flip 74183 alu MSM70V000 MSM-71V000 MSM72V000 MSM73V000 MSM74V000 MSM79V000
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