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LT1009M2 Linear Technology IC SPECIALTY ANALOG CIRCUIT, Analog IC:Other visit Linear Technology - Now Part of Analog Devices
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LT1034-2.5#TR Linear Technology IC SPECIALTY ANALOG CIRCUIT, Analog IC:Other visit Linear Technology - Now Part of Analog Devices
LT1004-1.2#TR Linear Technology IC SPECIALTY ANALOG CIRCUIT, Analog IC:Other visit Linear Technology - Now Part of Analog Devices
LT1034-1.2 Linear Technology IC SPECIALTY ANALOG CIRCUIT, Analog IC:Other visit Linear Technology - Now Part of Analog Devices
LTC202 Linear Technology IC SPECIALTY ANALOG CIRCUIT, Analog IC:Other visit Linear Technology - Now Part of Analog Devices

4 bit barrel shifter circuit for left shift opera

Catalog Datasheet MFG & Type PDF Document Tags

eni21

Abstract: 15VZ Multiplexed to 16 Lines u Full 0-31 Position Barrel Shift Capability u Integral Priority Encoder for 32-bit , 32 32:5 PRIORITY ENCODE 32 2:1 5 32-bit BARREL SHIFT ARRAY RIGHT/LEFT FILL , LSH33 LSH33 DEVICES INCORPORATED 32-bit Barrel Shifter with Registers 32-bit Barrel , · 68-pin Ceramic LCC · 68-pin Ceramic PGA The LSH33 is a 32-bit high speed shifter designed for , for left shifts, but the two's complement of the shift code results in the equivalent right shift
Logic Devices
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eni21 15VZ MIL-STD-883 Y31/15 Y30/14 Y28/12 Y26/10 Y24/8

L301-29

Abstract: 32-bit Cascadable Barrel Shifter FEATURES 32-bit Input, 32-bit Output Multiplexed to 16 Lines Full 0-31 Position Barrel Shift Capability Integral Priority Encoder for 32-bit Floating Point , affect the definition of the shift code. DESCRIPTION The LSH32 is a 32-bit high speed shifter , circular (barrel) shifting, left shifts with zero fill, and right shift with sign extend are possible. In , SIG N 131- lo Logic Products 5-141 LD S .3 2 B 32-bit Cascadable Barrel Shifter T able 1. W
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L301-29 Y29J13 LSH32JC42 LSH32KC42 LSH32GC42 LSH32KM50 LSH32GM50
Abstract: Barrel Shift Capability Q Integral Priority Encoder for 32-bit Floating Point Normalization â , LSH33 32-bit Barrel Shifter with Registers T -4 6 -0 9 -0 9 I:.TàbCÌìTI:;W rap M ode S h ift C , SSbSTQS 00013ST 1 â  32-bit Barrel Shifter with Registers u Ã'A a* AA T-4 6 -0 9-0 9 , , _ _ _ T - ï é 'Ã" Ÿ 'r i? LSH33 32-bit Barrel Shifter with , a 32-bit high speed shifter designed for use in floating point normalization, word pack/ unpack -
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SI/04 SI/03 Y27/11 Y17/1 LSH33JC40 LSH33KC40

16 bit barrel shifter circuit diagram

Abstract: Y3014 LSH32 BLOCK DIAGRAM 32 32 2:1 5 32-bit BARREL SHIFT ARRAY SI 4 -SI 0 RIGHT/LEFT , LSH32 LSH32 DEVICES INCORPORATED 32-bit Cascadable Barrel Shifter 32-bit Cascadable Barrel Shifter DEVICES INCORPORATED FEATURES DESCRIPTION u 32-bit Input, 32-bit Output Multiplexed to 16 Lines u Full 0-31 Position Barrel Shift Capability u Integral Priority Encoder for 32-bit , TABLE 3. 32-bit Cascadable Barrel Shifter NORMALIZE MULTIPLXER FILL MODE SHIFT CODE D EFINITIONS
Logic Devices
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16 bit barrel shifter circuit diagram Y3014 SMD CODE y17 32 bit barrel shifter using two level multiplexer Y22/6 Y20/4 Y18/2 Y16/0 Y29/13 Y25/9

SMD CODE y17

Abstract: LSH32 Multiplexed to 16 Lines u Full 0-31 Position Barrel Shift Capability u Integral Priority Encoder for 32-bit , INCORPORATED 32-bit Cascadable Barrel Shifter TABLE 1. WRAP MODE SHIFT CODE DEFINITIONS Shift Code , the SO 4 ­SO 0 outputs for use by all slices, and the appropriate 0­15 bit shift is accomplished. If , of the number of shift positions required to accomplish this. 32-bit Cascadable Barrel Shifter , LSH32 LSH32 DEVICES INCORPORATED 32-bit Cascadable Barrel Shifter 32-bit Cascadable
Logic Devices
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4 bit barrel shifter circuit for left shift y19 smd code 4 bit barrel shifter circuit for left shift opera Y23/7 Y21/5 Y19/3 LSH32GC32 LSH32GC20 LSH32JC32

32 bit barrel shifter using two level multiplexer

Abstract: Y3014 32 5 2:1 SI 4 -SI 0 RIGHT/LEFT FILL/WRAP 16 NORM 32-bit BARREL SHIFT ARRAY 16 2:1 5 , LSH32 DEVICES INCORPORATED 32-bit Cascadable Barrel Shifter LSH32 DEVICES INCORPORATED 32-bit Cascadable Barrel Shifter DESCRIPTION The LSH32 is a 32-bit high speed shifter designed for , (barrel) shifting, left shifts with zero fill, and right shift with sign extend are possible. In addition , right shift of one position, etc. When not in the wrap mode, the LSH32 fills bit positions for which
Logic Devices
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LS 32 CONTACTOR LSH32JC20

32 bit barrel shifter using two level multiplexer

Abstract: 4 bit barrel shifter circuit for left shift LSH32 LSH32 DEVICES INCORPORATED 32-bit Cascadable Barrel Shifter 32-bit Cascadable Barrel Shifter DEVICES INCORPORATED FEATURES DESCRIPTION u 32-bit Input, 32-bit Output Multiplexed to 16 Lines u Full 0-31 Position Barrel Shift Capability u Integral Priority Encoder for 32-bit , BARREL SHIFT ARRAY SI 4 -SI 0 RIGHT/LEFT FILL/WRAP 16 16 NORM In fill mode, as in wrap , DEVICES INCORPORATED 32-bit Cascadable Barrel Shifter TABLE 1. WRAP MODE SHIFT CODE DEFINITIONS
Logic Devices
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18 x 16 barrel shifter
Abstract: Barrel Shift Capability â¡ Integral Priority Encoder for 32-bit Floating Point Normalization â , S mr h â'" â'" LSH32 â'" 32-bit Cascadable Barrel Shifter DEVICES , inputs, including circular (barrel) shifting, left shifts with zero fill, and right shift with sign , directly for left shifts, but the two's complement of the shift code results in the equivalent right , . W rap 32-bit Cascadable Barrel Shifter M ode S h ift C o d e D efinitio ns Y30 Y29 11 -
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LSH32GM40 LSH32GM30 L-STD-883 LSH32KMB50 LSH32KMB40 LSH32GMB40

Y3014

Abstract: 32 bit barrel shifter using two level multiplexer Multiplexed to 16 Lines u Full 0-31 Position Barrel Shift Capability u Integral Priority Encoder for 32-bit , ENCODE 32 2:1 5 32-bit BARREL SHIFT ARRAY RIGHT/LEFT FILL/WRAP 16 16 G 2:1 , DEVICES INCORPORATED TABLE 3. 32-bit Barrel Shifter with Registers FILL MODE SHIFT CODE , LSH33 LSH33 DEVICES INCORPORATED 32-bit Barrel Shifter with Registers 32-bit Barrel , -pin PLCC, J-Lead The LSH33 is a 32-bit high speed shifter designed for use in floating point
Logic Devices
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11101 30
Abstract: Two's Complement 23-Bit Output of Format Control 40-Bit Inputto Barrel Shifter Barrel Shifter Output (0 Shift) Barrel Shifter Output (23 Shifts) S2S2 3938 40-Bit Partial Result Input S2 , Format adjustment for video display On-chip barrel shifter for precision expansion Block floating-point , BARREL1.0- BARREL1.4 in barrel shifterl. The barrel shifter controls should never be set greater than 23 , bit positions 17-24 at the barrel shifter inputs. 110 L SI l o c k : L64240 M ulti-Bit Filter -
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L64210/L64211 155-P MIL-STD-883C

LSH33

Abstract: 32 bit barrel shifter using two level multiplexer Multiplexed to 16 Lines u Full 0-31 Position Barrel Shift Capability u Integral Priority Encoder for 32-bit , 32 32:5 PRIORITY ENCODE 32 2:1 5 32-bit BARREL SHIFT ARRAY RIGHT/LEFT FILL , LSH33 LSH33 DEVICES INCORPORATED 32-bit Barrel Shifter with Registers 32-bit Barrel , Arithmetic Functions 1 03/26/1999­LDS.33-N LSH33 DEVICES INCORPORATED 32-bit Barrel Shifter with , shift code input represents the number of shift positions directly for left shifts, but the two
Logic Devices
Original
4 bit barrel shifter circuit diagram
Abstract: of coefficients Format adjustment for video display On-chip barrel shifter for precision expansion , . The barrel shifter is useful for normalizing the data or increas­ ing the contrast of video images , 21 0 VB 40-Bit Input to Barrel Shifter /W 0 ° 9 3 8 " ^ \ ^ \ ^ " UB Barrel Shifter Ouput (0 Shift) 0 o 3938 Barrel Shifter Output (23 Shifts) D V E C' 24 . C , multiplied with 8-bit data, the result ends up in bit positions 17-24 at the barrel shifter inputs. 12 -
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0S013
Abstract: position barrel shift capability â¡ Integral priority encoder for 32-bit floating point normalization , ­ malization is placed on the SO 4 -S O 0 outputs for use by all slices, and the appropriate 0 -1 5 bit shift , LSH32 32-bit Cascadable Barrel Shifter Features Description â¡ 32-bit input, 32-bit output multi­ plexed to 16 lines The LSH32 is a 32-bit high speed shifter designed for use in , (barrel) shifting, left shifts with zero fill, and right shift with sign extend are possible. In -
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LSH32CM LSH32KME50 LSH32KM40 LSH32KME40 Y31/Y15 30/Y14

100158DC

Abstract: . Although two stage de lays are required (one for each rank), the total shift takes only about 4 ns. This , 8 9 1 0 1 11 2 1 3 1 4 15 TL/F/9862-8 FIGURE 3. Basic 16-Bit 0 - 7 Place Shifter 3-142 , 100158 O T National dim Semiconductor F100158 8-Bit Shift Matrix General Description The F100158 contains a combinatorial network which per forms the function of an 8 -bit shift matrix. Three , with 50 ÌÌ to -2 .0 V Min -1 0 3 5 -1 8 3 0 -1 0 4 5 Guaranteed HIGH Signal for All Inputs
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100158DC 9B62-2 I00158 TL/F/9862-9

STK 3240

Abstract: ) and Shift-and-Count Circuit (SAC). The 40-bit barrel shifter operates on 40-bit twoâ'™s complement , â'" 16 x 16-bit multiplier with 40-bit accumulation, 40-bit barrel shifter, and 40-bit ALU a , ), 40-bit data ALU and 40-bit barrel shifter and Shift-and-Count cir­ cuit. The 40-bit execution unit , compute the shift amount for normalizing data to 32-bit twoâ'™s complement fractional format. â'¢ An , general registers. A MAC input shifter (MSFT) can perform a 1-bit or 16-bit right shift on input data to
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STK 3240 PD77016 L/PD77016
Abstract: ) and Shift-and-Count Circuit (SAC). The 40-bit barrel shifter operates on 40-bit twoâ'™s complement , multiplier with 40-bit accumulation, 40-bit barrel shifter, and 40-bit ALU ° Program control â , multiply-accumulator (MAC), 40-bit data ALU and 40-bit barrel shifter and Shift-and-Count cir­ cuit. The 40-bit , compute the shift amount for normalizing data to 32-bit twoâ'™s complement fractional format. â'¢ An , general registers. A MAC input shifter (MSFT) can perform a 1-bit or 16-bit right shift on input data to -
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JLIPD77016 D77016
Abstract: two's complement arithmetic. Barrel Shifter (BSFT) and Shift-and-Count Circuit (SAC). The 40-bit barrel shifter operates on 40-bit twoâ'™s complement data to produce a 40-bit result. The unit performs , 16-bit multiplier with 40-bit accumulation, 40-bit barrel shifter, and 40-bit ALU Q Program control , data ALU and 40-bit barrel shifter and Shift-and-Count cir­ cuit. The 40-bit execution unit permits , floating-point normalization by means of an operation to compute the shift amount for normalizing data to 32-bit -
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full subtractor circuit using xor and nand gates

Abstract: vhdl code for multiplexer 64 to 1 using 8 to 1 , comparator, and normalizing barrel shifter, is available for applications needing high precision and wide , MxN Barrel Shifter - Zero Detectors - M ultiplier-Adder (unsigned or two's complement) V L S Ü CH N , MultiplierAdder - High-speed Priority Encoder - Denormalizing Barrel Shifter - Normalizing Barrel Shifter 3 , . unused portions of the affected functional units and does not build logic for non-existent bit locations. t~42- 4 1 VDP370 SERIES TEST Automatically-generated vectors for high-fault-coverage test are
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full subtractor circuit using xor and nand gates vhdl code for multiplexer 64 to 1 using 8 to 1 ALU 74181 verilog 8 BIT ALU design with vhdl code using structural verilog code for 64 bit barrel shifter 32 bit ALU vhdl code VGT350/353 VSC350/370 VCC300 12-MIPS VSC300

FULL SUBTRACTOR using 41 MUX

Abstract: DS3707 shifter output format: Bit Number Weighting 31 S 30 29 28 27 26 25 -JJ- 7 2~24 6 lO 5 4 3 C O 2 1 0 2 , 2 ° 2. WTB1:0 = 00 No shift applied, giving a shifter output format: Bit Number Weighting 31 S 30 29 , 2"28 2_29 The effective weighting of the sign bit is - 2 2 4. WTB1:0 = 10 Shift complex product two , multifunction 16-bit barrel shifter, is ideally suited to this task. According to theory, the largest possible , cycles). An example of an output normalisation circuit is shown in Fig.8. Only 4-bit data paths are used
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DS3707 FULL SUBTRACTOR using 41 MUX MT52L1G32D4PG-107 WT:B TR bfp mark diode 32 bit barrel shifter circuit diagram using multi YI11 SP16116 PDSP16116 PDSP16116A PDSP16318A PDSP1601A

20/PCb board zd lty 6

Abstract: vice c o nsists o f a 7 -po rt 6 4-w ord b y 32-bit w orking RAM, 64 bits in/32 bits o u t ca s c a d a b le fun n el shifter, high-speed m u lti-fun ctio n 32-bit ALU and 32-bit m ask g eneration and , pe ra n d s in o ne cycle â'¢ 64-bit in, 3 2-b it o ut ca sca d a b le fun n el shifter â , output for the T counter. ML The input pin which can be used to load the external bit in order to , output from SPC command and data registers for diagnostics. SCLK SHIFT clock for loading the SPC
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20/PCb board zd lty 6 T49C404 IDT49C404/A 49C404 49C404A
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