NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
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| Catalog Datasheet Results | Type | Document Tags |
| Abstract: 32x32-bit multiplier. Key Features Communications Functions: Communication Coprocessor (CCP) 4 HSSL , : Fully Parallel On-Chip 32x32-bit Multiplier Integrated Instruction Cache (16 KB) and Data Cache (8 KB ... | Original |
4 pages, |
TSC701 sparc v8 TSC701 abstract |
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| Abstract: Multiplication. 1 2.1 The 32x32-bit multiplication , 8 4.1 Extended Precision 32x32-bit multiplication . , Performances. 22 5.4 Implementation of the 32x32-bit Direct Form I. , Performances. 23 5.5 Implementation of the 32x32-bit Direct Form II. , Implementation of the 32x32-bit Cascade Form . 25 5.6.1 Memory ... | Original |
70 pages, |
32x16-bit spra454 iir filter applications 4 bit left shift circuit for dsp SPRA454 SPRA454 abstract |
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| Abstract: - Supports PIO Mode 0 to 4, Multiword DMA Mode 0, 1 and 2 - Integrated 32x32-bit Buffer For Each , word (32x32-bit) deep buffers allow zero wait state PCI burst transfer in either direction. The ... | Original |
4 pages, |
SLC90E66-UF SLC90E66 intel fw82443bx CLK48 82371AB 440BX fw82443bx ATA/66 FW82443BX SLC90E66 abstract |
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| Abstract: Roadmap to 3 GFLOPS Roadmap to sub-$50 prices 24x24-bit and 32x32-bit integer multiply VelociTI's , Unit Capabilities Y Y 16x16-bit fixed-point multiplies 32x32-bit fixed-point multiplies How , Application Report SPRV034B SPRV034B Y Y 32x32-bit single-precision floating-point multiplies 64x64-bit ... | Original |
13 pages, |
C6201 C6000 TMS320C6000 programming tms320c6000 C67x Architecture of TMS320C67X TMS320C67x SPRV034B SPRV034B abstract |
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| Abstract: with 32-x32-bit fixed point registers - 4 KB instruction cache and 4 KB data cache - Memory ... | Original |
2 pages, |
SDLC TO SPI MPC852T 852T "Dual-Port RAM" MPC852T abstract |
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| Abstract: MHz - Single-issue, 32-bit version of the embedded 8xx core with 32-x32-bit fixed point registers - ... | Original |
2 pages, |
Serial communication I2C in PC860 PC860SR PC860SR abstract |
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| Abstract: MHz · Roadmap to 3 GFLOPS · Roadmap to sub-$50 prices · 24x24-bit and 32x32-bit , fixed-point multiplies 32x32-bit fixed-point multiplies 32x32-bit single-precision floating-point multiplies ... | Original |
11 pages, |
velocITI TMS320C6000 SPRA908 programming tms320c6000 C6201 C6000 Architecture of TMS320C67X C67x TMS320C67x SPRA908 abstract |
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| Abstract: Dhrystone 2.1) - Single-issue, 32-bit version of the PowerPC core with 32x32-bit fixed point registers - ... | Original |
2 pages, |
Serial communication I2C in MPC823 motorola camera CCIR-656 32-bit microprocessor architecture smc diodes motorola powerpc dhrystone MPC823FACT/D MPC823FACT/D abstract |
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| Abstract: (using Drhystone 2.1) at 80 MHz - Single-issue, 32-bit version of the PowerPC core with 32x32-bit fixed ... | Original |
2 pages, |
MPC860P MPC860 MC68360 hdlc 855T MPC860FACT/D MPC860FACT/D abstract |
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| Abstract: 32x32-bit fixed point registers - 2KB instruction cache and 1KB data cache (823) or 16KB instruction cache ... | Original |
2 pages, |
powerpc 601 advanced information MPC823 CCIR-656 MPC823FACT/D MPC823FACT/D abstract |
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| Abstract: EDO/FP SIMM Code Information MXXXXXXXXXXX - XXXXX 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1. Memory Module(M) 11. Package J : SOJ-400 SOJ-400(Gold Tab) 2. Module Configuration 5 : SIMM 12. PCB Revision 0 : None 3~4. Data bits 32 : x32 bit 13. "" 5. Vcc, Mode1, Mode2 1 : CMOS 5.0V, FP, Normal 14. Power C : Normal, Self Ref. 6~7. Depth 16 : 16M 15~16. Speed < tRAC > 60 : 60ns 8. Refresh 0 : 4K Cycle 17~18. Customer (Special Handl ... | Original |
1 pages, |
SOJ-400 SOJ-400 abstract |
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| Abstract: PowerPC core with 32x32-bit fixed point registers - 2-Kbyte instruction cache and 1-Kbyte data cache - ... | Original |
2 pages, |
MPC860 MPC850 hdlc Serial communication I2C in MPC850FACT/D MPC850FACT/D abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| standard 32x32-bit Biquad filters. The input signal used in the example is a logarithmic chirp www.datasheetarchive.com/download/22176963-595976ZC/lpc177x.lpc178x.cmsis.driver.library.zip (group___g_e_q5_band.html) |
NXP | 30/06/2011 | 30079.24 Kb | ZIP | lpc177x.lpc178x.cmsis.driver.library.zip |
| standard 32x32-bit Biquad filters. The input signal used in the example is a logarithmic chirp www.datasheetarchive.com/download/37322277-595978ZC/lpc18xx.cmsis.driver.library.zip (group___g_e_q5_band.html) |
NXP | 30/06/2011 | 21707.83 Kb | ZIP | lpc18xx.cmsis.driver.library.zip |
| standard 32x32-bit Biquad filters. The input signal used in the example is a logarithmic chirp www.datasheetarchive.com/download/98097348-595977ZC/lpc17xx.cmsis.driver.library.zip (group___g_e_q5_band.html) |
NXP | 07/10/2011 | 30456.41 Kb | ZIP | lpc17xx.cmsis.driver.library.zip |
| MPC801 MPC801 MPC801 MPC801 MPC801 MPC801 MPC801 MPC801 RISC Microprocessor Embedded PowerPC core with 52 MIPS at 40 MHz (using Dhrystone 2.1) Single-issue, 32-bit version of the embedded PowerPC core with 32 X 32-bit fixed-point registers Up to 32-Bit Data Bus (Dynamic Bus Sizing for 8,16, and 32 Bits) 26 External Address Lines Complete Static Design (040 MHz operation) Memory Controller (Eight Banks) System Integration Unit UART support I 2 C support SPI www.datasheetarchive.com/files/motorola/design-n/sps/hpesd/prod/eppc/mpc801.htm |
Motorola | 25/11/1996 | 1.83 Kb | HTM | mpc801.htm |
| : 16 x 16-bit fixed point multiplies 32 x 32-bit fixed point multiplies 32 x 32-bit single www.datasheetarchive.com/files/texas-instruments/data/sc/docs/dsps/products/c6000/c67x/features.htm |
Texas Instruments | 08/02/1999 | 11.29 Kb | HTM | features.htm |
| 24 x 24-bit fixed point multiplies 32 x 32-bit fixed point multiplies 32 x 32-bit single www.datasheetarchive.com/files/texas-instruments/sc/docs/dsps/products/c67x/index.htm |
Texas Instruments | 06/02/1998 | 11.43 Kb | HTM | index.htm |
| : 16 x 16-bit fixed point multiplies 24 x 24-bit fixed point multiplies 32 x 32-bit fixed point multiplies 32 x 32-bit single precision floating point multiplies 64 x 64-bit double precision floating www.datasheetarchive.com/files/texas-instruments/sc/docs/dsps/products/c6000/c67x/features.htm |
Texas Instruments | 08/07/1998 | 9.6 Kb | HTM | features.htm |
| MPC860 MPC860 MPC860 MPC860 MPC860 MPC860 MPC860 MPC860 RISC Microprocessor Embedded PowerPC Core with 52 MIPS at 40 MHz (using Dhrystone 2.1) Single Issue, 32-Bit Version of the Embedded PowerPC Core (Fully Compatible with Book 1 of the PowerPC Architecture Definition) with 32 x 32 - Bit Fixed Point Registers Up to 32-Bit Data Bus (Dynamic Bus Sizing for 8,16, and 32 Bits) 32 Address Lines Complete Static Design (0Ð40 MHz Operation) Memory Controller (Eight Banks) General www.datasheetarchive.com/files/motorola/design-n/sps/hpesd/prod/eppc/mpc860.htm |
Motorola | 25/11/1996 | 2.24 Kb | HTM | mpc860.htm |
| filters. The remaining 3 high frequency bands use standard * 32x32-bit Biquad filters. The input signal www.datasheetarchive.com/download/22176963-595976ZC/lpc177x.lpc178x.cmsis.driver.library.zip (arm_graphic_equalizer_example_q31.c) |
NXP | 30/06/2011 | 30079.24 Kb | ZIP | lpc177x.lpc178x.cmsis.driver.library.zip |
| filters. The remaining 3 high frequency bands use standard * 32x32-bit Biquad filters. The input signal www.datasheetarchive.com/download/37322277-595978ZC/lpc18xx.cmsis.driver.library.zip (arm_graphic_equalizer_example_q31.c) |
NXP | 30/06/2011 | 21707.83 Kb | ZIP | lpc18xx.cmsis.driver.library.zip |