NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: Broadband Cable Solutions LC Filter Diplexer Electrical Specifications Passband: 80MHz to 870MHz Passband Insertion Loss: 0.5dB maximum Rejection (minimum) -30dB @ 1165MHz to 1950MHz -25dB @ 1950MHz to 6000MHz -15dB @ 6000MHz to 9725MHz Output Return Loss: 13dB @ 80MHz to 870MHz Input Return Loss 13dB @ 80MHz to 870MHz 15dB @ 1165MHz to 3170MHz ZIN/OUT: 50, nominal Shipping Pack: Supplied on 13" reels (250-units/reel) Temperature Range Operating, -40°C to +85°C Storage, -55°C to ... | Original |
2 pages, |
piezo cable 250UN LC-Filter-Diplexer SM003 SM003 abstract |
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| Abstract: attenuation 32.67MHz 25.00~31.70MHz Sidelobe 40.70~45.00MHz Reflected wave signal suppression 1.2 us . ... | Original |
9 pages, |
datasheet abstract |
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| Abstract: attenuation 32.67MHz 25.00~31.70MHz Sidelobe 40.70~45.00MHz Reflected wave signal suppression 1.2 us . ... | Original |
9 pages, |
datasheet abstract |
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| Abstract: 10.43 10.31 11.09 12.26 11.31 IF VSWR @LO=3170MHz (:1) @LO (dBm) +10 10.0 70.0 130.0 ... | Original |
5 pages, |
MCA-36FMH MCA-36FMH abstract |
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| Abstract: 12.26 11.31 IF VSWR @LO=3170MHz (:1) @LO (dBm) +10 10.0 70.0 130.0 190.0 270.0 330.0 ... | Original |
5 pages, |
MCA-36FMH MCA-36FMH abstract |
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| Abstract: RF/IF ICs (AMPLIFIERS) SELECTION TABLE RF/IF Gain Blocks Supply (V) �25 to �25 8.5 to 10.5 Power (mA) Package Type 30 16-lead SOIC 6.8 4 to 11 28 8-lead SOIC/MSOP 17 (50 Mhz) 5.6 4 to 11 28 8-lead SOIC/MSOP 9.1 (900 MHz) 23.6 (900 MHz) 5.3 2.7 to 5.5 42 8-lead CSP 4.8 (900 MHz) 19.3 (900 MHz) 4.2 2.7 to 5.5 23 8-lead CSP Part Number Single-Ended/ Differential Freq Range (MHz) Gain (dB) Output P1dB ... | Original |
2 pages, |
AD8369 AD604 AD6630 AD8132 AD8138 AD8330 AD8332 AD8350-15 AD8350-20 AD8351 AD8354 10 lead analog devices b 11 AD8353 AD6630 abstract |
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| Abstract: Variable Gain Amplifiers Part Number October 2006 Gain Scaling 1 Linearin-dB Linear AD600 AD600 DC to 35 32 - 0 to +40 �2 AD602 AD602 DC to 35 32 - � to +30 �2 DC to 90 40 - � to +31 +9 to +51 AD604 AD604 DC to 40 20 to 40 - AD605 AD605 Single Frequency Range to �dB (MHz) DC to 40 20 to 40 - Dual Quad Gain Range (dB) Gain Accuracy Preamp (dB) Output Noise Noise Max Gain Figure (dB) (nV/ Hz) Ou ... | Original |
1 pages, |
AD8367 AD603 AD604 AD605 AD8330 AD8331 AD8332 AD8334 AD8335 AD600 AD602 datasheet abstract |
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| Abstract: Technical Brief HardCopy II Military Temperature Range Support Introduction As part of Altera's initiative to provide enhanced commercial off-the-shelf (COTS) devices for military applications, the temperature range for the HardCopy® II device family has been extended to enable operation across the military temperature range (-55°C to 125°C). This allows military programs to benefit from new technology and economies of scale by using commercially available HardCopy II structured ASICs. Ha ... | Original |
3 pages, |
tb086 hc220f780 HC210F484 EP2S180 TB-086 datasheet abstract |
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| Abstract: Application Note: Virtex Series 170 MHz FIFOs Using the Virtex Block SelectRAM+ Feature R XAPP131 XAPP131 (v1.3) February 2, 2000 Summary The VirtexTM FPGA Series provides dedicated on-chip blocks of 4096 bit dual-port synchronous RAM, which are ideal for use in FIFO applications. This application note describes a way to create a common-clock (synchronous) version and an independent-clock (asynchronous) version of a 511 x 8 FIFO, with the depth and width being adjustable within the V ... | Original |
6 pages, |
XAPP205 XAPP131 asynchronous fifo vhdl xilinx vhdl code for a grey-code counter synchronous fifo design in verilog vhdl code for asynchronous fifo synchronous fifo block diagram for asynchronous FIFO 4 bit gray to binary converter circuit binary to gray code converter XAPP131 abstract |
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| Abstract: Application Note: Virtex Series R 170 MHz FIFOs Using the Virtex Block SelectRAM+ Feature XAPP131 XAPP131 (v1.7) March 26, 2003 Summary The VirtexTM FPGA series provides dedicated on-chip blocks of 4096 bit dual-port synchronous RAM, which are ideal for use in FIFO applications. This application note describes a way to create a common-clock (synchronous) version and an independent-clock (asynchronous) version of a 511 x 8 FIFO, with the depth and width being adjustable within the Verilo ... | Original |
7 pages, |
XAPP131 vhdl code of binary to gray xilinx asynchronous fifo asynchronous fifo vhdl xilinx asynchronous fifo vhdl block diagram for asynchronous FIFO vhdl code for asynchronous fifo binary to gray code converter XAPP131 abstract |
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| Abstract: RF IC 2008/ TruPwr(RMS) . . 2 . . . . . . . . . . . . . . 9 RF/IF . . . . . . . . . . . . . . . . . . 3 I/Q . . . . . . . . . 10 ADC . . . . . . . . . . . . . . . 4 (DDS) . . . . 11 . . . . . . . . . . . . . . . . . . . . . . 5 . . . . . . . . . . . . . . . 12 . . . . . . . . . . . . . . . . . . . . . . 5 RF/IF . . . . . . . . . . . . . . . . . 13 . . . . . . . . . . . . . . 6 (PLL) . . . . . . . . . . . 14 . . . . . . . . . . . . . . . . . . 7 ... | Original |
16 pages, |
AD8363 AD8364 ADL5500 ADL5501 ADL5502 ADL5334 ADL5531 ad8368 admtv102 AD9951 AD451 ADL5391 ADL5372 MTV320 itd3020 datasheet abstract |
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| Abstract: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information MC74LCX16646 MC74LCX16646 Low-Voltage CMOS 16-Bit Transceiver/Registered Transceiver With 5V-Tolerant Inputs and Outputs (3-State, Non-Inverting) The MC74LCX16646 MC74LCX16646 is a high performance, noninverting 16bit transceiver/registered transceiver operating from a 2.7 to 3.6V supply. The device is byte controlled. Each byte has separate control inputs which can be tied together for full 16bit operation. High impedance TTL compatible in ... | Original |
10 pages, |
MC74LCX16646 BR1339 DIODE MOTOROLA B13 datasheet abstract |
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