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240ms

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: Iout=1.5A,ADP3338 Iout=1A AME8501 Reset timeout period 210ms±35%,ADM809 Reset timeout period 240ms(typ) AME8501 Reset timeout period 210ms±35%,ADM809 Reset timeout period 240ms(typ) AME8501 Reset timeout period 210ms±35%,ADM809 Reset timeout period 240ms(typ) Cross Reference Competition Part , %,ADM809 Reset timeout period 240ms(typ) AME8501 Reset timeout period 210ms±35%,ADM809 Reset timeout period 240ms(typ) AME8501 Reset timeout period 210ms±35%,ADM809 Reset timeout period 240ms(typ AME
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LM2981 LM8117 lm2982 as2805 LM2980 AS2936 CM2830 LM1117T- LM1117DTX- NCP5426 AME8811 AME1117
Abstract: connector 15ms 240ms Synoptic and wiring: dimensions : weight 50g I+ Det. Is I AC 1 , Is t t 0~240ms t Celduc Relais
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ECD05000 24v, 5A transformer TRANSISTOR 707 5A transistor S/ACC/ECD05000/A/03/05/2000 ECD05200 40-400H
Abstract: VCC 1V RESET A(TYP) 15 LM809/810 VCC VCC 240ms , : 140ms (MIN)240ms (TYP) LOW RESET (LM809) HIGH RESET (LM810) LM809/810 , (LM809) RESET (LM810) 3 5 VCC LOW VCC 240ms RESET LOW VCC HIGH VCC 240ms RESET HIGH 2 3 http://www.national.com/JPN National Semiconductor
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S5B SOT23-6 AN1187 motorola lm 463 LM809M3-3.08 S S7B National SOT23 TA 293 LM809/LM810 NAT2000 68HC11 AN1187 NLDBB006 LDB06A
Abstract: below the factoryprogrammed reset threshold. The reset signal remains asserted for 240ms after VCC rises , pin RESET is asserted LOW if VCC falls below the reset threshold and remains LOW for the 240ms typical , RESET 5V 0V 5V 240ms typical AZ809 RESET 0V AZ810 Note: The reset signal is , voltage and remains asserted for 240ms typical after the VCC has risen above the threshold. Figure 4 BCD Semiconductor
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AZ810NLTR AZ809NLTR AZ810NRTR AZ809/810 AZ809/AZ810 MAX809/MAX810
Abstract: AZ809A asserts a reset signal and the reset signal remains asserted for 240ms after VCC rises above the , threshold and remains LOW for the 240ms typical reset timeout period (140ms minimum) after VCC exceeds the , ) Time RESET 20 u s Typical 240ms Typical 240ms Typical Reset Active Timeout Period Output , threshold voltage and remains asserted for 240ms typically after the VCC has risen above the threshold BCD Semiconductor
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AZ809ANSTR-G1
Abstract: signal remains asserted for 240ms after VCC rises above the threshold. The AZ809 has an active-low , LOW for the 240ms typical reset timeout period (140ms minimum) after VCC exceeds the threshold 2 , 5V VTH Active Reset Timeout Period 0V RESET 20μs typical 5V 240ms typical , 240ms typical after the VCC has risen above the threshold. Figure 4. Reset Timing Diagram of AZ809 BCD Semiconductor
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Abstract: selected from four types: 1ms, 20ms, 60ms or 240ms. FEATURES · Supply Current (ISS1 , ········································SON-6, SOT-23-5, SOT-89-5 · Ceramic capacitors can be used. ···CIN=COUT=1F or more 20ms, 60ms or 240ms. , voltage detector output delay time from (.A.) 1ms, (.B.) 20ms, (.C.) 60ms or (.D.) 240ms. . : Select the Ricoh
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voltage regulator sot-89-5 R5511 R5511D R5511N R5511H EK-116-100119
Abstract: voltage declines below the factoryprogrammed reset threshold. The reset signal remains asserted for 240ms , remains LOW for the 240ms typical reset timeout period (140ms minimum) after VCC exceeds the threshold , AZ809/AZ810 RESET 240ms typical AZ809 RESET 0V AZ810 Note: The reset signal is , voltage and remains asserted for 240ms typical after the VCC has risen above the threshold. Figure 4 BCD Semiconductor
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marking n2c sot markingn2csot
Abstract: factory-programmed reset threshold. The reset signal remains asserted for 240ms after VCC rises above the threshold , temperature 140ms min. Power-On Reset pulse width, 240ms typical Active-low RESET Output (LM809 , low while VCC is below the reset threshold, and for 240ms after VCC rises above the reset threshold. Active-high output. RESET remains high while VCC is below the reset threshold, and for 240ms after VCC rises National Semiconductor
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SOT23-3 S5B S5B SOT23 max809 s8b 245TA 25c top mark sot23 3-Pin Microprocessor Reset Circuits MAX809/810 LM809-2 LM809-4 LM810-2 LM810-4
Abstract: signal remains asserted for 240ms after VCC rises above the threshold. The AZ809 has an active-low , LOW for the 240ms typical reset timeout period (140ms minimum) after VCC exceeds the threshold. 2 , Operating Diagram VCC 5V VTH Active Reset Timeout Period 0V RESET 240ms typical 5V , 240ms typical after the VCC has risen above the threshold. Figure 4. Reset Timing Diagram of AZ809 BCD Semiconductor
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Abstract: remains asserted for 240mS after VCC rises above the threshold. · · Precise Monitoring of 3.0V , falls below the reset threshold and remains LOW for the 240ms typical reset timeout period (140ms , Typical 240mS Typical 240mS Typical Reset Active Timeout Period Output Undefined Time , and remains asserted for 240ms typically after the VCC has risen above the threshold. Figure 11 BCD Semiconductor
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3 pin reset ic AZ809ANLTR-E1 AZ809ANRTR-E1 AZ809ANRTR-G1 AZ809ANSTR-E1 GH1 sot-23
Abstract: remains low while VCC is below the reset threshold or when MR is low, RESET then remains low for 240ms , for 240ms (typ) after VCC rises above the reset threshold 3 MR Manual Reset. This active low , threshold, an internal timer holds the reset output active for 240ms . This is intended as a power-on , activated and remains active for 240ms after the supply recovers. This allows time for the power supply and Analog Devices
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ADM811 ADM812 ADM811/ADM812 MAX811/MAX812 ADM811/ 100KW
Abstract: signal and the reset signal remains asserted for 240mS after VCC rises above the threshold. · · , RESET is asserted LOW if VCC falls below the reset threshold and remains LOW for the 240ms typical , Typical 240mS Typical 240mS Typical Reset Active Timeout Period Output Undefined Time , and remains asserted for 240ms typically after the VCC has risen above the threshold. Figure 11 BCD Semiconductor
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Abstract: 240ms of consistent reverse polarity information, the POLRD pin will change states and the polarity on , Idle signals consistently indicate a reverse polarity condition for 240ms, the polarity on the receiver , automatic correction circuit. For example if the polarity on the receive pair is reversed, after 240ms the , 240ms the PO LRD pin will go high and the RxD pin will have the correct polarity. The PO LDIS pin will , is tied low and the polarity is reversed on the receive pair, after 240ms the POLRD pin will go low -
OCR Scan
2200 resistor ML4654 10BASE-T ML4654CP ML4654CQ
Abstract: factory-programmed reset threshold. The reset signal remains asserted for 240ms after VCC rises above the threshold , . Power-On Reset pulse width, 240ms typical Active-low RESET Output (LM809) Active-high RESET Output (LM810 , threshold, and for 240ms after VCC rises above the reset threshold. Active-high output. RESET remains high while VCC is below the reset threshold, and for 240ms after VCC rises above the reset threshold. Supply , factory-programmed reset threshold. The reset signal remains asserted for 240ms after VCC rises above the threshold National Semiconductor
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S8B SOT23 72 sot23-3 S7B SOT23 S4B SOT23-3 Marking S9B S4B National SOT23
Abstract: receive pair only, and decides whether the polarity should be reversed. After 240ms of consistent reverse , indicate a reverse polarity condition for 240ms, the polarity on the receiver will be reversed. The POLRD , . For example if the polarity on the receive pair is reversed, after 240ms the PO LRD pin will go low , polarity stays reversed. If the reverse polarity is then corrected, after 240ms the PO LRD pin will go high , reversed on the receive pair, after 240ms the POLRD pin will go low, but the RxD will continue to pass the -
OCR Scan
RXTP18
Abstract: % 240ms ±15% Yes SON1612-6 SC-82AB (The reset signal of R3133x is "H".) R3134N Series 0.75V to 6.0V 0.85V to 6.0V 1.0V to 5.0V 100ppm/°C 0.8A 1.8% 240ms ±15% Yes SOT-23-5 Feature The currently Ricoh
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rp300n RP300 1010-4B EK-306-130507 R3132 R3133
Abstract: asserted for 240ms after VCC rises above the threshold. The LM809 has an active-low RESET output, while , specified over temperature 140ms min. Power-On Reset pulse width, 240ms typical Active-low RESET Output , (LM809) Active-low output. RESET remains low while VCC is below the reset threshold, and for 240ms , while VCC is below the reset threshold, and for 240ms after VCC rises above the reset threshold. 2 National Semiconductor
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LM809M3-4.38
Abstract: signal remains asserted for 240ms after VCC rises above the threshold. The MCP809 has an active-low , specified over temperature n 140ms min. Power-On Reset pulse width, 240ms typical Active-low RESET Output , while VCC is below the reset threshold, and for 240ms after VCC rises above the reset threshold , for 240ms after VCC rises above the reset threshold. 1 2 www.national.com VCC Supply National Semiconductor
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MCP810 MCP809/MCP810 MCP809/810
Abstract: R3134x Series Low Input VD with Delay Circuit The R3134x Series are CMOS-based voltage detector ICs with the built-in output delay circuit, which can operate at low voltage. The voltage detector with an internal delay circuit can hold the "L" signal for 240ms when the supply voltage increases above the detector threshold or when manual reset is released. A delay capacitor is not necessary. In , (Internally fixed) · Output Delay ·································· Typ.240ms (Accuracy ± 15%) · Reset Signal Ricoh
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R3134 SC-88A R3134K R3134Q
Abstract: Microprocessor Supervisory Circuit in 4-Lead SC70 ADM6711/ADM6713 FUNCTIONAL BLOCK DIAGRAMS FEATURES ADM6711 VREF MR RESET GND DEBOUNCE Figure 1. ADM6713 VCC RESET GENERATOR 240ms VREF APPLICATIONS Microprocessor systems Computers Controllers Intelligent instruments Automotive systems RESET GENERATOR 240ms 03754-011 VCC MR RESET GND , pin improves glitch immunity further. Rev. A | Page 8 of 12 RESET GENERATOR 240ms VREF Analog Devices
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adm6711l ADM6711LAKS-REEL ADM6711SAKSZ ADM6713MAKSZ-REEL-7 ADM6713MAKSZ-REEL7 ADM6713RAKSZ ADM6713TAKS-REEL-7 ADM6713TAKSZ-REEL-71 ADM6713SAKS-REEL ADM6713SAKSZ-REEL1 ADM6713SAKS-REEL-7 ADM6713SAKSZ-REEL-71
Abstract: , an Logic High RESET Output (SGM812) internal timer holds reset asserted for 240ms. This holds , â'" â'" 2 reset threshold or when MR is low; RESET then remains high for 240ms (typical) after , after VCC rises above the reset threshold, an internal timer holds the reset output active for 240ms , interruption occurs, the reset output is similarly activated and remains active for 240ms (typical) after the , VREF t1 VREF VREF t1 GND t1 = RESET Time = 240ms Typical VREF = RESET Voltage SG Micro
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811s SGM811/SGM812 SGM811 SGM811/812
Abstract: FUNCTIONAL BLOCK DIAGRAMS FEATURES ADM6711 VCC VREF MR RESET GND DEBOUNCE Figure 1. ADM6713 VCC APPLICATIONS Microprocessor systems Computers Controllers Intelligent instruments Automotive systems RESET GENERATOR 240ms 03754-011 Specified over temperature Low , 4-lead SC70 package RESET GENERATOR 240ms VREF MR RESET GND DEBOUNCE , POWER SUPPLY GLITCH IMMUNITY RESET GENERATOR 240ms VREF The ADM6711/ADM6713 contain internal Analog Devices
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ADM6711LAKSZ-REEL7 713TAKSZ-REEL7 ADM6713SAKSZ-REEL ADM6713SAKS-REEL7 ADM6713SAKSZ-REEL7 ADM6713RAKS-REEL ADM6713RAKSZ-REEL
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