NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: SEMICONDUCTORS D â- 170W5 0GG2232 0GG2232 6 «HESS & 4 ot 0 I" 'â- !â- - J -Hr ... | OCR Scan |
4 pages, |
Westinghouse thyristor thyristors 5000 volt 3000 amperes N630CH36 2580A TN630C Westinghouse thyristor 1500 N630C N630C abstract |
| Abstract: LM4882 LM4882 5V 8 250mW 1 THD N( ) 1 Boomer® LM4882 LM4882 LM4882 LM4882 Converted to nat2000 DTD Fixing for the new data book. Alson has edits done to this copy. This is the latest copy of the sgml given by Marshal l on 12/15/97. More edits from 12/17/97. This is the latest copy given by Alson. Put a newpage before the Apps.Div. Another hard copy to coris to input in sgml Boomer® 250mW ( ) DS10003 DS10003 ... | Original |
11 pages, |
Z-530M MUA08A M08A LM4882MM LM4882M LM4882 AN450 DS100030 LM4882 abstract |
| Abstract: 20G10 20G10: 10/9/91 Revision: Wednesday, December 29, 1993 PLDC20G10B/PLDC20G10 PLDC20G10B/PLDC20G10 Features D D D D D Fast Commercial: tPD = 15 ns, tCO = 10 ns, tS = 12 ns Military: tPD = 20 ns, tCO = 15 ns, tS = 15 ns Low power ICC max.: 70 mA, commercial ICC max.: 100 mA, military Commercial and military temperature range Userprogrammable output cells Selectable for registered or combi natorial operation Output polarity control Output enable source selectable from pin 13 or prod ... | Original |
11 pages, |
20L8 20L10 20G10 18L4 16L6 12L10 PLDC20G10B/PLDC20G10 20G10 abstract |
| Abstract: 0 XC5200 XC5200 Series Field Programmable Gate Arrays R November 5, 1998 (Version 5.2) 0 7* Product Specification Features - · Low-cost, register/latch rich, SRAM based reprogrammable architecture - 0.5um three-layer metal CMOS process technology - 256 to 1936 logic cells (3,000 to 23,000 "gates") - Price competitive with Gate Arrays · System Level Features - System performance beyond 50 MHz - 6 levels of interconnect hierarchy - VersaRingTM I/O Interface for pin-loc ... | Original |
73 pages, |
XC5215 tca 786 XC3000 XC4000 XC5200 XC5202 XC5204 XC5206 XC5210 XC5200 abstract |
| Abstract: 0 XC5200 XC5200 Series Field Programmable Gate Arrays R November 5, 1998 (Version 5.2) 0 7* Product Specification Features - · Low-cost, register/latch rich, SRAM based reprogrammable architecture - 0.5um three-layer metal CMOS process technology - 256 to 1936 logic cells (3,000 to 23,000 "gates") - Price competitive with Gate Arrays · System Level Features - System performance beyond 50 MHz - 6 levels of interconnect hierarchy - VersaRingTM I/O Interface for pin-loc ... | Original |
74 pages, |
XC5215 nec d 882 p datasheet X9001 XAPP 138 data XC3000 XC4000 XC5200 XC5202 XC5204 XC5206 XC5210 LC1 D12 10 AS 108-120 XC5200 abstract |
| Abstract: Product Obsolete or Under Obsolescence 0 XC5200 XC5200 Series Field Programmable Gate Arrays R November 5, 1998 (Version 5.2) 0 7* Product Specification Features - · Low-cost, register/latch rich, SRAM based reprogrammable architecture - 0.5um three-layer metal CMOS process technology - 256 to 1936 logic cells (3,000 to 23,000 "gates") - Price competitive with Gate Arrays · System Level Features - System performance beyond 50 MHz - 6 levels of interconnect hierarchy ... | Original |
73 pages, |
XC5215 CI TCA 785 XC3000 XC4000 XC520 XC5200 XC5200 Family XC5202 XC5204 XC5206 XC5210 8165 input chip chart XC5200 abstract |