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16Mx18

Catalog Datasheet Results Type PDF Document Tags
Abstract: mil height · Composition : 16Mx18 * 2(4)pcs · Used component type & part number : K4R881869E-HCT9/HCM8/HCK8 K4R881869E-HCT9/HCM8/HCK8 · Feature :Double Sided Module & 1,230 mil height · Composition : 16Mx18 * 8pcs · Used ... Original
datasheet

4 pages,
46.91 Kb

MS18R1622 MS18R1622 abstract
datasheet frame
Abstract: Composition : 16Mx18 * 2(4)pcs · Used component type & part number : K4R881869D-HCT9/HCN9/HCM9/HCM8/HCK8 K4R881869D-HCT9/HCN9/HCM9/HCM8/HCK8 · # , · Composition : 16Mx18 * 8pcs · Used component type & part number : K4R881869D-HCT9/HCN9/HCM9/HCM8 K4R881869D-HCT9/HCN9/HCM9/HCM8 ... Original
datasheet

4 pages,
22.38 Kb

MS18R1622 MS18R1622 abstract
datasheet frame
Abstract: SMI288AFSUD01 SMI288AFSUD01 September 14, 2001 288MByte RAMBUS® SO-RIMMTM - 16Mx18 based 160-pin SO-RIMM Features · · , LCOL0~LCOL4 LCTM/N LCFM/N LSCK LCMD SIN VREF U2 U3 . . . . . . . . . . . . . . .U8 16Mx18 Direct RDRAM 16Mx18 Direct RDRAM 16Mx18 Direct RDRAM 16Mx18 Direct RDRAM SIO0 SIO1 ... Original
datasheet

15 pages,
199.73 Kb

SMI288AFSUD01 SMI288AFSUD01 abstract
datasheet frame
Abstract: Infineon Technologies will manufacture RDRAM components in 4Mx18, 8Mx16, 8Mx18, 16Mx16 and 16Mx18 ... Original
datasheet

4 pages,
166.64 Kb

Rambus datasheet abstract
datasheet frame
Abstract: Module & 1,375 mil height (CT9/CN9/CM9) · Composition : 16Mx18 * 2(4/8)pcs · Used component type & part , /CK8) Double Sided Module & 1,375 mil height (CT9/CN9/CM9) · Composition : 16Mx18 *16pcs · Used ... Original
datasheet

4 pages,
48.05 Kb

MR18R162GDF0-CT9 MR18R1622 MR18R1622 abstract
datasheet frame
Abstract: :Single Sided Module & 1,375 mil height · Composition : 16Mx18 * 2(4/8)pcs · Used component type & part , Composition : 16Mx18 *16pcs · Used component type & part number : K4R881869A-FCT9/FCN9/FCM8/FCK8 K4R881869A-FCT9/FCN9/FCM8/FCK8 · # of ... Original
datasheet

4 pages,
47.9 Kb

MR18R1622 MR18R1622 abstract
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Abstract: · Feature : Single Sided Module & 1,375 mil height · Composition : 16Mx18 *4(6/8)pcs · Used , Module & 1,375 mil height · Composition : 16Mx18 *12(16)pcs · Used component type & part number 1 ... Original
datasheet

4 pages,
40.36 Kb

MR18R1624 MR18R1624 abstract
datasheet frame
Abstract: MN(P)18R1624 18R1624(8)EF0 RAMBUS MODULE SERIAL PRESENCE DETECT NexModTM Module SPD Specification based on 288Mb RDRAM(E-die, 32s banks) Version 1.0 May 2004 Change History Version 0.1 (Feb. 04)-preliminary First Copy Based on the SAMSUNG 288Mb D-die NexMod Module SPD Version 1.0 (May 04) Eliminate "Preliminary" -1- Version 1.0 May 2004 MN(P)18R1624 18R1624(8)EF0 RAMBUS MODULE SERIAL PRESENCE DETECT MN(P)18R1624 18R1624(8)EF0-CT9/CM8 · Composition : 16Mx18 * 4(8)pcs · Used component type & part number ... Original
datasheet

4 pages,
45.86 Kb

18R1624 18R1624 abstract
datasheet frame
Abstract: mil height · Composition : 16Mx18 *12(16)pcs · Used component type & part number 1 Normal Package ... Original
datasheet

4 pages,
35.85 Kb

MR18R162C MR18R162C abstract
datasheet frame
Abstract: MR18R1624 MR18R1624(6/8)MN1-CK8/CK7/CG6 · Feature : Single Sided Module & 1,375 mil height · Composition : 16Mx18 *4 ... Original
datasheet

4 pages,
36.35 Kb

MR18R1624 MR18R1624 abstract
datasheet frame
Abstract: RLDRAM® 2 Memory: Addressing Networking Memory Requirements ISSI's RLDRAM 2 Memory is a reduced-latency DRAM that offers fast random access (20ns tRC), making RLDRAM ideal for communication applications ranging from access nodes to core routers. table applications. Additionally, RLDRAM's large density provides the flexibility to accommodate ever expanding lookup tables. Long-term Product Support Product life-cycles of 10 years or greater are common for many applications targeted by RLDRAM. ... Original
datasheet

1 pages,
132.93 Kb

ternary RLDRAM content addressable memory low power datasheet abstract
datasheet frame
Abstract: Preliminary GS82582T18/36E-400/375/333/300/250 GS82582T18/36E-400/375/333/300/250 165-Bump BGA Commercial Temp Industrial Temp Features · Simultaneous Read and Write SigmaDDRTM Interface · Common I/O bus · JEDEC-standard pinout and package · Double Data Rate interface · Byte Write function · Burst of 2 Read and Write · 1.8 V +100/­100 mV core power supply · 1.5 V or 1.8 V HSTL Interface · Pipelined read operation with self-timed Late Write · Fully coherent read and write pipelines · ZQ pin for programmable output drive strength ... Original
datasheet

29 pages,
241.03 Kb

GS82582T18/36E-400/375/333/300/250 GS82582T18/36E-400/375/333/300/250 abstract
datasheet frame
Abstract: Preliminary GS82582S18/36E-400/375/333/300/250 GS82582S18/36E-400/375/333/300/250 165-Bump BGA Commercial Temp Industrial Temp Features · Simultaneous Read and Write SigmaSIOTM Interface · JEDEC-standard pinout and package · Dual Double Data Rate interface · Byte Write controls sampled at data-in time · DLL circuitry for wide output data valid window and future frequency scaling · Burst of 2 Read and Write · 1.8 V +100/­100 mV core power supply · 1.5 V or 1.8 V HSTL Interface · Pipelined read operation · Fully coherent read and ... Original
datasheet

32 pages,
260.08 Kb

GS82582S18/36E-400/375/333/300/250 GS82582S18/36E-400/375/333/300/250 abstract
datasheet frame
Abstract: Preliminary GS82582D18/36E-400/375/333/300/250 GS82582D18/36E-400/375/333/300/250 165-Bump BGA Commercial Temp Industrial Temp Features · Simultaneous Read and Write SigmaQuadTM Interface · JEDEC-standard pinout and package · Dual Double Data Rate interface · Byte Write controls sampled at data-in time · Burst of 4 Read and Write · 1.8 V +100/­100 mV core power supply · 1.5 V or 1.8 V HSTL Interface · Pipelined read operation · Fully coherent read and write pipelines · ZQ pin for programmable output drive strength · IEEE 1149.1 ... Original
datasheet

28 pages,
251.82 Kb

GS82582D18/36E-400/375/333/300/250 GS82582D18/36E-400/375/333/300/250 abstract
datasheet frame
Abstract: Preliminary GS82582R18/36E-400/375/333/300/250 GS82582R18/36E-400/375/333/300/250 165-Bump BGA Commercial Temp Industrial Temp Features · Simultaneous Read and Write SigmaDDRTM Interface · Common I/O bus · JEDEC-standard pinout and package · Double Data Rate interface · Byte Write function · Burst of 4 Read and Write · 1.8 V +100/­100 mV core power supply · 1.5 V or 1.8 V HSTL Interface · Pipelined read operation with self-timed Late Write · Fully coherent read and write pipelines · ZQ pin for programmable output drive strength ... Original
datasheet

29 pages,
245.44 Kb

GS82582R18/36E-400/375/333/300/250 GS82582R18/36E-400/375/333/300/250 abstract
datasheet frame
Abstract: SDRAM Modules (2) Synchronous ORAM Modules Vcc= +3.3V±0.3V, Ta=0°C to +70°C Power Consumption max. (mW) Operating (B ur* mode) Power down M oda Organization (Wx&) Part Number Mounted Device Clock Access Access [Capacity) x Frequency CLK tank Time 1 Time 2 number max. max. (ns) max. (ns) «Package» (MHz) MB81117822A MB81117822A [16M]x9 MB81117822A MB81117822A [16M]x18 MB81117422A MB81117422A [16M]x18 100 84 67 100 84 67 100 84 67 100 84 67 100 84 67 100 84 67 100 84 67 100 84 67 100 84 67 100 84 67 ... OCR Scan
datasheet

1 pages,
87.82 Kb

datasheet abstract
datasheet frame
Abstract: Preliminary GS82582Q20/38E-500/450/400/375 GS82582Q20/38E-500/450/400/375 165-Bump BGA Commercial Temp Industrial Temp Features · 2.5 clock Latency · Simultaneous Read and Write SigmaQuadTM Interface · JEDEC-standard pinout and package · Dual Double Data Rate interface · Byte Write controls sampled at data-in time · On-Die Termination (ODT) on Data (D), Byte Write (BW), and Clock (K, K) inputs · Burst of 2 Read and Write · 1.8 V +100/­100 mV core power supply · 1.5 V or 1.8 V HSTL Interface · Pipelined read operation · Full ... Original
datasheet

25 pages,
196.54 Kb

GS82582Q20/38E-500/450/400/375 GS82582Q20/38E-500/450/400/375 abstract
datasheet frame
Abstract: Preliminary GS82582T20/38E-550/500/450/400 GS82582T20/38E-550/500/450/400 165-Bump BGA Commercial Temp Industrial Temp Features · 2.5 Clock Latency · Simultaneous Read and Write SigmaDDRTM Interface · JEDEC-standard pinout and package · Double Data Rate interface · Byte Write controls sampled at data-in time · Burst of 2 Read and Write · On-Die Termination (ODT) on Data (D), Byte Write (BW), and Clock (K, K) inputs · 1.8 V +100/­100 mV core power supply · 1.5 V or 1.8 V HSTL Interface · Pipelined read operation · Fully cohe ... Original
datasheet

25 pages,
202.47 Kb

GS82582T20/38E-550/500/450/400 GS82582T20/38E-550/500/450/400 abstract
datasheet frame
Abstract: Preliminary GS82582TT19/37E-450/400/375/333 GS82582TT19/37E-450/400/375/333 165-Bump BGA Commercial Temp Industrial Temp Features · 2.0 Clock Latency · Simultaneous Read and Write SigmaDDRTM Interface · Common I/O bus · JEDEC-standard pinout and package · Double Data Rate interface · Byte Write controls sampled at data-in time · Burst of 2 Read and Write · On-Die Termination (ODT) on Data (D), Byte Write (BW), and Clock (K, K) inputs · 1.8 V +100/­100 mV core power supply · 1.5 V or 1.8 V HSTL Interface · Pipelined read oper ... Original
datasheet

26 pages,
251.7 Kb

GS82582TT19/37E-450/400/375/333 GS82582TT19/37E-450/400/375/333 abstract
datasheet frame
Abstract: Preliminary GS82582TT20/38E-550/500/450/400 GS82582TT20/38E-550/500/450/400 165-Bump BGA Commercial Temp Industrial Temp Features · 2.5 Clock Latency · Simultaneous Read and Write SigmaDDRTM Interface · JEDEC-standard pinout and package · Double Data Rate interface · Byte Write controls sampled at data-in time · Burst of 2 Read and Write · Dual-Range On-Die Termination (ODT) on Data (D), Byte Write (BW), and Clock (K, K) inputs · 1.8 V +100/­100 mV core power supply · 1.5 V or 1.8 V HSTL Interface · Pipelined read operation ... Original
datasheet

25 pages,
254.05 Kb

GS82582TT20/38E-550/500/450/400 GS82582TT20/38E-550/500/450/400 abstract
datasheet frame