NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Part | Manufacturer | Description | Samples | Ordering |
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: 29F705 29F705 16-Word by 4-Bit 2-Port Random Access Memory Description The 29F705 29F705 is a 16-word by 4-bit Random Access Memory (RAM). It provides two separate output ports to allow simultaneous reading of any two 4-bit words, and has 3-state outputs for bussing. High-speed Version of 29705 16-Word by 4-Bit, 2-Port RAM Separate 4-Bit Latches on Each Output Port 3-State Outputs Logic Symbol 2 1 27 26 , high-speed 144-bit Random Access Memory (RAM) organized as a 16-word by 9-bit array. It contains output ... | OCR Scan |
1 pages, |
F211 29F705 29705 54F/74F211 29F705 abstract |
| Abstract: Register WR Write Reset Controller VBB Generator 16-Word 16-Word 16-Word 16-Word 16-Word 16-Word 16-Word 16-Word Sub-Register Sub-Register Sub-Register Sub-Register Sub-Register Sub-Register Sub-Register Sub-Register 16-Word 16-Word 16-Word 16-Word 16-Word 16-Word 16-Word 16-Word Sub-Register ... | Original |
14 pages, |
MSM514212 datasheet abstract |
| Abstract: Register WR Write Reset Controller VBB Generator 16-Word 16-Word 16-Word 16-Word 16-Word 16-Word 16-Word 16-Word Sub-Register Sub-Register Sub-Register Sub-Register Sub-Register Sub-Register Sub-Register Sub-Register 16-Word 16-Word 16-Word 16-Word 16-Word 16-Word 16-Word 16-Word Sub-Register ... | Original |
13 pages, |
MSM514212 J2L002817Y1 J2L002817Y1 abstract |
| Abstract: FPGA 16-Word by 8-Bit FIFO Introduction Description The AT6000 AT6000 Series field programmable , with a word width and depth tailored to specific design needs. A 16-word FIFO with each word being , Gate Array Application Note (continued) Figure 1. Architecture of 16 x 8 FIFO 16-Word by 8-Bit , can be asynchronously cleared. For this example, 16-word registers are linked together to form a 16-word FIFO, with each word being eight bits in length. The modular construction allows the ... | Original |
4 pages, |
FLIPFLOP SCHEMATIC AT6000 AT6005-2 AT6000 abstract |
| Abstract: Am29705A Am29705A 16-Word by 4-Bit 2-Port RAM ADVANCE INFORMATION DISTINCTIVE CHARACTERISTICS • Faster Version of the Am29705 Am29705 The Am29705A Am29705A has a design objective of a 30-40% speed improvement on the critical paths versus the Am29705 Am29705. • Plug-in Replacement for the Am29705 Am29705 The Am29705A Am29705A is a pin-for-pin replacement for the Am29705 Am29705. Systems using the Am29705 Am29705 will be able to use the Am29705A Am29705A instead with no design changes. LOGIC DIAGRAM A ADDRESS DECODER • • • • • • A 16-WORD BY 4-BIT B ADDRESS TWO-PORT RAM ... | OCR Scan |
1 pages, |
Am29705A Am29705 Am29705A abstract |
| Abstract: N-bit delay by storing data samples in a 16-word by N-bit wide SelectRAMTM. If more than 17 delay stages are required (16-word deep SelectRAMTM plus one register) multiple 16-word RAMs are used. Each 16-word, N-bit RAM requires N/2 XC4000 XC4000 series FPGA configurable logic blocks (CLBs) for even N and N/2 + ... | Original |
2 pages, |
XC4000E XC4000 datasheet abstract |
| Abstract: N-bit delay by storing data samples in a 16-word by N-bit wide SelectRAMTM. If more than 17 delay stages are required (16-word deep SelectRAMTM plus one register) multiple 16-word RAMs are used. Each 16-word, N-bit RAM requires N/2 XC4000 XC4000 series FPGA configurable logic blocks (CLBs) for even N and N/2 + ... | Original |
2 pages, |
datasheet abstract |
| Abstract: BCD-7-Segment-Decoder - 8 -8 10 DIP H,P 4733A* 16-word by 4-bit static RAM true data out. - 2.5 -2.5 - DIP K,Q 4734A* 16-word by 4-bit static RAM compi.data out 2.5 -2.5 - DIP K,Q 4737A 7 stage frequency divider for ... | OCR Scan |
1 pages, |
DIP CRYSTAL "Frequency Divider" 4734a frequency divider organs 4737a 4733a 7-stage frequency divider datasheet abstract |
| Abstract: 16-word by 8-bit FIFO Introduction Description The AT6000 AT6000 Series field programmable gate , word width and depth tailored to specific design needs. A 16-word FIFO with each word being eight , register. The word registers can be asynchronously cleared. For this example, 16-word registers are linked together to form a 16-word FIFO, with each word being eight bits in length. The modular construction , FIFO. The performance and utilization statistics for the 16-word by 8-bit FIFO are given in Table 1. ... | Original |
5 pages, |
AT6000 AT6005-2 AT6000 abstract |
| Abstract: FPGA 16-Word by 8-Bit FIFO Introduction Description The AT6000 AT6000 Series field programmable , with a word width and depth tailored to specific design needs. A 16-word FIFO with each word being , and utilization statistics for the 16-word by 8-bit FIFO are given in Table 1. This implementation is , be asynchronously cleared. For this example, 16-word registers are linked together to form a 16-word , 16-Word x 8-Bit FIFO MUX MUX 0 1 0 1 WRITE READ FD FD D0-7 D ORT Q D ... | Original |
4 pages, |
8 shift register by using D flip-flop shift register by using D flip-flop AT6000 AT6005-2 AT6000 abstract |
| Abstract: - 362 - SII >J â- t- « /*PD42102C PD42102C G-l -2 -3 MSM514212ZS-28 MSM514212ZS-28, -34, -50 /-il NEC ÃŒ+ 1135WX 1135WX g bits 5048WX 5048WX 8 bits Ft»« • I/O-fe^U- h X 8bitsflW • FIFOIJjfN • «-• • 5 V±10% - ipSSSiliti* y i (mAi X ûU(max) X 230, 200, 170,m„, ') - K • + -f 7 n> â- 9 4 i- (ns) 56,28,28(„lnl 880,880,880,max) 28, 34, 50,min) 1980,1980,1980,m.x, 70't-l?«- A(ns) 56,56,28,„,n, 880, 880, 880m„) 28, 34, 50,min) 1980,1980,1980, „„, • M A(ns> X X T ? -t X • ? -f A (ns) 40.21,21,m„, 28,34,40, IJ X ¡a* -20~ + 70'C ... | OCR Scan |
2 pages, |
MSM514212ZS-28 5048 PD42102C 1135WX 5048WX PD42102C abstract |
| Abstract: 16-Word 16-Word 16-Word 16-Word 16-Word 16-Word 16-Word 16-Word Sub-Register Sub-Register Sub-Register Sub-Register Sub-Register Sub-Register Sub-Register Sub-Register 16-Word 16-Word 16-Word 16-Word 16-Word 16-Word 16-Word 16-Word Sub-Register Sub-Register Sub-Register Sub-Register ... | Original |
16 pages, |
MSM514212 datasheet abstract |
| Abstract | Saved from | Date Saved | File Size | Type | Download |
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| - - Module: CAM_16WORDS - Design: CAM_Top - VHDL code: Hierarchical RTL - Instantiate block of a CAM 16 words (variable word witdh) - 1 word depth x "word_width" bits width - 1 clock _off library UNISIM; use UNISIM.VCOMPONENTS.ALL; - pragma translate_on entity CAM_16WORDS is generic = "00000000000000000" MATCH : out std_logic_vector(15 downto 0) ); end CAM_16WORDS; architecture CAM_16WORDS_arch of CAM_16WORDS is - - Components Declarations: component CAM_SRL16 SRL16 SRL16 SRL16 generic ( word www.datasheetarchive.com/download/93328315-995914ZC/xapp203.zip (CAM_16WORDS.vhd) |
Xilinx | 11/12/1999 | 59.69 Kb | ZIP | xapp203.zip |
| ; 4-bit x 16-word FIFO register General info The 74HC/HCT40105 74HC/HCT40105 74HC/HCT40105 74HC/HCT40105 are high-speed Si-gate CMOS Propagation delay(ns) Voltage 74HC40105D 74HC40105D 74HC40105D 74HC40105D FIFO registers 4-Bit x 16-Word FIFO Register CMOS 16 registers 4-Bit x 16-Word FIFO Register CMOS 16 Low SOT338-1 (SSOP16 SSOP16 SSOP16 SSOP16) Low Power or Battery Applications 15 5 Volts + 74HC40105N 74HC40105N 74HC40105N 74HC40105N FIFO registers 4-Bit x 16-Word FIFO Register CMOS 16 registers 4-Bit x 16-Word FIFO Register CMOS 16 Low SOT403-1 (TSSOP16 TSSOP16 TSSOP16 TSSOP16) Low Power or Battery www.datasheetarchive.com/files/philips/pip/74hc_hct40105_cnv_2.html |
Philips | 23/04/2003 | 9.31 Kb | HTML | 74hc_hct40105_cnv_2.html |
| // ///////////////////////////////////////////////////// `define nb_cam_16words 2 `define nb_cam_16wordsx2 `define addr_width 5 // `define nb_cam_16words 4 // `define nb_cam_16wordsx4 // `define addr_width 6 // `define nb_cam_16words 8 // `define nb_cam_16wordsx8 // `define addr_width 7 // `define nb_cam_16words 16 // `define nb_cam_16wordsx16 www.datasheetarchive.com/download/93328315-995914ZC/xapp203.zip (parameters.v) |
Xilinx | 11/12/1999 | 59.69 Kb | ZIP | xapp203.zip |
| Product listing for FIFO registers Products listing Product name PIP 74HC40105 74HC40105 74HC40105 74HC40105 - 4-bit x 16-word FIFO register 74HC7030 74HC7030 74HC7030 74HC7030 - 9-bit x 64-word FIFO register; 3-state 74HCT40105 74HCT40105 74HCT40105 74HCT40105 - 4-bit x 16-word FIFO register www.datasheetarchive.com/files/philips/catalog/listing/29361.html |
Philips | 25/04/2003 | 3.19 Kb | HTML | 29361.html |
| Product listing 74HC40105 74HC40105 74HC40105 74HC40105 - 4-bit x 16-word FIFO register 74HC7030 74HC7030 74HC7030 74HC7030 - 9-bit x 64-word FIFO register; 3-state 74HC7403 74HC7403 74HC7403 74HC7403 - 4-Bit x 64-word FIFO register; 3-state 74HCT40105 74HCT40105 74HCT40105 74HCT40105 - 4-bit x 16-word FIFO register 74HCT7030 74HCT7030 74HCT7030 74HCT7030 - 9-bit x 64-word FIFO register; 3-state 74HCT7403 74HCT7403 74HCT7403 74HCT7403 - 4-Bit x 64-word FIFO register; 3-state www.datasheetarchive.com/files/philips/catalog/listing/29361-v1.html |
Philips | 17/02/2002 | 2.53 Kb | HTML | 29361-v1.html |
| Product listing for FIFO registers Products listing Product name PIP 74HC40105 74HC40105 74HC40105 74HC40105 - 4-bit x 16-word FIFO register 74HC7030 74HC7030 74HC7030 74HC7030 - 9-bit x 64-word FIFO register; 3-state 74HCT40105 74HCT40105 74HCT40105 74HCT40105 - 4-bit x 16-word FIFO register www.datasheetarchive.com/files/philips/catalog/listing/29361-v2.html |
Philips | 01/06/2005 | 3.07 Kb | HTML | 29361-v2.html |
| ; = ; DA_LUTA.mem: A 16-word deep by 8-bit wide ROM memory. ; = ; TYPE ROM ; The memory is a ROM DEPTH 16 ; The memory is 16 words deep WIDTH 8 ; Each memory word is 8 bits wide ; ; SYMBOL NONE ; DEFAULT 0 ; www.datasheetarchive.com/download/68080759-960607ZC/fir.zip (DA_LUTA.MEM) |
Xilinx | 05/09/1996 | 358.4 Kb | ZIP | fir.zip |
| ; = ; DA_LUTB.mem: A 16-word deep by 8-bit wide ROM memory. ; = ; TYPE ROM ; The memory is a ROM DEPTH 16 ; The memory is 16 words deep WIDTH 8 ; Each memory word is 8 bits wide ; ; SYMBOL NONE ; DEFAULT 0 ; www.datasheetarchive.com/download/68080759-960607ZC/fir.zip (DA_LUTB.MEM) |
Xilinx | 05/09/1996 | 358.4 Kb | ZIP | fir.zip |
| ; = ; DA_LUTA.mem: A 16-word deep by 8-bit wide ROM memory. ; = ; TYPE ROM ; The memory is a ROM DEPTH 16 ; The memory is 16 words deep WIDTH 8 ; Each memory word is 8 bits wide ; ; SYMBOL NONE ; DEFAULT 0 ; www.datasheetarchive.com/download/20790077-985907ZC/wcd010b0.zip (DA_LUTA.MEM) |
Xilinx | 13/07/1998 | 301.01 Kb | ZIP | wcd010b0.zip |
| ; = ; DA_LUTB.mem: A 16-word deep by 8-bit wide ROM memory. ; = ; TYPE ROM ; The memory is a ROM DEPTH 16 ; The memory is 16 words deep WIDTH 8 ; Each memory word is 8 bits wide ; ; SYMBOL NONE ; DEFAULT 0 ; www.datasheetarchive.com/download/20790077-985907ZC/wcd010b0.zip (DA_LUTB.MEM) |
Xilinx | 13/07/1998 | 301.01 Kb | ZIP | wcd010b0.zip |