NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
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| Catalog Datasheet Results | Type | Document Tags |
| Abstract: Non-Symmetric, 16-Deep Time Skew Buffer March 23, 1998 Product Specification R Xilinx Inc. 2100 Logic Drive San Jose, CA 95124 Phone: +1 408-559-7778 Fax: +1 408-559-7114 E-mail , X8479 X8479 Figure 1: Core Schematic Diagram Non-Symmetric, 16-Deep Time Skew Buffer RAM Based , module is functionally identical to the "Non-symmetric 16-Deep Time Skew Buffer" but differ in terms of , : Parameterization Window Non-Symmetric, 16-Deep Time Skew Buffer Core Resource Utilization Ordering ... | Original |
4 pages, |
XC4000E CNT04RE counter schematic diagram CNT04RE abstract |
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| Abstract: Symmetric, 16-Deep Time Skew Buffer March 16, 1998 Product Specification R Xilinx Inc. 2100 Logic Drive San Jose, CA 95124 Phone: +1 408-559-7778 Fax: +1 408-559-7114 E-mail , :0] CE C SDI RESET X8479 X8479 Figure 1: Core Schematic Symbol Symmetric, 16-Deep Time Skew , functionally identical to the "Non-symmetric 16-Deep Time Slew Buffer" but differs in terms of its floor- , sales representative, or e-mail requests to coregen@xilinx.com. Symmetric, 16-Deep Time Skew Buffer ... | Original |
4 pages, |
XC4000E CNT04RE CNT04RE abstract |
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| Abstract: dsp_tsb16s.fm Page 85 Tuesday, July 14, 1998 7:45 AM Symmetric, 16-Deep Time Skew Buffer July 17, 1998 Product Specification R Xilinx Inc. 2100 Logic Drive San Jose, CA 95124 Phone , , 16-Deep Time Skew Buffer RAM Based Shift-Register RAM Based Shift-Register SDI D WE D WE , functionally identical to the "Non-symmetric 16-Deep Time Slew Buffer" but differs in terms of its floor- , 14, 1998 7:45 AM Symmetric, 16-Deep Time Skew Buffer Table 2: Bit Width versus CLB Count Bit ... | Original |
4 pages, |
XC4000E CNT04RE CNT04RE abstract |
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| Abstract: dsp_tsb16x.fm Page 77 Wednesday, July 1, 1998 9:24 AM Non-Symmetric, 16-Deep Time Skew Buffer July 17, 1998 Product Specification R Xilinx Inc. 2100 Logic Drive San Jose, CA 95124 Phone , Diagram dsp_tsb16x.fm Page 78 Wednesday, July 1, 1998 9:24 AM Non-Symmetric, 16-Deep Time Skew , identical to the "Non-symmetric 16-Deep Time Skew Buffer" but differ in terms of its floorplan or layout. , dsp_tsb16x.fm Page 80 Wednesday, July 1, 1998 9:24 AM Non-Symmetric, 16-Deep Time Skew Buffer Core ... | Original |
4 pages, |
XC4000E CNT04RE CNT04RE abstract |
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| Abstract: the LUT between shift cycles. The waveform in Figure 2 assumes that a 16-deep shift register is , Registers A 16-deep by eight-bit wide shift register requires eight LUTs, which is just two Virtext ... | Original |
2 pages, |
Shift Register" 16 BIT SHIFT REGISTER "Shift Register" 7 bit shift register snoop 9 TAP LUT shift register cascade shift register shift register by using D flip-flop datasheet abstract |
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| Abstract: longer than for the 16-deep FIFO, and the control logic generating FULL and EMPTY is more complex, with , Outputs: R3 R2 R1 R0 Write Counter Outputs: W3 W2 W1 W0 Figure 3: 16-Deep FIFO, Read Counter or Write , : 16-Deep FIFO, Synchronous Control When all words written into the FIFO have been read, the EMPTY flag , : 16-Deep FIFO, Asynchronous Control XAPP 051 September 17,1996 (Version 2.0) 5 Synchronous and , : WARNING: THESE ARE UNTESTED DESIGNS. · · · · 16-deep FIFO with common clock 16-deep FIFO with ... | Original |
12 pages, |
XC4000XL dual port fifo design code LFSR counter 64-deep XC4000 XC4000E XC4000EX gray code 2-bit down counter LFSR johnson counter synchronous fifo datasheet abstract |
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| Abstract: 3.3V 64-BIT 64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT IDT49C3466 IDT49C3466 ADVANCE INFORMATION Integrated Device Technology, Inc. FEATURES: DESCRIPTION: · 64-bit wide Flow-thruEDCTM · Separate System and Memory Data Input/Output Buses · - Error Detect Time: 20ns - Error Correct Time: 22ns · Corrects all single bit errors; Detects all double bit errors and some multiple bit errors · Configurable 16-deep bus read/write FIFOs with flags · Simultaneous check bit generation and correction of memory ... | Original |
1 pages, |
IDT49C3466 generator check 9038 7 bit hamming code 3 bit error detector error detection codes 64-BIT 64-BIT abstract |
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| Abstract: 7-deep or single 14-deep (with feed-through and 0) registers â- 29F525-Dual 8-deep or single 16-deep ... | OCR Scan |
1 pages, |
29F524 29F525 29F524/525 29F524 abstract |
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| Abstract: queue (PCI Express-to-PCI-X transactions) · Caching with a 16-deep, 32-byte I/O cache for PCI to main ... | Original |
2 pages, |
1000BASE-X BCM5714 BCM5714 abstract |
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| Abstract: Express-to-PCI-X non-posted request queue (PCI Express-to-PCI-X transactions) · Caching with a 16-deep, 32-byte I ... | Original |
2 pages, |
BCM5714 BCM5714C BCM5714C abstract |
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| Abstract: OTL 23VC0SMA 23VC0SMA 2X SMA FEMALE REVISIONS DESCRIPTION ECN 15129, RELEASE GROUND TERMINAL 4X 2-56 UNC-2B X .16 DEEP 3/8/07 DM 3/8/D7 CAUTION THIS ASSEMBLY CONTAINS PARTS SENSITIVE TO DAMAGE BY ELECTROSTATIC DISCHARGE (ESD). USE ESD PRECAUTIONARY PROCEDURES WHEN TOUCHING, REMOVING OR INSERTING. DRAWN CATE ADAM SIDLE 3/8/07 CHECKED DATE RAS 3/8/07 ENGINEERING DATE PR 3/8/07 MANUFACTURING DATE QUALITY DATE DM 3/8/07 SjSMMtkr PHILADELPHIA OPERATIONS • gjgHig • 2707 BLACK LAKE PLACE, tylCROWAVEE PHILADELPH ... | OCR Scan |
1 pages, |
23VC0SMA 23VC0SMA abstract |
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| Abstract: 1/32 Chamfer .1245 Dia. ±.004 +.000 -.001 4-40 1/4 1/32 Wide x .005 Deep Undercut 1-1/2 Threads To Minor Dia. ±.005 1/16 Wide 1/8 5/32 .3125 ±.010 +.002 -.000 Chamfer 1/16 Deep x RAF ELECTRONIC HARDWARE 95 SILVERMINE RD. SEYMOUR, CT. 06483 TEL: { 203 } 888-2133 FAX: { 203 } 888-9860 WEB: http://www.rafhdwe.com DRAWING NOT TO SCALE DRAWN BY : DATE a Division of MW Industries ,Inc. 10/01/09 DATE GARY HUPPRICH CHECKED BY : MATERIAL FINISH TOLERANC ... | Original |
1 pages, |
datasheet abstract |
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| Abstract: .50 MODEL NO. 2X .38 OTI_H 6 REVISIONS REV DESCRIPTION DATE APPROVED SMA FEMALE - ECN 11236, RELEASE 2/6/02 RA 2/6/02 EMI FILTER FEED THRU GROUND TERMINAL tJ-(DB -ï 2X .3ÃŽ-J .12-.33 -^ .095 4X 2-56 UNC-2B X .16 DEEP MATERIAL: CAUTION /N THIS ASSEMBLY CONTAINS PARTS >Jv SENSITIVE TO DAMAGE BY ELECTROSTATIC DISCHARGE (ESD). USE ESD PRECAUTIONARY PROCEDURES WHEN TOUCHING, REMOVING OR INSERTING. FINISH: DIMENSIONS: INCHES TOLERANCE DEC. ANG .XX +/- 01 â- XXX +/- 005 •X DEG. DRAWN DATE AD ... | OCR Scan |
1 pages, |
UNC-2B 2-56 datasheet abstract |
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| Abstract: MODEL NO. 2X .3ii - 1 i i 1.00 ran .82- / xxxxx X IN OUT ® X>0< X® © > DC OTI_H1 REVISIONS REV DESCRIPTION DATE APPROVED FEMALE - ECN 10906, RELEASE 8/15/01 RA 8/15/01 A ECN 11151, DIM UPDATE 12/12/01 RA 12/12/01 -DATE CODE EMI FILTER FEED THRU GROUND TERMINAL 4X 2-56 UNC-2B X .16 DEEP MATERIAL: CAUTION THIS ASSEMBLY CONTAINS PARTS >Jy SENSITIVE TO DAMAGE BY ELECTROSTATIC DISCHARGE (ESD). USE ESD PRECAUTIONARY PROCEDURES WHEN TOUCHING, REMOVING OR INSERTING. FINISH: NONE DIMENSIONS: I ... | OCR Scan |
1 pages, |
datasheet abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
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| /17/98 DSP Building Blocks Non-Symmetric 16-Deep Time Skew Buffer Symmetric 16-Deep Time Skew Buffer Non-Symmetric 32-Deep Time Skew Buffer Sine www.datasheetarchive.com/files/xilinx/docs/rp00025/rp025dc.htm |
Xilinx | 29/02/2000 | 14.31 Kb | HTM | rp025dc.htm |
| 2/8/98 Non-Symmetric 16-Deep Time Skew Buffer LogiCORE Xilinx 2/8/98 Symmetric 16-Deep Time Skew Buffer LogiCORE Xilinx www.datasheetarchive.com/files/xilinx/docs/wcd0000d/wcd00d6a-v1.htm |
Xilinx | 17/07/1998 | 11.14 Kb | HTM | wcd00d6a-v1.htm |
| -Symmetric 16-Deep Time Skew Buffer LogiCORE Xilinx 7 /17/98 Symmetric 16-Deep Time Skew Buffer LogiCORE Xilinx 7 www.datasheetarchive.com/files/xilinx/docs/wcd00010/wcd01024.htm |
Xilinx | 16/02/1999 | 10.1 Kb | HTM | wcd01024.htm |
| -Symmetric 16-Deep Time Skew Buffer Symmetric 16-Deep Time Skew Buffer Non www.datasheetarchive.com/files/xilinx/docs/wcd00010/wcd01092.htm |
Xilinx | 16/02/1999 | 11.2 Kb | HTM | wcd01092.htm |
| Non-Symmetric 16-Deep Time Skew Buffer LogiCORE Xilinx 7 /17/98 Symmetric 16-Deep Time Skew Buffer LogiCORE Xilinx 7 www.datasheetarchive.com/files/xilinx/docs/rp00005/rp00588.htm |
Xilinx | 29/02/2000 | 20.59 Kb | HTM | rp00588.htm |
| Date Source Non-Symmetric 16-Deep Time Skew Buffer 4K 7/17/98 Xilinx Symmetric 16-Deep www.datasheetarchive.com/files/xilinx/docs/rp00003/rp003e0.htm |
Xilinx | 29/02/2000 | 26.77 Kb | HTM | rp003e0.htm |
| LCANET,6 PROG, MEMGEN, beta-5.2.0a, "16-deep by 4-wide ROM macro called 'promdata'" PART, 4005pg156 PWR,0,GND PIN,A0,I,A0 PIN,A1,I,A1 PIN,A2,I,A2 PIN,A3,I,A3 PIN,O,O,O0 END PIN,A0,I,A0 PIN,A1,I,A1 PIN,A2,I,A2 PIN,A3,I,A3 PIN,O,O,O1 END PIN,A0,I,A0 PIN,A1,I,A1 PIN,A2,I,A2 PIN,A3,I,A3 PIN,O,O,O2 END SYM,BANK0-03 BANK0-03 BANK0-03 BANK0-03,ROM,INIT=FFF0,=NEQGATES:16,LIBVER www.datasheetarchive.com/files/xilinx/bbs/swhlp/synopsys/vhdl/rom_memg/promdata.xnf |
Xilinx | 31/05/1995 | 0.56 Kb | XNF | promdata.xnf |
| RAM16X4 RAM16X4 RAM16X4 RAM16X4 RAM16X4 RAM16X4 RAM16X4 RAM16X4 16-Deep by 4-Wide Static RAM XC3000 XC3000 XC3000 XC3000 XC4000E XC4000E XC4000E XC4000E XC4000X XC4000X XC4000X XC4000X XC5200 XC5200 XC5200 XC5200 XC9000 XC9000 XC9000 XC9000 Spartan SpartanXL Virtex N/A Macro Macro N/A N/A N/A N/A N/A RAM16X4 RAM16X4 RAM16X4 RAM16X4 is a 16-word by 4-bit static read-write random access memory. When the write enable (WE) is High, the data on data inputs (D3 - D0) is loaded into the word selected by the 4-bit address (A3 - A0). The data outputs (O3 - O0) reflect the selected (addressed) word www.datasheetarchive.com/files/xilinx/docs/wcd00041/wcd04125.htm |
Xilinx | 16/02/1999 | 3.28 Kb | HTM | wcd04125.htm |
| RAM16X8 RAM16X8 RAM16X8 RAM16X8 RAM16X8 RAM16X8 RAM16X8 RAM16X8 16-Deep by 8-Wide Static RAM XC3000 XC3000 XC3000 XC3000 XC4000E XC4000E XC4000E XC4000E XC4000X XC4000X XC4000X XC4000X XC5200 XC5200 XC5200 XC5200 XC9000 XC9000 XC9000 XC9000 Spartan SpartanXL Virtex N/A Macro Macro N/A N/A N/A N/A N/A RAM16X8 RAM16X8 RAM16X8 RAM16X8 is a 16-word by 8-bit static read-write random access memory. When the write enable (WE) is High, the data on data inputs (D7 - D0) is loaded into the word selected by the 4-bit address (A3 - A0). The data outputs (O7 - O0) reflect the selected (addressed) word www.datasheetarchive.com/files/xilinx/docs/wcd00041/wcd04128.htm |
Xilinx | 16/02/1999 | 3.28 Kb | HTM | wcd04128.htm |
| ROM16X1 ROM16X1 ROM16X1 ROM16X1 ROM16X1 ROM16X1 ROM16X1 ROM16X1 16-Deep by 1-Wide ROM XC3000 XC3000 XC3000 XC3000 XC4000E XC4000E XC4000E XC4000E XC4000X XC4000X XC4000X XC4000X XC5200 XC5200 XC5200 XC5200 XC9000 XC9000 XC9000 XC9000 Spartan SpartanXL Virtex N/A Primitive Primitive N/A N/A Primitive Primitive N/A ROM16X1 ROM16X1 ROM16X1 ROM16X1 is a 16-word by 1-bit read-only memory. The data output (O) reflects the word selected by the 4-bit address (A3 - A0). The ROM is initialized to a known value during configuration with the INIT= value parameter. The value consists of four hexadecimal www.datasheetarchive.com/files/xilinx/docs/wcd00041/wcd04136.htm |
Xilinx | 16/02/1999 | 2.28 Kb | HTM | wcd04136.htm |