NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: Respective Manufacturer MITSUBISHI LSIs MH25616PNA-10 MH25616PNA-10,-12 41943Q4-BIT 41943Q4-BIT(262144-WORD 262144-WORD BY 16-BlT)PSEUPO-PSEUPO , MITSUBISHI LSIs MH25616PNA-10 MH25616PNA-10,-12 41943Q4-BIT 41943Q4-BIT(262144-WORD 262144-WORD BY 16-BlT)PSEUPO-PSEUPO STATIC RAM MODULE , LSIs MH25616PNA-10 MH25616PNA-10,-12 41943Q4-BIT 41943Q4-BIT(262144-WORD 262144-WORD BY 16-BlT)PSEUPO-PSEUPO STATIC RAM MODULE SWITCHING , MITSUBISHI LSIs MH25616PNA-10 MH25616PNA-10,-12 41943Q4-BIT 41943Q4-BIT(262144-WORD 262144-WORD BY 16-BlT)PSEUPO-PSEUPO STATIC RAM MODULE TIMING , Manufacturer MITSUBISHI LSIs MH25616PNA-10 MH25616PNA-10,-12 41943Q4-BIT 41943Q4-BIT(262144-WORD 262144-WORD BY 16-BlT)PSEUPO-PSEUPO STATIC RAM ... | OCR Scan |
7 pages, |
oneDRAM MH25616PNA-12 MH25616PNA-10 44256 ram 44256 3DA7 16-Blt 44256 dram 4194304-BIT 262144-W0RD 16-BIT MH25616PNA MH25616PNA-10 abstract |
| Abstract: operations. • 16-Blt Parallel-to-Serial Conversion • 16-Blt Serial-In, Serial-Out • Chip Select Control • ... | OCR Scan |
3 pages, |
16-Blt 54F/74F676 P0-P15 54F/74F676 abstract |
| Abstract: register • Programmable control registe^ • On-chip bit comparator • 8- or 16-blt selectable d§ • 48-pin ... | OCR Scan |
1 pages, |
CRC-16 pin CRC-16 ccitt CRC-16 crc 16 74LS1812 16-Blt GGS03G4 T-7S-37-0S GGS03G4 abstract |
| Abstract: prevents both shifting and parallel loading. • Serial-to-Parallel Converter • 16-Blt Serial I/O Shift Registerd • 16-Blt Parallel-Out Storage Register • Recirculating Parallel Transfer • Expandable for ... | OCR Scan |
4 pages, |
Q0-Q15 16-Blt 54F/74F675 54F/74F675 abstract |
| Abstract: PRODUCT PREVIEW Features â- Conforms to IEEE 802.3 standard for Ethernet (10BASE5 10BASE5), Cheapernet (10BASE2 10BASE2) and Twisted Pair (10BASE-T 10BASE-T). â- High performance, low power CMOS technology. â- Connects directly to 8020 and 8023 Manchester Converters (MCCTU). U Pin and function compatible with the 8005 Advanced Ethernet Data Link Controller (AEDLCâ„¢). m Fast bus cycle to support 16-blt, 12Mhz ISA bus architecture. â- , /sec minimum In 8-blt and 16-blt mode. â- Group address packet reception. â- Sleep mode to conserve ... | OCR Scan |
4 pages, |
uses of 74ls245 to speed up buses 10BASE5 16-Blt 16-BYTE 64kx4 DRAM 74LS245 10BASE2 74ls245 intel 80C04 FDBA 74LS245 buffer manchester code 10BASE-T 10BASE5 abstract |
| Abstract: Timers 16-blt 1 8-blt (with B-blt prescaler) 3 Input capture 1 (shared with 1 B-blt timer) Output compare - | 2 (shared with 16-blt timer) Serial I/O Clock-synchronized/UART shared 1 UART , (shared with 16-blt timer) Output compare 2 (shared wtth 16-bit timer) Serial I/O ... | OCR Scan |
6 pages, |
Sunny Oscillators R0E000080KCE00 Renesas R8C ADC datasheet abstract |
| Abstract: Edqe-Trlqqered Fllp-Flop 5479/C 5479/C.A 10 84 Gated Full Adder 5480/C 5480/C,A . 10 105 16-Blt Memory 5481/C 5481/C.A - - 4-Blt Binary Full Adder 5483/E 5483/E,F 10 390 16-Blt Scratch Pad Memory Cell 5484/E 5484/E.F • 250 4-Blt Magnitude ... | OCR Scan |
4 pages, |
Multivibrator 7400 motorola 5426 7400 family TTL 54181 54120 TTL 5400 motorola 5413 motorola jk 7400 bistable multivibrator datasheet abstract |
| Abstract: RD085 codes used in generating the 16-blt Frame Check Sequence (FCS) that Is appended to the end of the data ... | OCR Scan |
26 pages, |
55ag 6b022 HPC16400/HPC36400/HPC46400 HPC16400 HPC1640Q HPC16400/HPC36400/HPC46400 abstract |
| Abstract: INTEGRATE» DEVICE IME D â- MÃ-SS771 -SS771 DGD3Ã-47 2 16-BIT 16-BIT CMOS ^ ' MULTILEVEL PIPELINE REGISTERS PRÈLIMINARY IDT 7320 IDT7321 IDT7321 '' T- V6 09-09 FEATURES: • IDT7320 IDT7320: Efght 16-blt hlgh-speed pipeline reglsters • IDT7321 IDT7321: Severi 16-bit hlgh-speed pipeline reglsters plus a direct feed-through path • 12ns to 20ns , 16-blt reglsters whlch can be configured as one 8-level, two 4-level, four 2-ievel or elght 1-level pipeline registers. - The IDT7321 IDT7321 contains seven 16-blt reglsters and a direct feed-through path. The seven ... | OCR Scan |
6 pages, |
SS771 16-BIT IDT7321 IDT7320 SS771 abstract |
| Abstract: INTEGRATE» DEVICE 14E D .4Ã-5S771 -5S771 0003053 fi â- 16-BIT 16-BIT CMOS PRELIMINARY CASCADABLE ALU IDT 7381 IDT7383 IDT7383 integrateci DevfceTèchnoipsy Ine FEATURES: • High-performance 16-blt Arithmatic Logic Unlt (ALU) • 20ns to 55ns clocked ALU operations • Ideal for radar, sonar or Image processing appllcations • IDT7381 IDT7381: - 54/74S381 54/74S381 instructlon set (8 functions) - Replaces Gould S614381 S614381 or Logic Devices L4C381 L4C381 - , (ALUs). Both three-bus devlces have two Input reglsters, ultra-fast 16-blt ALUs and 16-blt output ... | OCR Scan |
8 pages, |
S614381 7381L20 5S771 16-BIT IDT7383 5S771 abstract |
| Abstract: cascade-connected. Timer Counter 4 :16-bit x 1 (Square-wave/16-blt PWM Output, Event Count, Synchronous Output Event ... | OCR Scan |
2 pages, |
QFP084-P-1818E MN101C08A LQFP080-P-1414A 32K/48K MN101C08A abstract |
| Abstract: Scans-0021704 'LVT16543 LVT16543 is a 16-blt registered transceiver designed for low-voltage (3.3 V) Vcc operation, but with the , transceivers or one 16-blt transceiver. Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA ... | OCR Scan |
7 pages, |
SN74LVT16543 LVT16543 8C12 209m 16-BIT JESD-17 SN74LVT16543 abstract |
| Abstract | Saved from | Date Saved | File Size | Type | Download |
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| 8300h_cbranch:16 bge h8300h_cbranch:16 blt h8300h_cbranch:16 bgt h8300h_cbranch:16 ble h8300h www.datasheetarchive.com/download/46713865-484035ZC/gnu_tsc.bz2 |
Motorola | 16/02/2000 | 22032.79 Kb | BZ2 | gnu_tsc.bz2 |
| 8300s_cbranch:16 bge h8300s_cbranch:16 blt h8300s_cbranch:16 bgt h8300s_cbranch:16 ble h8300s www.datasheetarchive.com/download/46713865-484035ZC/gnu_tsc.bz2 |
Motorola | 16/02/2000 | 22032.79 Kb | BZ2 | gnu_tsc.bz2 |
| cnt,16 blt d,$largedivisor $loop1: cmplt n0,0,tmp addq n1,n1,n1 bis n1,tmp,n1 addq n0,n0,n0 www.datasheetarchive.com/download/79262054-393174ZC/mplabc30v2_05.tgz |
Microchip | 09/11/2006 | 27045.95 Kb | TGZ | mplabc30v2_05.tgz |
| CMPI.B #SZ_BF,D2 ; Number of data in a buffer is 16 BLT NxtBT ; Next Byte DBRA D1,NxtBF ; Next www.datasheetarchive.com/files/motorola/mot-cd's/cdronetcom-d/toolbox/68302/hdlc_asm.txt |
Motorola | 03/08/1998 | 12.29 Kb | TXT | hdlc_asm.txt |
| /* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */ /* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */ /* ELIGIBILITY FOR ANY PURPOSES. */ /* (C) Fujitsu Microelectronics Europe GmbH */ ._LANGUAGE C_FFMC-16 FFMC-16 FFMC-16 FFMC-16, N, M, N ._FILE " ", 0 ._FILE " www.datasheetarchive.com/download/89280039-118927ZC/90580_bootloader_uart_async-v10.zip (monitor.asm) |
Fujitsu | 01/02/2012 | 140.93 Kb | ZIP | 90580_bootloader_uart_async-v10.zip |
| # # lfptop.s: # This file is appended to the top of the 060ILSP 060ILSP 060ILSP 060ILSP package # and contains the entry points into the package. The user, in # effect, branches to one of the branch table entries located here. # bra.l _facoss_ short 0x0000 bra.l _facosd_ short 0x0000 bra.l _facosx_ short 0x0000 bra.l _fasins_ short 0x0000 bra.l _fasind_ short 0x0000 bra.l _fasinx_ short 0x0000 bra.l _fatans_ short 0x0000 bra.l _fatand_ short 0x0000 bra.l _fatanx_ short 0 www.datasheetarchive.com/download/7797367-483064ZC/060p1_01.zip (FPLSP.S) |
Motorola | 13/09/1996 | 431.74 Kb | ZIP | 060p1_01.zip |
| # # lfptop.s: # This file is appended to the top of the 060ILSP 060ILSP 060ILSP 060ILSP package # and contains the entry points into the package. The user, in # effect, branches to one of the branch table entries located here. # bra.l _facoss_ short 0x0000 bra.l _facosd_ short 0x0000 bra.l _facosx_ short 0x0000 bra.l _fasins_ short 0x0000 bra.l _fasind_ short 0x0000 bra.l _fasinx_ short 0x0000 bra.l _fatans_ short 0x0000 bra.l _fatand_ short 0x0000 bra.l _fatanx_ short 0 www.datasheetarchive.com/download/9175754-313964ZC/060p101zip.zip (FPLSP.S) |
KyteLabs | 11/06/2002 | 431.74 Kb | ZIP | 060p101zip.zip |
| # # freal.s: # This file is appended to the top of the 060FPSP 060FPSP 060FPSP 060FPSP package # and contains the entry points into the package. The user, in # effect, branches to one of the branch table entries located # after _060FPSP 060FPSP 060FPSP 060FPSP_TABLE. # Also, subroutine stubs exist in this file (_fpsp_done for # example) that are referenced by the FPSP package itself in order # to call a given routine. The stub routine actually performs the # callout. The FPSP code does a "bsr" to the stub routine. This # extra lay www.datasheetarchive.com/download/7797367-483064ZC/060p1_01.zip (FPSP.S) |
Motorola | 13/09/1996 | 431.74 Kb | ZIP | 060p1_01.zip |
| # # freal.s: # This file is appended to the top of the 060FPSP 060FPSP 060FPSP 060FPSP package # and contains the entry points into the package. The user, in # effect, branches to one of the branch table entries located # after _060FPSP 060FPSP 060FPSP 060FPSP_TABLE. # Also, subroutine stubs exist in this file (_fpsp_done for # example) that are referenced by the FPSP package itself in order # to call a given routine. The stub routine actually performs the # callout. The FPSP code does a "bsr" to the stub routine. This # extra lay www.datasheetarchive.com/download/9175754-313964ZC/060p101zip.zip (FPSP.S) |
KyteLabs | 11/06/2002 | 431.74 Kb | ZIP | 060p101zip.zip |
| Copyright (c) 2004-2005 Advanced Micro Devices, Inc. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The ab www.datasheetarchive.com/download/55429351-72918ZC/bsp_linux_2.6.11_board_support_package.zip (Graphics_LinuxXorg_Common_03.00.0101.patch) |
Digital Logic | 18/06/2007 | 954.19 Kb | ZIP | bsp_linux_2.6.11_board_support_package.zip |