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UCD3138064RMHT Texas Instruments Highly-Integrated Digital Controller for Isolated Power with 64kB Memory 40-WQFN -40 to 125 visit Texas Instruments Buy
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MSP430F5514IZQE Texas Instruments 16-Bit Ultra-Low-Power Microcontroller, USB, 64KB Flash, 4KB RAM, 2 USCIs, 32Bit HW MPY 80-BGA MICROSTAR JUNIOR -40 to 85 visit Texas Instruments

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16/32/64KB

Catalog Datasheet MFG & Type PDF Document Tags

ATMEL 644

Abstract: atmel 344 l 8- /16- /32- /64-KB Flash memory l microcontrollers F o r In-system Programming , ffered in 8- /16- /32- / and Using T89C51RD2 or T89C51AC2, 64-KB , the on-chip Flash designers , 32 kHz and ensure a 10-year data retention oscillator, or the 10-bit A/D Converter guarantee , r n e e d s UART l - - 32 kHz oscillator l A/D Converter 256 bytes , 16-bit timer ISP Flash Program Memory X2 mode Part number EEPROM Flash Products -
Atmel
Original
80C51 T89C51IB2 T89C51IC2 ATMEL 644 atmel 344 PDIL40 VQFP44 package C51-03
Abstract: Embedded Trace Macrocell 16/32/64KB SRAM Vectored Vecto ed Interrupt Controller AHB Interfa face 16/32-bit ARM7TDMI-S Core APB Interface Power Management RTC, WDT, PLL Capture/Compare , Memory Flash RAM 128 kB 16 kB 128 kB 16 kB 128 kB 32 kB 128 kB 32 kB 128 kB 64 kB 128 kB 64 , LPC2104/2105/2106 32-bit performance in a tiny package Semiconductors Description The , peripherals.The tiny body-size of 7 mm x 7 mm for the LQFP-48 package is unique to a full featured 32 Philips Semiconductors
Original
LPC2104BBD48 LPC2104FBD48 LPC2105BBD48 LPC2105FBD48 LPC2106BBD48 LPC2106FBD48

embedded powerpc 440

Abstract: 440x4 ) Voltage 1.8V +/- 8% I- and D-Cache Various sizes available (0, 8, 16, 32, 64KB) WC TC , throughput · 24 DSP instructions (16 x 16 + 32) Memory Management Unit · Separate I- and D-side micro-TLBs , · Supports 8, 16, 32, and 64K cache · Write-back, write-through, nonblocking operation · Cache , applications Highlights The PowerPC 440 core is a dual-issue, superscalar, 32-bit RISC CPU core providing , · 32 x 32 general purpose registers · 7-stage pipeline, dual issue · Dynamic branch prediction ·
IBM
Original
embedded powerpc 440 440x4 powerpc dhrystone mips SA-27E 550MH 1KB-256MB 07GK10311700 GK10-3117-00

eurocom

Abstract: stanag 4380 1 0 1 Facility External clocks Internal, 64kb/s = f ÷ 16 Internal, 32kb/s = f ÷ 32 Internal , MHz FX619 PARAMETERS MEASURED HERE REGULATED POWER SUPPLY 16/32/64kb/s EUROCOM ANALOGUE , programmed to 16, 32 or 64 k bits/second from an internal clock generator or may be externally applied in , will yield exactly 16/32/64 kb/s data clock rates. Xtal circuitry shown is in accordance with CML , ,16 13 14 17 14 15 18,19 15 16 20 Powersave : A logical '0' at this pin
CML Microcircuits
Original
eurocom stanag 4380 eurocom d/1 BS9450 FX619J FX619M1 D/619/6

MIL-STD-188-113

Abstract: power supply Decoder programmed to 16, 32 or 64 k bits/second from an internal clock generator or may be externally applied in , Clock Mode 2 0 1 0 1 Facility External clocks Internal, 64kb/s = f ÷ 16 Internal, 32kb/s = f ÷ , MEASURED HERE REGULATED POWER SUPPLY DECODER DATA CLOCK MODE CLOCKS 1.024 MHz 16/32 , A 1.024 MHz Xtal/clock input will yield exactly 16/32/64 kb/s data clock X1 rates. Xtal circuitry , logical '1' the codec operates normally. Internal 1M Pullup. 16 Decoder Force Idle : A logical '0'
CML Microcircuits
Original
FX629 FX629J MIL-STD-188-113 power supply Decoder cvsd DELTA MODULATION ENCODER AND DECODER D/629/2

FX619

Abstract: eurocom 1 0 1 Facility External clocks Internal, 64kb/s = f ÷ 16 Internal, 32kb/s = f ÷ 32 Internal , MHz FX619 PARAMETERS MEASURED HERE REGULATED POWER SUPPLY 16/32/64kb/s EUROCOM ANALOGUE , programmed to 16, 32 or 64 k bits/second from an internal clock generator or may be externally applied in , will yield exactly 16/32/64 kb/s data clock rates. Xtal circuitry shown is in accordance with CML , ,16 13 14 17 14 15 18,19 15 16 20 Powersave : A logical '0' at this pin
CML Microcircuits
Original
FX619L1 FX619L2 stanag
Abstract: External clocks Internal, 64kb/s = f 16 internal, 32kb/s = f -i- 32 Internal, 16kb/s = f + 64 Clock , M O U TP U T & & BUFFER) B UFFER ) DATA C LOC K MODE 16/32/64kb/s CLOCKS 1.0 2 , are incorporated on-chip. Sampling clock rates can be programmed to 16, 32 or 64 k bits/second from , . VD decoupling capacitor. D A 1.024 MHz Xtal/clock input will yield exactly 16/32/64 kb/s data clock , 12 15,16 23 7 4 3 7 b - D0D 0 33 5 CO NS U M E R 1 â  CMCR MICROCIRCUITS No -
OCR Scan
D/629/1
Abstract: Atmel ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P 8-bit Atmel Microcontroller with 16/32/64KB , (OC1A/PCINT13) PB5 15 34 PG1 (OC1B/PCINT14) PB6 16 33 PG0 Note: PD7 32 (DO , â'" 130 powerful instructions â'" most single clock cycle execution â'" 32 × 8 general purpose , Peripheral Features â'" Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode â'" One 16 , ) PJ1 14 62 DNC DNC 15 61 DNC DNC 16 60 DNC DNC 17 59 DNC Atmel
Original
165A/PA/325A/PA/3250A/PA/645A/P/6450A/P 16/32/64KB 16MIPS 165PA/645P 20MIPS 165A/AT

MARKING HRA

Abstract: 4kw marking 64 Kbyte/32 Kword Bank B + Bank C 48 × 64 Kbyte/32 Kword 3 16 Mbit Bank A + Bank B 8 × 8 Kbyte/4 Kword + 16 Mbit 31 × 64 Kbyte/32 Kword Bank C + Bank D 32 × 64 Kbyte/32 , SRAM CMOS 32M (×16) FLASH MEMORY & 4M (×16) STATIC RAM MB84VD22180FA-70/MB84VD22190FA , to A20 RY/BY A0 to A20 WP/ACC RESET CEf 32 M bit Flash Memory DQ0 to DQ15 DQ0 to , 32 K words. · Individual-sector, multiple-sector, or bulk-erase capability. Bank A Bank B
Fujitsu
Original
MARKING HRA 4kw marking MARKING SA70 MB84VD22180FA-70/MB84VD22190FA-70 MB84VD22180FM-70/MB84VD22190FM-70 BGA-59P-M02

A25L064

Abstract: 25L80 Part Pages Number A25L05P 512K-bit 64KB x 1 256 4,4,8,16,32-KB A25L10P 1M-bit 128KB x 1 512 1x64KB + 4,4,8,16,32-KB A25L20P 2M-bit 256KB x 1 1024 3x64KB + 4,4,8,16,32-KB A25L40P 4M-bit 512KB x 1 2048 7x64KB + 4,4,8,16,32-KB A25L80P 8M-bit 1024KB x1 4096 15x64KB + 4,4,8,16,32-KB A25L16P 16M-bit 2048KB x 1 8192 31x64KB + 4,4,8,16,32-KB New SPI Flash (4KByte Uniform Sectors , 32768 Erasable Blocks 1 x 64KB 2 x 64KB 4 x 64KB 8 x 64KB 16 x 64KB 32 x 64KB 64 x 64KB 128
AMIC Technology
Original
A25L016 A25L064 25L80 a25l032 25L40 25L04 512K- 32-KB A25L512 A25L010 A25L020 A25L040

SA147

Abstract: SA209 FlexBankTM *1 Bank A: 16 Mbit (4 KW × 8 and 32 KW × 31) Bank B: 48 Mbit (32 KW × 96) Bank C: 48 Mbit (32 KW × 96) Bank D: 16 Mbit (4 KW × 8 and 32 KW × 31) · High Performance Page Mode 20 ns maximum page access , Virtual Banks Combination Bank 1 Bank Splits Volume Combination Sector Size 8 × 4 Kword + 31 x 32 Kword 16 , A + Bank C + Bank D Bank C + Bank D Sector Size 8 x 4 Kword + 223 x 32 Kword 1 16 Mbit Bank , Bank B 96 x 32 Kword 80 Mbit 16 x 4 Kword + 158 x 32 Kword 8 x 4 Kword + 127 x 32 Kword 4
Spansion
Original
SA147 SA209 SA194 DS05-50313-1E MB84VP24481HK-65 F0404

EN25S16

Abstract: 55 54 53 52 51 25 50 49 48 47 46 45 22 44 43 42 41 40 39 19 38 37 36 35 34 33 16 32 64KB Block 15 , 300ms typical Chip erase time: 9 seconds typical · Burst Modes - Continuous linear burst - 8/16/32/64 , 128 127 . 112 111 . 96 95 . 80 79 . 64 63 . 48 47 . 32 31 . 16 15 . 0 , 2048KB 2048KB Portion None Lower 31/32 Lower 30/32 Lower 28/32 Lower 24/32 Lower 16/32 All All None Upper 1/32 Upper 2/32 Upper 4/32 Upper 8/32 Upper 16/32 All All INSTRUCTIONS All instructions
Eon Silicon Solution
Original
EN25S16 104MH 2048K

4kw marking

Abstract: 3 16 Mbit Bank A + Bank B 8 × 8 Kbyte/4 Kword + 16 Mbit 31 × 64 Kbyte/32 Kword Bank , -50308-2E Stacked MCP (Multi-Chip Package) FLASH MEMORY & SRAM CMOS 32M (×16) FLASH MEMORY & 8M (×16) STATIC , -70/MB84VD22290FA/FE-70 s BLOCK DIAGRAM VCCf VSS A20 to A0 RY/BY A20 to A0 WP/ACC RESET CEf 32 , Sector-erase Architecture on Flash Memory · Eight 4 K words, and sixty three 32 K words. · Individual-sector , : 8KB (4KW) SA62 : 64KB (32KW) SA61 : 64KB (32KW) SA60 : 64KB (32KW) SA59 : 64KB (32KW) SA58 : 64KB
Spansion
Original
DS05-50308-2E MB84VD22280FA-70/MB84VD22290FA-70 MB84VD22280FE-70/MB84VD22290FE-70 MB84VD22280FA/80FE/90FA F0311

VCCF02

Abstract: sA117 Bank A: 16M bit (16KB × 4 and 64KB × 31) Bank B: 16M bit (64KB × 32) Bank C: 16M bit (64KB × 32) Bank D: 16M bit (16KB × 4 and 64KB × 31) · Minimum 100,000 program/erase cycles · Sector Erase , Size (×16) Address Range SA99 32 Kwords 300000h to 307FFFh SA100 32 Kwords 308000h , -50222-1E Stacked MCP (Multi-Chip Package) FLASH MEMORY & SRAM CMOS 64M (×16) FLASH MEMORY & 8M (×16) SRAM , ILO VOUT = VSS to VCCf, VCCs ­1.0 - +1.0 µA 12 16 3.3 5 5 MHz Flash
Fujitsu
Original
VCCF02 sA117 SA97 S-A106 MBM29BS64LF 258000H DS05-50222-1E MB84SD23280FA/MB84SD23280FE-70

4kw marking

Abstract: 3 16 Mbit Bank A + Bank B 8 × 8 Kbyte/4 Kword + 16 Mbit 31 × 64 Kbyte/32 Kword Bank , & SRAM CMOS 32M (×16) FLASH MEMORY & 8M (×16) STATIC RAM MB84VD22280FA-70/MB84VD22290FA , -70/MB84VD22290FA/FE-70 s BLOCK DIAGRAM VCCf VSS A20 to A0 RY/BY A20 to A0 WP/ACC RESET CEf 32 , Sector-erase Architecture on Flash Memory · Eight 4 K words, and sixty three 32 K words. · Individual-sector , : 8KB (4KW) SA62 : 64KB (32KW) SA61 : 64KB (32KW) SA60 : 64KB (32KW) SA59 : 64KB (32KW) SA58 : 64KB
Fujitsu
Original
MB84VD22280FA/80FE/90FA/90FE MB84VD22280FA/FE-70/MB84VD22290FA/FE-70

4kw marking

Abstract: Bank B + Bank C 48 × 64 Kbyte/32 Kword 3 16 Mbit Bank A + Bank B 8 × 8 Kbyte/4 Kword + 16 Mbit 31 × 64 Kbyte/32 Kword Bank C + Bank D 32 × 64 Kbyte/32 Kword 56 × 64 Kbyte , -50227-2E Stacked MCP (Multi-Chip Package) FLASH MEMORY & SRAM CMOS 32M (×16) FLASH MEMORY & 4M (×16) STATIC , BLOCK DIAGRAM VCCf VSS A20 to A0 RY/BY A20 to A0 WP/ACC RESET CEf 32 M bit Flash , ". 10 Value Unit 0 ns Standard MB84VD22180FA/VD22190FA/VD22180FM/VD22190FM-70 s 32 M
Fujitsu
Original
DS05-50227-2E MB84VD22180FA/VD22190FA/VD

4kw marking

Abstract: Bank B + Bank C 48 × 64 Kbyte/32 Kword 3 16 Mbit Bank A + Bank B 8 × 8 Kbyte/4 Kword + 16 Mbit 31 × 64 Kbyte/32 Kword Bank C + Bank D 32 × 64 Kbyte/32 Kword 56 × 64 Kbyte , -50227-1E Stacked MCP (Multi-Chip Package) FLASH MEMORY & SRAM CMOS 32M (×16) FLASH MEMORY & 4M (×16) STATIC , BLOCK DIAGRAM VCCf VSS A20 to A0 RY/BY A20 to A0 WP/ACC RESET CEf 32 M bit Flash , ". 10 Value Unit 0 ns Standard MB84VD22180FA/VD22190FA/VD22180FM/VD22190FM-70 s 32 M
Fujitsu
Original
DS05-50227-1E F0309

SA214

Abstract: SPECIFICATION SA210 32 KW × 31) Bank B: 48 Mbit (32 KW × 96) Bank C: 48 Mbit (32 KW × 96) Bank D: 16 Mbit (4 KW × 8 , Splits Volume Combination Sector Size 1 16 Mbit Bank A 8 × 4 Kword + 31 x 32 Kword 2 32 Mbit Bank A + Bank D 16 x 4 Kword + 62 x 32 Kword Bank 2 Volume Combination , Bank B + Bank C 192 x 32 Kword 16 x 4 Kword + 158 x 32 Kword 8 x 4 Kword + 127 x 32 Kword , X X X X X X Sector Size (Kwords) (× 16) Address Range 4 4 4 4 4 4 4 4 32 32
Spansion
Original
SA214 SPECIFICATION SA210 SA239 SA265 sa171 SA262

SA232

Abstract: SA266 ) Programmable Burst Interface Linear Burst: 8, 16, and 32 words with wrap-around Minimum 100,000 program/erase , 0 1 1 1 1 1 X X X Sector Size (Kwords) (× 16) Address Range 4 4 4 4 4 4 4 4 32 , 16) Address Range 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 32 , X X X X X X X X X X X X X X X X X X (× 16) Address Range 32 32 32 32 32 , 0 1 0 1 X X X 1 0 1 0 0 1 1 0 X X X Sector Size (Kwords) (× 16) Address Range 32 32
Fujitsu
Original
SA232 SA266 sa223 SA197 DS05-50404-1E MB84SF6H6H5K1-70

4kw marking

Abstract: -50230-1E Stacked MCP (Multi-Chip Package) FLASH MEMORY & SRAM CMOS 32M (×16) FLASH MEMORY & 4M (×16) STATIC , BLOCK DIAGRAM VCCf VSS A20 to A0 RY/BY A20 to A0 WP/ACC RESET CEf 32 M bit Flash , Value Unit 0 ns Standard MB84VD22184FM/VD22194FM-70 s 32 M FLASH MEMORY for MCP 1. Flexible Sector-erase Architecture on Flash Memory · Eight 4 K words, and sixty three 32 K words. · , : 8KB (4KW) SA62 : 64KB (32KW) SA61 : 64KB (32KW) SA60 : 64KB (32KW) SA59 : 64KB (32KW) SA58 : 64KB
Fujitsu
Original
DS05-50230-1E MB84VD22184FM-70/MB84VD22194FM-70 VD22184FM VD22194FM

mips 74KC

Abstract: MIPS32 74Kc Embedded Trace Macrocell 16/32/64KB SRAM Vectored Vecto ed Interrupt Controller AHB Interfa
-
Original
MIPS32 1074K MD00496 mips 74KC MIPS32 74Kc 74KC mips32 24k MD00502 MIPS 24KC MIPS16 MIPS64 1004K R3000
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