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Part Manufacturer Description Datasheet BUY
CD4504BEE4 Texas Instruments CMOS Hex Voltage-Level Shifter for TTL-to-CMOS or CMOS-to-CMOS Operation 16-PDIP -55 to 125 visit Texas Instruments
CD4504BPW Texas Instruments CMOS Hex Voltage-Level Shifter for TTL-to-CMOS or CMOS-to-CMOS Operation 16-TSSOP -55 to 125 visit Texas Instruments
CD4504BM Texas Instruments CMOS Hex Voltage-Level Shifter for TTL-to-CMOS or CMOS-to-CMOS Operation 16-SOIC -55 to 125 visit Texas Instruments Buy
CD4504BPWE4 Texas Instruments CMOS Hex Voltage-Level Shifter for TTL-to-CMOS or CMOS-to-CMOS Operation 16-TSSOP -55 to 125 visit Texas Instruments
CD4504BM96 Texas Instruments CMOS Hex Voltage-Level Shifter for TTL-to-CMOS or CMOS-to-CMOS Operation 16-SOIC -55 to 125 visit Texas Instruments Buy
CD4504BM96E4 Texas Instruments CMOS Hex Voltage-Level Shifter for TTL-to-CMOS or CMOS-to-CMOS Operation 16-SOIC -55 to 125 visit Texas Instruments

12v to ttl level shifter

Catalog Datasheet MFG & Type PDF Document Tags

IMP-00A

Abstract: ScansUX1008 MOS level, while those which are intended for interface with the rest of the processor system are TTL , . dc electrical characteristics , = +5.0V to -12V 2 MA Logic "1" Output (MOS) (VOUT(1) Vss - 0.7 V Logic "0" Output (MOS) (VOUT , Equal Width) f = 700 kHz 600 800 mW ' Note 1: Internal pull-up provided for TTL inputs. Refer to Figure , . Larger resistance values may be used to drive standard or low power TTL. Not« 4: Clamp diodes and series
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ST T8 3560

Abstract: A/ST T8 3560 Current (TTL) (Iin(o|) V,N =0V -1.75 mA Input Leakage Current (MOS) (lL) VIN = +5.0V to -12V 2 MA , characteristics (Ta = 0°C to +70°C, Vss = +5V ±5%, VGG = -12V ±5%. VLL = GND) PARAMETER CONDITIONS MIN (Note , = 700 kHz 600 800 mW Note 1: Internal pull-up provided for TTL inputs. Refer to Figure 3 and text , of the ALU peration is available to the shifter via the S-bus. The shifter provides a one bit left or , from the shifter may be returned to any of the registers over the R-bus. A 1 6 word last in, first out
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MM5751

Abstract: IMP-00A compatibility Drives TTL â  4-phase clock Non-overlapping â  Standard package 24-pin DIP Expandable to 32 , characteristics dc electrical characteristics (Ta = 0°C to +70°C. Vss = +5V ±5%. VGG = -12V ±5%. VLL = GND , = +5.0V to -12V 2 MA Logic "1" Output (MOS) (VOUT(â'žl Vss -0.7 V Logic "0" Output (MOS , ALU peration is available to the shifter via the S-bus. The shifter provides a one bit left or right , the shifter may be returned to any of the registers over the R-bus. Thi s Material Copyrighted By Its
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Abstract: DSS_DATA UART1 Level Shifter RS232 Transmiter 3.3V Level Shifter LCD Conn. I2C1 USB0 , 64MB x 32 512 MB 1.8V GPMC LED BACK LIGHT PWM 3.3V Level Shifter NAND FLASH 4Gb , WiFi/BT Module JTAG Level Shifter TV_OUT RS232 Transmiter CAMERA VIP RS232/RS422 , Built-in WiFi+ BT SIP module CE / FCC class A / B compliant DC Input 12V DC +/- 5% (DC power must be , 24-bit TTL LCD Environmental Size: 10.4 inch, 4:3 Resolution: 800 x 3 (RGB) x 600 Operating Adlink Technology
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SP-7W61 SP-1061 AM3715 RS232/422/485 RS-232/ 512MB

24v to 5v level shifter

Abstract: ic cd4009 trigger to the "0" state. If the ENABLE input is being driven from TTL logic, a pull-up resistor of 1k to , chart shows the effect, on ttrans for a supply varying from +4.5V to +5.5V. CMOS OR TTL SUPPLY , ADDRESS INPUT GND EN AX' LEVEL SHIFTER AX' V- INPUT BUFFER AND LEVEL SHIFTER EN , N N N EN' P N V- GND FIGURE 11. ENABLE INPUT AND LEVEL SHIFTER 12-135 , INPUT AND LEVEL SHIFTER 12-136 Harris Semiconductor
Harris Semiconductor
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IH6108 HI-0508 DG508A HI-508 ADG508A IH6108MJE 24v to 5v level shifter ic cd4009 level shifter . CMOS to TTL schematic diagram inverter 24V s2901

12v to ttl level shifter

Abstract: NJIJ6402B converted fron the TTL level signal to RS-232C standard level by the level shifter and limit the slew rate , line driver/receiver composed of 3 drivers and 3 receivers. The drivers convert the input of TTL level , levels both of RS-232C standard minimum requirement level (±3V) and TTL level. Furthermore, the , -232C standard mininum requirement level and TTL level as the threshold voltage of input comparators are adjusted , Level Output Voltage Vol V,N=V,H RL=3kO Vdd=+4.5V,Vss=-4.5V Vdd=+9V, Vss=-9V Vdd=+12V,Vss=-12V -3.0
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NJIJ6402B NJU6402B NJU6402BD NJU6402BM NULJ6402Q 12v to ttl level shifter RS232C

circuit diagram of 8-1 multiplexer design logic

Abstract: 1334 diode TTL logic, a pull-up resistor of 1k to 3k is required from the gate output to +5V supply. (See Figure , S25 S26 S27 S28 S29 S30 S31 S32 NOTE: TTL inverter must have pullup resistor to +5V to drive EN , P VADDRESS DECODER VS8 VN D AX ADDRESS INPUT EN GND LEVEL SHIFTER V- AX' AX' EN INPUT BUFFER AND LEVEL SHIFTER GND VV+ V+ VGND FIGURE 10. IH6108 SCHEMATIC DIAGRAM V+ P EN P P P N P N N N N EN' GND V- FIGURE 11. ENABLE INPUT AND LEVEL SHIFTER
Harris Semiconductor
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IH6108CPE circuit diagram of 8-1 multiplexer design logic 1334 diode IH6108MJE/883B IH6108CJE ISO9000 1-800-4-HARRIS

ic cd4009

Abstract: 12v to ttl level shifter inputs arecontrolled by TTL logic or CMOS logic elements with a "0" corresponding to any voltage less , ENABLE input is being driven from TTL logic, a pull-up resistor of 1k to 3k is required from the gate , varying from +4.5V to +5.5V. CMOS OR TTL SUPPLY VOLTAGE TYPICAL TTRANS AT 25oC Using the IH6208 with , continues to be 0.8V). In this configuration the IH6208 cannot be driven by TTL (+5V) or CMOS (+5V) logic. It can be driven by TTL open collector logic or CMOS logic with +12V supplies. If the logic and the
Harris Semiconductor
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DG509A HI-509 ADG509A IH6208MJE IH6208MJE/883B IH6208MFE/883B

CXA2075M

Abstract: cxa2075 bar input, 1.0Vp-p (Max.) SG5: CSYNC TTL level Fig. 4 SG1 to SG3: DC direct coupling 3.2VDC , : SIN wave, 3.58MHz 0.5Vp-p SG5: CSYNC TTL level Fig. 5 tD (B) 1/2 SG1 to SG4 SG3 5V SG5 , to SG3: No signal, SG4: SIN wave, 4.43MHz 0.5Vp-p SG5: CSYNC TTL level Fig. 6 XPAL1/2 , according to the composite sync signal input. H synchronization SYNC IN (TTL level) tD (B) tW (B , to Notes on Operation, Nos. 3 and 8. Vcc2 Vcc1 20 375µ 20 Black level CVOUT 0.97V
Sony
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CXA2075M 24PIN cxa2075 rgb-Composite Sync cxa1645m SOP-24P-L01 PAL color bar GENERATOR CXA1645M 42ALLOY

ic cd4009

Abstract: level shifter . CMOS to TTL +0.8V to trigger to the "0" state. If the ENABLE input is being driven from TTL logic, a pull-up , chart shows the effect, on ttrans for a supply varying from +4.5V to +5.5V. CMOS OR TTL SUPPLY , ' AND LEVEL SHIFTER GND AX V- ADDRESS INPUT GND V+ VV+ LEVEL SHIFTER V- VGND , N N N N EN' P N V- GND FIGURE 9. ENABLE INPUT AND LEVEL SHIFTER V+ P , LEVEL SHIFTER 12-135 Harris Semiconductor
Harris Semiconductor
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IH6208CPE G409 S509A G509 cd4009 B IH6208CJE HI-0509 1N914 CD4009A

cxa2075

Abstract: CXA1645 driving a 75£1 load. Refer to Notes on Operation, Nos. 5 and 7. 21 BOUT 22 GOUT 23 ROUT Black level 1.2V , SG5 SG1 to SG3: No signal, SG4: SIN wave, 3.58MHz 0.5Vp-p SG5: CSYNC TTL level 3.58MHz component , according to the composite sync signal input. H synchronization SYNC IN (TTL level) tD (B) tW (B) C VIDEO , DRIVER B-Y Modulator REGULATOR PHASE SHIFTER PULSE GEN , circuits. The leads to GND2 should be as short and wide as possible. 2 3 4 RIN GIN BIN Black level when
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CXA1645 220H B100 G100

DIODE S2v 73

Abstract: NJU6401B -232C standard signals which are converted from the TTL level signal to RS-232C standard level by the level shifter and limit the slew rate below 30V/j/s(6V/jis typ), to the RS-232C lines. The each driver , input levels both of RS-232C standard ninimum requirement level( + 3V) and TTL level. Furthermore, the , of +3V of RS-232C standard minimum requirement level and TTL level as the threshold voltage of input , 10 nK H Level Output Voltage Von V1n~V1l RL=3kO Vdd=+4.5V,Vss=-4.5V Vdd=+9V, Vss=-9V Vdd=+12V,Vss=-12V
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NJU6401B NJU6401BD NJU6401BM DIODE S2v 73 RS-232C standard NJU64-01 NJU640T
Abstract: the RS-232C standrd signals which are converted from the TTL level signal to RS-232C standard level by the level shifter and limit the slew rate below 30V/#s(6V/jUs typ), to the RS-232C lines. The each , . The drivers convert the input of TTL level signals into RS232C level signals and limit the slew rate , (±3V) and TTL level. Furthermore, the hysteresis circuit and noise filter incorporated on each receiver , receiver accept the both of ±3V of RS-232C standard minimum requirement level and TTL level as the -
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Abstract: Functional Diagram PART NUMBER LEVEL SHIFTER AND DRIVER -25°C to +85°C 16 Lead Plastic DIP , TTL LOGIC« INPUT TEMP. RANGE 0°C to +75°C 0°C to +75°C HI1-0201HS-5 cell INPUT , * r MN42 EO MN44 MN4S i* - 4 DIGITAL INPUT BUFFER AND LEVEL SHIFTER , switch performance with CMOS logic will be inferior to that with TTL logic (0V-5V). POWER SUPPLY , . To optimize charge injection perfor­ mance for the HI-201 HS, it is advisable to provide a TTL -
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HI-201HS

HI3-0201HS-4

Abstract: 201hs Reset Circuits Ordering Information Functional Diagram ov+ I SOURCE TTL LOGIC« INPUT LEVEL SHIFTER , INPUT BUFFER AND LEVEL SHIFTER O) 9-83 SWITCHES Specifications Hi-201 HS Absolute Maximum , ), although the switch performance with CMOS logic will be inferior to that with TTL logic (0V-5V). The logic , optimize charge injection perfor mance for the HI-201 HS, it is advisable to provide a TTL logic input with , , this TTL compatible device offers improved performance over previously available CMOS analog switches
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H1-201HS HI3-0201HS-4 201hs HI4-0201HS HI-300 104A/

M65817AFP

Abstract: M61556FP loss detector circuit. · Output impedance: 2.5 · Input is TTL level, allowing connecting to 3.3 V or , Level shifter VDD low voltage detector Clock loss detector Level shifter Thermistor , 27 28 22 Level shifter Level shifter Level shifter Level shifter Thermistor , at the rising edge of INA+ or INB+ to high level, whichever is first. The recovery conditions for , operation takes place at the rising edge of INA+ or INB+ to high level, whichever is first. VDD low
Renesas Technology
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M61556FP M61557FP M65817AFP M65881AFP SSOP42-P-450-0 Low Voltage Detector REJ03F0089-0100Z D-85622

SO20 mosfet driver

Abstract: L6382D MOS, it is able to source and sink 120mA (min). HSD (Level Shifter and High Side Driver): it consists of a level shifter from 3.3V logic signal (HGI) to the high side gate driver input up to 600V , ) and to sink 120mA to HSS (turn-off). PFD (Power Factor Driver): it consists of a level shifter , pre-regulator stage. HED (Heat Driver): it consists of a level shifter from 3.3V logic signal (HEI) to , up to 400KHz - are connected to level shifters that provide the control signals to their relevant
STMicroelectronics
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L6382D L6382DTR SO20 mosfet driver SO20 400KH

L6382D

Abstract: L6382DTR consists of a level shifter from 3.3V logic signal (LGI) to Vcc MOS driving level; conceived for the half-bridge low-side power MOS, it is able to source and sink 120mA (min). HSD (Level Shifter and High Side Driver): it consists of a level shifter from 3.3V logic signal (HGI) to the high side gate driver , consists of a level shifter from 3.3V logic signal (PFI) to Vcc MOS driving level: the driver is able to , up to 400KHz - are connected to level shifters that provide the control signals to their relevant
STMicroelectronics
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400khz 600V mosfet driver IC

RCA-CD40115

Abstract: level shifter from TTL to CMOS bidirectional large CMOS and TTL output Features: â  Eight inverting channels with 5V-to-12V or 12V-to-5V level , external pull-up resistors. The TTL input logic 0 to logic 1 transition occurs at a level of approximately , DISABLE FUNCTION 0 0 Convert CMOS Level to TTL Level 1 1 Convert TTL Level to CMOS Level 0 1 High , CMOS High-Speed 8-Bit Bidirectional CMOS/TTL Interface Level Converter The RCA-CD40115- is a high-speed 8-bit integrated circuit designed to interface CMOS logic levels with TTL logic levels on the data
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CD40115 RCA-CD40115 level shifter from TTL to CMOS bidirectional CD4011S level shifter from TTL to CMOS CL-200 M30E271 GQ21553 MO-004-AG 16-LM 92CS-20972

power 22E analog

Abstract: MN14 Information Functional Diagram PART NUMBER o PACKAGE HI1-0201HS-5 SOURCE LEVEL SHIFTER AND , + TTL LOGIC INPUT TEMP. RANGE -25oC to +85oC 16 Lead Plastic DIP o o HI1 , VEE DIGITAL INPUT BUFFER AND LEVEL SHIFTER MN46 MP51 MP52 MP4 QN6 QN9 QN7 IX4 , ), although the switch performance with CMOS logic will be inferior to that with TTL logic (0V-5V). POWER , output. To optimize charge injection performance for the HI-201HS, it is advisable to provide a TTL
Harris Semiconductor
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power 22E analog MN14 HI3-0201HS-5 HI4P0201HS-5 HI3-0201-HS-5 HI1-0201HS-2
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