NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: total data rate, at a 60-Hz field rate, is 74.25 MSPS. The 1080-I format can be denoted as: 1920x1080 , 1080-I, the VBI in field 1 extends from the first line (line 1) to line 20, inclusive, and from line 561 , Types in 1080-I First Field SS 15 564567 BB 6 B 720 and 561562 569583 , ) format specified in the 1080-lines interlaced (1080I) HDTV standard of SMPTE274M SMPTE274M. The line type (active , EVM via dip switches. The second example details the generation of a fully-compliant 1080I signal ... | Original |
60 pages, |
ALTERA EPM7128SLC84 AMP 103309-1 CONNECTOR 5 PIN PET digital tv schematic diagram EPM7128 Datasheet EPM7128SLC84 CPLD 1080i field pattern black THS8134 smpte 274m SMPTE-274M THS8133EVM THS8133 THS8133/34 THS8133/34 abstract |
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| Abstract: , at a 60-Hz field rate, is 74.25 MSPS. The 1080-I format can be denoted as: 1920x1080/60/2:1. , video interface (CVI) format specified in the 1080-lines interlaced (1080-I) HDTV standard of , 1080I signal using the THS8133B/34B THS8133B/34B. It builds further on the first example by keeping track of the , third-party development tools. While 1080-I is not the only HDTV format in use, its timing signals are the , contains the following chapters: Chapter 1 describes the 1080I format Chapter 2 summarizes the THS8133B THS8133B ... | Original |
60 pages, |
THS8134B box 34b Chip Multilayer Delay Lines murata EPM7128 1D2 SMD THS8133B SMPTE274 EPM7128* kit altera flex10k smd transistor 43t THS8133B/34B THS8133B/34B abstract |
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| Abstract: pathological." Finally, a flat field black picture which is the foundation on which many other test patterns are , Built-In SDV Test Pattern Generation Improves Video System Testing James Mears MODERATOR: Hello , in this seminar. SLIDE 2 Today's topic is "Built-In SDV Test Pattern Generation Improves Video , unique and valuable built-in self-test and test pattern generation features of some of our Serial Digital Video products. My topics today will include the role of built-in self-test and test pattern ... | Original |
19 pages, |
tv pattern generator PAL color bar GENERATOR Design Seminar Signal Transmission CLC031 CLC030 CLC021 CLC020 CLC016 datasheet abstract |
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| Abstract: stressing test pattern, called the equalizer pathological, And a flat field black picture. This is the , Patterns Flat Field Black 75%, 8 Vertical Color Bar PLL Pathological Equalizer Pathological Flat Field Black · SD Formats NTSC and PAL 4x3 and 16x9 Rasters Equalizer Pathological , black, reduces the effective transport clock frequency by about 4 times. The pattern alternates 20 bits , test patterns Flat field black raster · NTSC and PAL formats · 4x3 and 16x9 rasters · Hardware ... | Original |
42 pages, |
video pattern generator CLC031 color bar generator CLC021 portable tv pattern generator RP-178 smpte 274m CLC020 tv pattern generator CLC030 BIST smpte rp 198 manufacturers of tv pattern generator datasheet abstract |
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| Abstract: Generator The ADV7197 ADV7197 can generate a Cross-Hatch pattern (white lines against a black background). Additionally, the ADV7197 ADV7197 can output a uniform color pattern. The color of the lines or uniform field/frame , to test monitor convergence. If this bit is set to "1," a uniform colored frame/field test pattern , field test pattern. The standard used for the values for Y and the color difference signals to , SMPTE274M SMPTE274M (1080i), SMPTE296M SMPTE296M (720p) and Any Other High-Definition Standard Using Async Timing Mode RGB in ... | Original |
20 pages, |
tri-level sync generator RS-343A RS-170 ADV7197KST ADV7197 720P SMPTE274M SMPTE296M EIA-770 SMPTE274M abstract |
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| Abstract: ) Pattern Format 480i 720p 1080i 2.4 Raster 480p 2.4 2.4 2.4 Full White Field , Applications n AC coupled HDTV applications using the 1080i and 720p formats as well as standard NTSC and PAL , 5.8 Multiburst 5.4 6.6 10.1 10.9 White Text on Black Background 5.2 7.1 11.1 12.3 Windows Pattern 4.0 4.5 6.4 6.6 Windows Pattern 4.7 5.2 6.7 7.0 Windows Pattern 6.0 6.7 8.6 9.4 Vertical Lines 5 On 5 Off 5.1 5.9 8.7 ... | Original |
12 pages, |
pcb component working of crt tv LM2426TE LM126X CRT tv troubleshooting guide crt tv pin connections 1Ss83 equivalent 1SS83 LM2426TE abstract |
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| Abstract: for Various Video Patterns Power Dissipation (W) Pattern 480i Raster Full White Field White Box, 75% , Hatch 16x12 Resolution Chart Multiburst White Text on Black Background Windows Pattern Windows Pattern Windows Pattern Vertical Lines 5 On 5 Off Vertical Lines 4 On 4 Off Vertical Lines 3 On 3 Off Vertical , lead package style Applications n AC coupled HDTV applications using the 1080i and 720p formats as , 4.7 4.0 4.3 3.8 5.4 3.0 5.6 10.1 11.1 6.4 6.7 8.6 8.7 9.8 11.7 14.4 21.8 1080i 2.4 6.5 4.2 5.0 4.1 4.5 ... | Original |
12 pages, |
LM2426 LM2426 abstract |
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| Abstract: popularly supported forms of digital high definition television, 720-P 720-P and 1080-I, are both carried over , it enters the equalizer, is not recommended. This paper will focus on 1035-I/30 1035-I/30, 1080-I/30, and , information, together with error protection bits. The F-bit indicates video field timing. The V-bit , luminance and chrominance levels. For instance, a luminance level of 64 maps to black, and 940 maps to , Figure 8. Notice that 1080-I and 720-P 720-P have square pixels with respect to a 16:9 display aspect ratio. ... | Original |
13 pages, |
Television numeric display RP-18413 1125-line led edison rgb datasheet smpte 299M BT.709 smpte rp 184 ITU-R BT.709 datasheet abstract |
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| Abstract: ) Internal Test Pattern Generator (Color Hatch, Black Bar, Flat Field/Frame) Fully Programmable YCrCb to , Test Pattern Generator (Color Hatch, Black Bar, Flat Frame) Individual Y and PrPb Output Delay Gamma , Internal Test Pattern Generator (Color Bars, Black Bar) Controlled Edge Rates for Sync, Active Video , Bit 1 Bit 0 Register Setting 0 Test Pattern Black Bar Bit 2 0 Zero must be , 1 0 HD Test Pattern Hatch/Field 1 HD VBI Open Reserved HSYNC, VSYNC, BLANK EAV/SAV ... | Original |
84 pages, |
T1004 T-1004 PAL-60 PAL to ITU-R BT.601/656 Decoder CCIR-656 ADV7312 170M euroscart BTA136 EIA-770 ADV7312 abstract |
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| Abstract: Features (720p 1080i) 2 Oversampling (148.5 MHz) Internal Test Pattern Generator (Color Hatch, Black Bar , Features (525p/625p) 8 Oversampling (216 MHz Output) Internal Test Pattern Generator (Color Hatch, Black , Pattern Generator (Color Bars, Black Bar) Controlled Edge Rates for Sync, Active Video Individual Y , Pattern Black Bar Bit 2 0 Zero must be written to these bits Disabled Enabled 0 1 RGB , (1080i) at 30 Hz and 25 Hz SMPTE 296M (720p) RGB in 310-Bit 4:4:4 Input Format HDTV RGB Supported ... | Original |
84 pages, |
transistor GY 721 170M ADV7310 ADV7311 CCIR-656 equivalent sd 48 41 1080i field pattern black PAL to ITU-R BT.601/656 Decoder PAL-60 SCR bt 107 T-1004 T1004 GV 269 ADV7310/ADV7311 T-1004 ADV7310/ADV7311 abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| format mapping: // 000 = SMPTE 295M - 1080i 25Hz (1250 lines/frame) // 001 = SMPTE 274M - 1080sF 24Hz & 23.98Hz // 002 = SMPTE 274M - 1080i 30Hz & 29.97 Hz // 003 = SMPTE 274M - 1080i 25Hz // 004 = SMPTE 274M - 1080p 30Hz & 29.97Hz - 1080i 25Hz (1250 lines/frame) // 001 = SMPTE 274M - 1080sF 24Hz & 23.98Hz // 002 = SMPTE 274M - 1080i 30Hz & 29.97 Hz // 003 = SMPTE 274M - 1080i 25Hz www.datasheetarchive.com/download/12535602-996026ZC/xapp682.zip (multigenHD_horz.v) |
Xilinx | 06/03/2004 | 50.07 Kb | ZIP | xapp682.zip |
| , // frame 0, field 0, pattern 1 or cable eq pattern VRGN_FM0_F0_PAT2 = 3, // frame 0, field 0, pattern 2 or PLL pattern VRGN_FM0_F0_PAT3 = 4, // frame 0, field 0, pattern 3 VRGN_FM0_F0_PAT4 = 5, // frame 0, field 0, pattern 4 VRGN_FM0_F0_VB_1 = 6, // frame 0, field 0 blanking interval VRGN_FM0_F1_PAT1 = 8, // frame 0, field 1, pattern 1 or cable eq pattern VRGN_FM0_F1_PAT2 = 9, // frame 0, field 1, pattern 2 or PLL pattern VRGN_FM0_F1_PAT3 = 10 www.datasheetarchive.com/download/72452944-996024ZC/xapp680.zip (multigenHD.v) |
Xilinx | 07/01/2004 | 92.02 Kb | ZIP | xapp680.zip |
| field 1 constant HRGN_CEQ_PLL : hrgn_type := "11100"; - RP 198 cable equalization pattern , field 0, pattern 2 or PLL pattern constant VRGN_FM0_F0_PAT3 : vrgn_type := "00100"; - frame 0, field 0, pattern 3 constant VRGN_FM0_F0_PAT4 : vrgn_type := "00101"; - frame 0, field 0, pattern , pattern 1 or cable eq pattern constant VRGN_FM0_F1_PAT2 : vrgn_type := "01001"; - frame 0, field 1, pattern 2 or PLL pattern constant VRGN_FM0_F1_PAT3 : vrgn_type := "01010"; - frame 0, field 1 www.datasheetarchive.com/download/72452944-996024ZC/xapp680.zip (multigenHD.vhd) |
Xilinx | 07/01/2004 | 92.02 Kb | ZIP | xapp680.zip |
| = SMPTE 274M 1080i 30Hz - 011 = SMPTE 274M 1080i 25Hz - 100 = SMPTE 274M - board. The reference design includes the multigenHD video pattern generator - as a video source. This pattern generator does output line information that - can be inserted into the video stream by selects which video pattern is transmitted - SW1: 0 = RP219 RP219 RP219 RP219 color bars, 1 = RP198 RP198 RP198 RP198 HD-SDI checkfield 75% White, Region *3 is 0% Black - 01 = Region *2 is 100% White, Region *3 is 0% Black www.datasheetarchive.com/download/72452944-996024ZC/xapp680.zip (sdv_hdsdi_tx.vhd) |
Xilinx | 07/01/2004 | 92.02 Kb | ZIP | xapp680.zip |
| 1035i 30Hz 001 = SMPTE 274M 1080sF 24Hz 010 = SMPTE 274M 1080i 30Hz 011 = SMPTE 274M 1080i 25Hz 100 = SMPTE 274M 1080p 30Hz 101 = SMPTE 274M . The reference design includes the multigenHD video pattern generator as a video source. This pattern Tx & Rx. SW0: 1 = 74.25Mhz, 0 = 74.25/1.001 MHz SW1 & SW2 select which video pattern is , Region *3 is 0% Black 01 = Region *2 is 100% White, Region *3 is 0% Black 10 = Region www.datasheetarchive.com/download/72452944-996024ZC/xapp680.zip (sdv_hdsdi_tx.v) |
Xilinx | 07/01/2004 | 92.02 Kb | ZIP | xapp680.zip |
| , // frame 0, field 0, pattern 1 or cable eq pattern VRGN_FM0_F0_PAT2 = 3, // frame 0, field 0, pattern 2 or PLL pattern VRGN_FM0_F0_PAT3 = 4, // frame 0, field 0, pattern 3 VRGN_FM0_F0_PAT4 = 5, // frame 0, field 0, pattern 4 VRGN_FM0_F0_VB_1 = 6, // frame 0, field 0 blanking interval VRGN_FM0_F1_PAT1 = 8, // frame 0, field 1, pattern 1 or cable eq pattern VRGN_FM0_F1_PAT2 = 9, // frame 0, field 1, pattern 2 or PLL pattern VRGN_FM0_F1_PAT3 = 10 www.datasheetarchive.com/download/12535602-996026ZC/xapp682.zip (multigenHD_romgen.v) |
Xilinx | 06/03/2004 | 50.07 Kb | ZIP | xapp682.zip |
| , WIDTH, 20); tgcv.foreground = AllocateColor(xparms.d, "black", BlackPixel(xparms.d, screen www.datasheetarchive.com/download/55429351-72918ZC/bsp_linux_2.6.11_board_support_package.zip (Graphics_LinuxXorg_Common_03.00.0101.patch) |
Digital Logic | 18/06/2007 | 954.19 Kb | ZIP | bsp_linux_2.6.11_board_support_package.zip |
| Copyright (c) 2004-2005 Advanced Micro Devices, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Publ www.datasheetarchive.com/download/59450573-72917ZC/linux_2.4.24_lx5536_b0_1.0beta.zip (Patches_Linux2.4.24_LX5536_01.02.0102.patch) |
Digital Logic | 18/06/2007 | 65032.21 Kb | ZIP | linux_2.4.24_lx5536_b0_1.0beta.zip |