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Part : 08RSX-D0.38S-5AX-KAI(L Supplier : JST Manufacturing Manufacturer : Heilind Electronics Stock : - Best Price : - Price Each : -
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08RSX-D0.38S-5AX-KAI(L

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: ). 1 input / 1 switching pin method (CK and U / D input modes). : All output is at the "L" level : No , EM GND R E D C B A E D C B A VCC All output becomes "L" when power down is "L" Phase home position monitor Input pulse monitor Excitation monitor GND Reset when the reset input is "L" E Output D Output C , ~ E U / D, P D, R ZO, CO, EM 3 2001-08-27 TB6528P TRUTH TABLE A CU CD L L L L L L CK L L U/D (*) (*) H L FUNCTION CW CCW CW CCW Note 1: * means Don't Care Note 2: The CU pin is an Toshiba
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CL-GD6440

Abstract: 65550 CHIPS ­ ton ­ ­ 50 ms toff ­ ­ 50 ms L ­ 500 ­ cd/m2 %RH , Clock "L" Time t6 10.0 ­ ­ ns Clock "H" Time t7 7.0 ­ ­ ns Set Up , G1 G0 B5 B4 B3 B2 B1 B0 Gray Scale Level Black L L L L L L L L L L L L L L L L L L ­ Blue L L L L L L L L L L L L H H H H H H ­ Green Basic Color R5 L
Purdy Electronics
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AND10C209A-DHB AND10C273-DHB CL-GD6440 65550 CHIPS cl-gd64 INVR1918

STI3400

Abstract: STI4500 fifold fifowen istype 'com,neg'; istype 'com,neg'; istype 'com,neg'; "constant declarations L , ; "define state machines AUDIO = [audcs,audrdy,q0,q1]; AIDLE = [L,L,L,L]; A0 = [L,L,H,L]; "allow for setup time A1 = [H,L,L,L]; "assert chip select A2 = [H,L,H,L]; "continue cycle A3 = [H,L,L,H]; "wait for await signal A4 = [H,H,L,L]; "read cycle ready A5 = [L,H,L,L]; "dummy audio read cycle ready A6 = [L,H,L,H]; "write cycle ready VIDEO = [vidcs,vidrd,vidwr,vidrdy, q2]; VIDLE = [L,L,L,L,L]; V0 =
PLX Technology
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STI3400 STI4500 MACH220A PCI9060

H107L

Abstract: W32 MARKING B2 B1 B0 na L L X X X X X X X X L L L L na L H X X X X X X X X OC OC OC OC na H L X X X X X X X X , A3 a2 A1 A0 B3 B2 B1 B0 0 L L L L L L L L H H L L 32 L L H L L L L L L L H L 1 L L L L L L L L H L L 33 L L H L L L L L H L L 2 L L L L L L L L H H 34 L L H L L L L L H H H 3 L L L L L L L H H 35 L L H L L L L H H Ã 4 L L L L H L L L H L L 36 L L M L L H L L L H H 5 L L L L L H L H L L 37 L L H L L H L H H H 6 L L L L L H L L H H L 38 L L H L L H L L L H H 7 L L L L L H
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OCR Scan
H107L W32 MARKING MC 68 H 705 da 128 H217H L117l MIL-M-38510/202B MIL-M-38510/202A MIL-M-38510 MIL-M-38 MTL-M-38510 1984-705-040/A3435
Abstract: . [mV] Power Dissipation 1.5 In max. [mW] Melting I²t 10.0 Intyp. [A²s] S L T Order Number 0.05 250 1) 550 415 155 0.03 l l l l l 0034.6602 â 0.063 250 1) 480 420 160 0.05 l l l l l 0034.6603 â 0.08 250 1) 400 360 165 0.06 l l l l l 0034.6604 â 0.1 250 1) 350 320 170 0.08 l l l l l 0034.6605 â 0.125 250 1) 300 SCHURTER
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E41599

SM02

Abstract: TOSHIBA FL INVERTER Luminance (L) (tON) (tOFF) Min. 100 -50 90 Typ. 250 -70 130 Max. -50 50 , t4 t3 X,Y t2 t1 DD (V) 800,Y VI L =( M A X):0.2 V VI H =( MI N):0.8 V DD (V) DD (V) Input Signal Center Level : 0.5 V VI L =( M A X):0.2 V DD (V) 798,Y X , Vertical Display Term One Line Scanning Time Horizontal Display Term Clock Period Clock "L" Time , ns 1) When ENAB is fixed to "H" level or "L" level after NCLK input, the panel is displayed as
Toshiba
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LTM08C343S SM02 TOSHIBA FL INVERTER toshiba lcd SD-53885

LTM08C355S

Abstract: lcd inverter circuit diagram toshiba Time Luminance (L) (tON) (tOFF) Min. 100 -90 Typ. 250 -145 Max. -50 50 - , X,Y t2 t1 DD (V) 800,Y VI L =( M A X):0.2 V VI H =( MI N):0.8 V DD (V) DD (V) Input Signal Center Level : 0.5 V VI L =( M A X):0.2 V DD (V) 798,Y X,600 t3 799,Y , Vertical Display Term One Line Scanning Time Horizontal Display Term Clock Period Clock "L" Time , ) Note 1) Refer to "TIMING CHART" . Note 2) If ENAB is fixed to "H" or "L" level for certain period
Toshiba Matsushita Display Technology
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LTM08C355S lcd inverter circuit diagram toshiba Toshiba lcd cable inverter pin diagram TOSHIBA LTM08C355S inverter ccfl toshiba lcd inverter input circuit diagram toshiba

TB6528P

Abstract: modes). : All output is at the "L" level Excitation mode protection function : No fluctuations in , EB 7 EC 8 PD All output becomes "L" when power down is "L" 9 ZO Phase home , Truth table B GND 13 R Reset when the reset input is "L" 14 E E Output 15 D , 2003-08-05 TB6528P TRUTH TABLE A CU CD CK U/D FUNCTION L L * CW L * CCW L L L H CW L L L CCW Note 1: * means Don't Care Note 2: The CU pin is
Toshiba
Original
Abstract: Voltage i VcEO=^OOV MAXIMUM RATINGS (Ta-25°C) CHARACTERISTIC RATING "s y m b o l UNIT â'¢V â , JB D E C E l AJ T O S H IB A 2 - 1 0 L 1 A Weight : 2.1g ELECTRICAL CHARACTERISTICS (Ta , Time Z0/M8 t l n llj= l INPUT tr tstg Fall Time Switching Time mA tf iBirw ^ I Bi = - I Ba= Q 0 8 A DUTY CYCLE< 1 % , â'"Y" OUTPUT js V0C = 200V MS I l ! l ! l l l ! l l l l l l l l l l l l l l l 1 1 1 1 i l l l l l i l l ) l l l l l l l l l l l l l l l i n -
OCR Scan
2SC3309 DISCRETE/0PT03-

full subtractor circuit using decoder

Abstract: circuit diagram of full subtractor circuit 10287 - - 400 620 (T) L suffix denotes Dual In-Une Ceramic Package, P suffix denotes Dual In-Line , 14 3 13 12 11 10 4 5 6 7 9 2 15 Word H H H H H H H H H H H H H H 0 H H H H H H H H H H L L L L 1 H H H H H H H H L L H L L L 2 H H H H H H H H L L L H L L 3 H H H H H H L L H H H L H H 4 H H H H H H L L H H L H H H 5 H H H H H H L L L L H H H H 6 H H H H H H L L L L L L L L 7 H H H H L L H H H H H H L L 8 H H H H L L H H H H L L H L 9 H H H H L L H H L L H L H L 10 H H H H L L H H L L L
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OCR Scan
MC10137 MC10537 MCM10140 MC10141 MCM10142 MCM10143 full subtractor circuit using decoder circuit diagram of full subtractor circuit 4 bit binary full adder and subtractor magnitude comparator using a subtractor hl94 binary multiplier circuit

LTA057A340F

Abstract: IRISO IMSA , Horizontal: 140 degrees) (3)LED B/L [ 18pcs. (6pcs. x 3rows)] (4)Replaceable structure of LED unit (5)RoHS , ) (Left+Right) (TON) (TOFF) (L) Luminance LED Life Time (MTBF) *5 *6 Min. 250 -320 Typ , . ) 10 0m s( ma x. ) 0. 1m s( mi n. ) 3 .0 V 3 .0 V V DD CLK DE DATA H,V-sync U/D,L/R , D 0 .2 V 0. 2V 0. 2VD D 25 0m s( mi n. ) 0m s( mi n. ) ON LE D B/ L OF F (4/9 , 6.0 6.30 8.89 MHz Clock "H" Time tch - - - ns Clock "L" Time tcl -
Toshiba Matsushita Display Technology
Original
LTA057A340F IRISO IMSA IMSA-9637S-33A IMSA-9637S SHLP-06V-S-B shlp-06v

IMSA-9637S

Abstract: IMSA-9637S-33A , Horizontal: 140 degrees) (3)LED B/L [ 18pcs. (6pcs. x 3rows)] (4)Replaceable structure of LED unit (5)RoHS , ) (Left+Right) (TON) (TOFF) (L) Luminance LED Life Time (MTBF) *5 *6 Min. 250 -320 Typ , . ) 10 0m s( ma x. ) 0. 1m s( mi n. ) 3 .0 V 3 .0 V V DD CLK DE DATA H,V-sync U/D,L/R , D 0 .2 V 0. 2V 0. 2VD D 25 0m s( mi n. ) 0m s( mi n. ) ON LE D B/ L OF F (4/9 , 7.0 - - ns Clock "L" Time tcl 7.0 - - ns Set Up Time tds 5.0 -
Toshiba Matsushita Display Technology
Original
LTA057A345F SSHL-003 9637S SM06B-SHLS-TF IMSA-9637S-33A-GF IRISO IMSA GF

code h7f

Abstract: A3-12 ctr9.Q # colsel & la22 ); 5 MACH210A ! c l l a l a l a r m m m m a 1 a 1 r a a a a 6 0 7 , | la14 | | | 18 19 20 21 22 23 24 25 26 27 28 | -l l l a l l l l m , ; istype 'reg'; istype 'reg'; istype 'reg'; istype 'reg'; "constant declarations L = 0; H = 1 , , incma,ldma,colsel, LAL,LAH] -> [COUNT,MA]) // Test row address @const i = 1; @repeat 10 { [CK,L, L,L,L, X,@expr i;] -> [0,@expr i;]; @const i = i
PLX Technology
Original
code h7f A3-12 9060/DRAM
Abstract: â'" â'" ton â'" â'" 50 ms toff â'" â'" 50 ms L 140 180 , B4 B3 B2 B1 B0 Gray Scale Level Black L L L L L L L L L L L L L L L L L L â'" Blue L L L L L L L L L L L L H H H H H H â'" Green Basic Color R5 L L L L L L H H H H H H L L L L L L â'" Lt. Blue L L Purdy Electronics
Original
104EA5S-HB

F537

Abstract: o6 o7 o8 O9 High Impedance H X X X X X X Z Z Z Z Z Z Z Z Z Z Disable L H L X X L X X X X X X X X Outputs Equal P Input L L H L L L L H L L L L L L L L L L L H L L L H L H L L L L L L L L L L H L L H L L L L L L L L L L L L H L L H H L L L H L L L L L L L L H L H L L L L L L H L L L L L Active HIGH L L H L H L H L L L L L L L L L Output L L H L H H L L L L L L L L L L (P=L) L L H L H H H L L L L L L L H L L L L H H L L L L L L L L L L L H L L L H H L L H L L L L L L L L L
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OCR Scan
F537 54F/74F537 54F/74F

MSC7166

Abstract: MSC7166GS-K or MSL918 and one device of either MSM4514 or MSM74HC4514. Setting the DUTY pin to the "L" level makes all driver outputs go "L". Blanking can be set using this function. FEATURES â'¢ Logic supply , pins. DUTY I Duty control signal Input pin. Setting this pin to "L" makes all driver outputs go "L , â'" V Low Level Input Voltage V|L Applied to all input pins â'" 1.7 V High Level Output Current , Transient Time Lto H tTLH C|_=10pF, See figure below â'" 2.0 4.0 |1S Delay Time H to L tDHL C|_=10pF, See
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OCR Scan
MSC7166 MSL912 MSC7166GS-K E2C0032-27-Y2 S0P24-P-43Q-1

CRH01

Abstract: TPD7203F 01 L 02 03 Out VU Out WU Out UB Out VB Out WB L L L L Remarks L L L L L L L H L L L L L H L L L L L L H L L L L L H L L L L 04 L L H L L L L L H L L L 05 L L L H L L L L L H L L 06 L L L L H L L L L L H L 07 L L L L L H L L
Toshiba
Original
TPD7203F CRH01 SSOP-24

AND12C285-DHB-KIT

Abstract: DF14-2628SCF Unit 100 250 ­ ­ ton ­ ­ 50 ms toff ­ ­ 50 ms L (400 , 4 5 11 12 14 600 Lines 16 17 21 25 26 R/L Green Display Data Green , Data (MSB) Data Enable VDD +3.3V Power Supply +3.3V Power Supply Horizontal Reverse ("L , GND 28 Vertical Reverse ("L" level or Open; normal, "H" level; reverse) Green Display Data (LSB , G2 G1 G0 B5 B4 B3 B2 B1 B0 Gray Scale Level Black L L L L
Purdy Electronics
Original
AND12C285-DHB-KIT DF14-2628SCF AND12C289

DF19G-30P-1H

Abstract: Characteristics (Ta = 25°C) Item Symbol CR ton toff L L/ R U/ D Min. 100 ­ ­ 280 40/40 45/45 Typ. 250 ­ ­ 350 45 , Period Vertical Display Term One Line Scanning Time Horizontal Display Period Clock Period Clock "L" Time , by the combinations of 18 data bits. Gray Scale Level ­ ­ ­ ­ ­ ­ ­ ­ L L L L0 L1 L2 L3~L60 L L L L L L L L L L L L L L L L L L Green L61 L62 L63 L0 L1 L2 L3~L60 L L L L L L L L L L L H L L L L H L Green L61 L62 L63 L0 L1 L2 L3~L60 H H H L L L L H H L L H H L H L H L Blue L61 L62 L63 L0 L1 L2 L3~L60 H
Purdy Electronics
Original
DF19G-30P-1H TFT08C351-HB

25LS2538

Abstract: 25LS2537 temperature and power supply range s GEN ERA L DESCRIPTION T he A m 2 5 L S 2 5 3 7 is a demultiplexer , of the A m 2 5 L S 2 5 3 7 en sures that all outputs are unselected w hen the binary co d e s greater than nine are applied to the inputs. T he inputs A, B, C, and D of the A m 2 5 L S 2 5 3 7 correspond , input is LO W , the outputs are enabled. T he polarity (PO L) input is used to drive the Y outputs to either the active-HIGH state or the active-LO W state. W hen the P O L input is LOW , the outputs are
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OCR Scan
25LS2537 25LS2538 851-02R14-5PY50+L/C 03665B
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