NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: 06-07H 06-07H 06-07H 06-07H 06-07H 06-07H 06-07H 06-07H 06-07H 06-07H 06-07H 06-07H 08H ... | Original |
47 pages, |
MDC 3043 via VT6102 vt6102 VT6102 VT6102 abstract |
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| Abstract: PCISTS-PCI Device Status Register (Function 2) Address Offset: 06-07h Default Value: 0280h , (06-07h) Default Value: 0000h Attribute: Read/Write (Writes must be Word Writes) Bits [10:0 ... | Original |
14 pages, |
register PID controller 9-Port USB hub 82371AB 64REN A20-GATE 82371AB abstract |
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| Abstract: ) . 4 2.4.3 PHY Device Records (Words 06-07h , (Words 06-07h) The PHY device records are used to describe an external PHY. These words are used with ... | Original |
21 pages, |
PILA8461 82559ER 8255X 8255x Programming 93C46 93C66 eeprom PROGRAMMING utility MC100 PILA8460 352509 EEUP 82558B AP-394 AP-394 abstract |
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| Abstract: 10 80 0607h 40h Line-mode 4 Teletext (field 1) 80 0608h 0Ah Line-address 5 , Line Address 3 80 0605h Line Mode 3 80 0606h Line Address 4 80 0607h Line Mode 4 ... | Original |
21 pages, |
TVP5150A TVP5146 Service mode tv EIA-608 0602h 0704h EIA-744 SLEU045 SLEU045 abstract |
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| Abstract: Identification RO 04-05h PCICMD PCI Command Register R/W 06-07h PCISTS PCI Status , PCISTSPCI STATUS REGISTER Address Offset: Default Value: Attribute: 06-07h 0200h Read/Write ... | Original |
24 pages, |
SA15 82380 82380AB 82380FB pci to isa bridge SA11 SA12 SA13 SA14 60 pin ISA slot 380FB 380FB abstract |
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| Abstract: PCI Command Register R/W 06-07h PCISTS PCI Status Register R/WC 08h RID , 3.1.4. PCISTSPCI STATUS REGISTER Address Offset: Default Value: Attribute: 06-07h 0200h ... | Original |
24 pages, |
SA15 SA14 SA13 SA12 SA11 82380FB 82380AB 380FB 380FB abstract |
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| Abstract: [4:0] 03H Selected Output Queue ID 04-05H 04-05H Selected Output Queue Length 06-07H Selected Output , Preliminary VT6508 VT6508 Datasheet 06-07H aging index 06H: AGING_INDEX[7:0] 07H: AGING_INDEX[10:8] for CPU to ... | Original |
48 pages, |
VIA Technologies SD31 SD30 SA15 SA14 32Kx32 Synchronous VT6508 10/100BASE-T/TX VT6508 abstract |
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| Abstract: 04-05h USBINTR USB Interrupt Enable R/W 06-07h FRNUM Frame Number R/W2 08-0Bh ... | Original |
11 pages, |
82371AB ISA IDE bridge pci to isa bridge 82371AB abstract |
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| Abstract: RO 04-05h PCICMD PCI Command Register R/W 06-07h PCISTS PCI Status Register , : 0607h Default Value: 0200h Access: Read Only, Read/Write Clear PCISTS is a 16-bit status ... | Original |
26 pages, |
INTEL MTXC FPM DRAM 30-pin SIMM epd driving AD12 AD11 82439TX 82439TX abstract |
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| Abstract: Intel® E7501 E7501 Chipset Memory Controller Hub (MCH) Datasheet July 2003 Document Number: 251927-002 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL ® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE ... | Original |
166 pages, |
P64H2 hd65 E7501 E7500 82870P2 251927 E7501 abstract |
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| Abstract: AVG Semiconductors DD r OQ Technical Data CO 3 Line to 8 Line Decoder/Demultiplexer These Schottky-clamped circuits aro designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. One of eight lines is decoded based upon the conditions at the three binary select inputs and the three enable inputs. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. • AVG's LS o ... | OCR Scan |
3 pages, |
LS138 ALS138 datasheet abstract |
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| Abstract: MIL-C-24308 MIL-C-24308 D-Subminiature 557-018 EMI/RFI D-Subminiature Split Backshell Crimp Ring Shield Termination with Shrink Boot Groove 557 T 018 M 4 02 F0 B 1 T Basic Part No. Shrink Boot Supplied (Table II), Omit for None Cable Entry Style T = Top S = Side E = End 0 = Without EMI Gasket, 1 = With EMI Gasket Jackscrew Type (Page A-4) Finish Symbol (Page 3) Receptacle Mounting (Right Page) CC = Cable-to-Cable Mounting F0 = Front Mounting R1-R9 = Rear Mounting Shell Si ... | Original |
2 pages, |
MIL-C-24308 MIL-C-24308 abstract |
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| Abstract: G74SC137 G74SC137 G74SC138 G74SC138 G74SC139 G74SC139 Microcircuits CMOS Octal Decoders/Demultiplexers Feature* • Equivalent to 74LS series • Low power oxide isolated silicon gate CMOS technology • Short propagation delay • Improved noise margins • High current, sink/source capability General Description This family of CMOS decoders/demultiplexers is designed for use in high speed memory and peripheral address decoding systems. The G74SC138 G74SC138 decodes three binary inputs (AO, A1, A2) to select 1-of-8 mutually exclu ... | OCR Scan |
4 pages, |
G74SC139P G74SC139D G74SC138P G74SC138D G74SC137P G74SC137D 74LS series logic gates 3 input or gate 74LS G74SC137 G74SC138 G74SC139 G74SC137 abstract |
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| Abstract: AVG Semiconductors PPi" Technical Data 1 - of - 8 Decoder/ Demultiplexer DV74AC138 DV74AC138 DV74ACT138 DV74ACT138 This high-speed 1 -of-8 decoder/demultiplexer is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three AC138/ AC138/*ACT138 ACT138 devices or a 1 -of-3 decoder using four "AC 138/*ACT 138 devices and one inverter. • Advanced very high speed CMOS • Outputs source/sink 24 mA • Transmission line driving ... | OCR Scan |
4 pages, |
74AC138 AC138 DV74AC138 DV74ACT138 AC138/ ACT138 DV74AC138 abstract |
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| Abstract: ritingo ^ciiiibviluuwiuirHO i rroouci» rroauci specuicaiion 1-of-8 decoder/demultiplexer 74F138 74F138 FEATURE • Demultiplexing capability • Multiple input enable for easy expansion • Ideal for memory chip select decoding • Industrial temperature range available (-40°C to +85°C) DESCRIPTION The 74F138 74F138 decoder accepts three binary weighted inputs (AO, A1, A2) and when enabled, provides eight mutually exclusive, active low outputs (DO - 07). The device features three enable inputs; two active lo ... | OCR Scan |
4 pages, |
N74F138N N74F138D I74F138N I74F138D 74F138 74F138 abstract |
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| Abstract: SONY® CXK384001/382001 CXK384001/382001 524,288 /262,144-word X 8-bit CMOS Mask Programmable ROM Description CXK384001 CXK384001 / 382001 is a CMOS mask-programmable ROM organized as 524,288 words by 8-bit (CXK384001 CXK384001 ) and 262,144 words by 8-bit (CXK382001 CXK382001). The chip enable input disable outputs and sets the chip to low power standby mode. Features • Access time (Max.) Address access time 200ns Chip enable access time 200ns Output enable access time 70ns • Power consumption (Typ.) 10OmW (Operation) 0.5mW (Standb ... | OCR Scan |
7 pages, |
CXK384001 CXK382001 A17E CXK384001/382001 CXK384001/382001 abstract |
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| Abstract: / J? f SC137 SC137 ^G7ÎSC138 SC138 ¿/€T74SC139 T74SC139 ¿£74SC237 74SC237 L^€f4SC238 JS74SC239 JS74SC239 ISO CMOS Octal Decoders/Demultiplexers s 3'y 000695 G re Features Pin Function r • Equivalent to 74LS' series • Low power ISO-CMOS technology • Short propagation delay • Improved noise margins, with input hysteresis • High current, sink/source capability Pin Description AO. A1, A2 or AOa, AOb A1a, A1b Address Inputs, to be Decoded E1, E2, E3 ! or j Ea. Eb I Chip Enable Inputs or t Ë1.E2 LE Latch Enable Input ... | OCR Scan |
6 pages, |
74LS SC137 SC138 T74SC139 74SC237 JS74SC239 SC137 abstract |
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| Abstract: FAST Products FAST 74F548 74F548 Decoder/Demultiplexer Octal Decoder/Demultiplexer with Acknowledge Product Specification FEATURES • 3- to S-line address decoder • Multiple enables for address extension • Open-Collector Acknowledge output • Active-Low Decoder outputs DESCRIPTION The 'F548 is a 3- to 8-line address decoder with four Enable inputs. Two of the Enables are active-Low and two are active-High for maximum addressing versatility. Also provided is an active-Low Acknowledge output that ... | OCR Scan |
5 pages, |
pht 094 N74F548D 74F548 N74F548N 74F548 abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| Intel® 430TX 430TX 430TX 430TX PCIset Technical Information Center - Register Address Space printer-friendly version www.datasheetarchive.com/files/intel/products one/design/intarch/techinfo/430tx/regspace.htm |
Intel | 04/05/1999 | 142.67 Kb | HTM | regspace.htm |
| Intel® 430TX 430TX 430TX 430TX PCIset Technical Information Center - USB Host Controller Register Descriptions (PCI Function 2) printer-friendly version www.datasheetarchive.com/files/intel/products one/design/intarch/techinfo/430tx/usbreg.htm |
Intel | 04/05/1999 | 93.87 Kb | HTM | usbreg.htm |
| Intel® 430TX 430TX 430TX 430TX PCIset Technical Information Center - Register Description printer-friendly version www.datasheetarchive.com/files/intel/products one/design/intarch/techinfo/430tx/tx_reg.htm |
Intel | 04/05/1999 | 201.9 Kb | HTM | tx_reg.htm |
| # 702 C:0602H 0602H 0602H 0602H LINE# 703 C:0604H 0604H 0604H 0604H LINE# 704 C:0607H LINE www.datasheetarchive.com/files/siemens/cdrom/3rdtools/phytec/flash500/80c537/rtccon/clk.m51 |
Siemens | 28/03/1996 | 35.27 Kb | M51 | clk.m51 |
| # 702 C:0607H LINE# 705 C:0608H 0608H 0608H 0608H LINE# 707 C:060AH 060AH 060AH 060AH LINE www.datasheetarchive.com/files/siemens/cdrom/3rdtools/phytec/flash500/80c537/rtcmod/clk.m51 |
Siemens | 29/03/1996 | 36.29 Kb | M51 | clk.m51 |
| Intel® 430TX 430TX 430TX 430TX PCIset Technical Information Center - IDE Controller Register Descriptions (PCI Function 1) printer-friendly version www.datasheetarchive.com/files/intel/products one/design/intarch/techinfo/430tx/idereg.htm |
Intel | 04/05/1999 | 76.45 Kb | HTM | idereg.htm |
| Intel® 430TX 430TX 430TX 430TX PCIset Technical Information Center - Power Management Register Descriptions printer-friendly version www.datasheetarchive.com/files/intel/products one/design/intarch/techinfo/430tx/powerreg.htm |
Intel | 04/05/1999 | 254.61 Kb | HTM | powerreg.htm |
| Intel® 430TX 430TX 430TX 430TX PCIset Technical Information Center - PCI to ISA/EIO Bridge Register Descriptions printer-friendly version www.datasheetarchive.com/files/intel/products one/design/intarch/techinfo/430tx/bridgreg.htm |
Intel | 04/05/1999 | 215.03 Kb | HTM | bridgreg.htm |
| Custom - POS products MSR 100 series MSR 106 series www.datasheetarchive.com/files/custom-engineering/ita/pos/06-07.htm |
Custom Engineering | 15/02/2000 | 12.02 Kb | HTM | 06-07.htm |
| Custom - POS products MSR 100 series MSR 106 series www.datasheetarchive.com/files/custom-engineering/ing/pos/06-07.htm |
Custom Engineering | 15/02/2000 | 12.03 Kb | HTM | 06-07.htm |