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| Catalog Datasheet Results | Type | Document Tags |
| Abstract: speed failover · Hot-Plug PCI support · Low-power, 0.13 um CMOS design · 300-pin HBGA package · 3.3V I , 0.13 um CMOS design · Advanced power management · Space savings for LOM · 300-pin HBGA package · No , in a single device. The BCM5704C BCM5704C is fabricated in a low-voltage, 0.13 um CMOS process providing a ... | Original |
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0.13 um CMOS BCM5704C BCM5704C abstract |
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| Abstract: heterogeneous teams) · Heterogeneous mixed-speed failover · Hot-Plug PCI support Low power, 0.13 um CMOS design , in a lowvoltage 0.13 um CMOS process, providing a low-power system solution. By itself the BCM5703S BCM5703S , heterogeneous failover · Hot-Plug PCI support Low power for zero airflow implementations · 0.13-um CMOS design · ... | Original |
2 pages, |
mobile MOTHERBOARD CIRCUIT diagram BCM5703S BCM5703S abstract |
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| Abstract: Heterogeneous, mixed speed failover · PCI Hot Plug support · Low-power, 0.13-um CMOS design · 300-pin HBGA , failover · PCI hot plug · ·Low power for zero airflow implementations 0.13-um CMOS design · Advanced , The BCM5703 BCM5703 is fabricated in a low-voltage, 0.13-um CMOS process providing a low-power system ... | Original |
2 pages, |
broadcom 5703 BCM5703 0.13 um CMOS BCM5703 abstract |
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| Abstract: Hot-Plug PCI support Low power, 0.13-um CMOS design · · 196-pin BGA package · 3.3V I/Os (5V tolerant , Hot-Plug PCI support Low power for zero airflow implementations · 0.13-um CMOS design · Advanced power , integrated physical layer transceiver in a single device. The BCM5702 BCM5702 is fabricated in a low-voltage 0.13-um CMOS process, providing a low-power system solution. By itself the BCM5702 BCM5702 provides a complete ... | Original |
2 pages, |
196-PIN broadcom 5702 BCM5702 10/100/1000BASE-T BCM5702 abstract |
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| Abstract: Heterogeneous, mixed-speed failover · PCI Hot-Plug support Low-power, 0.13-um CMOS design · · 400-pin FBGA , PCI Hot Plug Low-power for zero airflow implementations · 0.13-um CMOS design · Advanced power , fabricated in a low-voltage, 0.13-um CMOS process providing a low-power system solution. The BCM5703 BCM5703 ... | Original |
2 pages, |
BCM5703 10/100/1000BASE-T BCM5703 abstract |
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| Abstract: teams) · Heterogeneous mixed-speed failover · Hot-Plug PCI support Low power, 0.13-um CMOS design , failover · Hot-Plug PCI support Low power for zero airflow implementations · 0.13-um CMOS design · , SerDes transceiver in a single device. The BCM5703S BCM5703S is fabricated in a lowvoltage 0.13-um CMOS process ... | Original |
2 pages, |
serdes Buffer BCM5703S 10/100/1000BASE-T BCM5703S abstract |
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| Abstract: package and is fabricated in advanced 0.13 um CMOS process technology. The complete solution is designed , mirroring. Advanced 0.13 um CMOS technology. 525-pin FCBGA package. Applications The Agere Systems ... | Original |
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Gigabit Ethernet switch et4000 ET1081 ethernet chip switch sgmii SerDes sfp configuration FCBGA ET4000 ET4000 abstract |
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| Abstract: 1-Mbps granularity · Low-power 0.13 um CMOS core · Power dissipation-7W · 1152-pin flip-chip ball , , address management, a non-blocking switch fabric, and integrated high-performance CPU into a single 0.13 um CMOS device. The BCM53714 BCM53714 series supports auto-DoS attack prevention and SNMP, IEEE 802.1x ... | Original |
2 pages, |
BCM53714S BCM53714 BCM53714/BCM53714S BCM53714/BCM53714S abstract |
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| Abstract: security · Port-based rate control with 1-Mbps granularity · Low-power 0.13 um CMOS core · Power , CPU into a single 0.13 um CMOS device. The BCM53716 BCM53716 series supports auto-DoS attack prevention and ... | Original |
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BCM53716 BCM53716 abstract |
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| Abstract: 24Fast-Ethernet 0.13 um CMOS device. It complies with the IEEE 802.3, 802.3u, 802.3ab 802.3x specifications including ... | Original |
1 pages, |
broadcom switch ethernet BCM5380M 5 port ethernet switch 3 PORT 10 100 ETHERNET TRANSCEIVER broadcom BCM5380 ethernet chip switch 10BASE-T/100BASE-TX 10/100/1000BASE-T 10BASE-T 100BASE-TX BCM5380 abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| architecture and integration. He is currently directing development activities on 0.18um and 0.13um logic of Intel's 0.13um transistor design. His email address is scott in 1991 and is currently working in the California Technology and Manufacturing 0.25um Device technology development for 0.2um. Before joining Intel he held technology positions at Texas Instruments .25 micron CMOS logic technology. He received a B.S. and M.S. in electrical engineering from the University www.datasheetarchive.com/files/intel/techno~1/itj/q31998/articles/art_1who.htm |
Intel | 31/10/1998 | 13.55 Kb | HTM | art_1who.htm |
| architecture and integration. He is currently directing development activities on 0.18um and 0.13um logic of Intel's 0.13um transistor design. His email address is scott in 1991 and is currently working in the California Technology and Manufacturing 0.25um Device technology development for 0.2um. Before joining Intel he held technology positions at Texas Instruments .25 micron CMOS logic technology. He received a B.S. and M.S. in electrical engineering from the University www.datasheetarchive.com/files/intel/techno~1/itj/q31998/articles/art_1who-v1.htm |
Intel | 02/02/1999 | 13.55 Kb | HTM | art_1who-v1.htm |
| Solomon output. This device is controlled via an I 2 C-bus. Designed in 0.2 um CMOS technology and filter (roll off = 0.15 or 0.13) Two Pulse Width Modulated (PWM) AGC outputs with programmable take transport stream interface simultaneously I www.datasheetarchive.com/files/philips/pip/tda10021ht_4-v2.html |
Philips | 14/02/2002 | 8.72 Kb | HTML | tda10021ht_4-v2.html |
| features, the SiO 2 thickness limit and the gate length limit will be reached for ~0.13 um channel effects as MOS gate dimensions have been reduced from 10 um to 0.1 um. Gate oxide thickness -threshold leakage (currently ~1nA/ um). Figure 5 shows the area component of gate leakage current in A/cm 2 versus gate voltage. If we assume the gate leakage limit occurs for devices with 0.1 um gate inversion (at voltages used in our 0.25 or 0.18 um technologies) is increased by approximately 0.7 nm www.datasheetarchive.com/files/intel/techno~1/itj/q31998/articles/art_3c.htm |
Intel | 31/10/1998 | 12.31 Kb | HTM | art_3c.htm |
| features, the SiO 2 thickness limit and the gate length limit will be reached for ~0.13 um channel effects as MOS gate dimensions have been reduced from 10 um to 0.1 um. Gate oxide thickness -threshold leakage (currently ~1nA/ um). Figure 5 shows the area component of gate leakage current in A/cm 2 versus gate voltage. If we assume the gate leakage limit occurs for devices with 0.1 um gate inversion (at voltages used in our 0.25 or 0.18 um technologies) is increased by approximately 0.7 nm www.datasheetarchive.com/files/intel/techno~1/itj/q31998/articles/art_3c-v1.htm |
Intel | 02/02/1999 | 12.31 Kb | HTM | art_3c-v1.htm |
| limit will be reached for ~0.13 um technologies. Figure 7: Gate and channel dimensions have been reduced from 10 um to 0.1 um. Gate oxide thickness must be approximately linearly -threshold leakage (currently ~1nA/ um). Figure 5 shows the area component of gate leakage current in A/cm 2 versus gate voltage. If we assume the gate leakage limit occurs for devices with 0.1 um gate length voltages used in our 0.25 or 0.18 um technologies) is increased by approximately 0.7 nm. Thus, the 1 www.datasheetarchive.com/files/intel/technologies/itj/q31998/articles/art_3c-v1.htm |
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| performance scaling trends cannot continue past the 0.13 - 0.10um device technologies by using traditional production, and we are already working in the lab on a 0.13 micron technology. The third paper describes the challenges faced when shrinking transistors below the 0.13 - 0.10 micron range. Intel is now Intel's .25um generation logic technology used to manufacture the Intel® Celeron and Pentium® II wearout, and mechanical stress. Discover how for Intel's 0.25um products, these four phenomena have been www.datasheetarchive.com/files/intel/techno~1/itj/index-v1.htm |
Intel | 30/10/1998 | 11.29 Kb | HTM | index-v1.htm |
| performance scaling trends cannot continue past the 0.13 - 0.10um device technologies by using traditional production, and we are already working in the lab on a 0.13 micron technology. The third paper describes the challenges faced when shrinking transistors below the 0.13 - 0.10 micron range. Intel is now Intel's .25um generation logic technology used to manufacture the Intel® Celeron and Pentium® II wearout, and mechanical stress. Discover how for Intel's 0.25um products, these four phenomena have been www.datasheetarchive.com/files/intel/techno~1/itj/q31998.htm |
Intel | 01/02/1999 | 11.46 Kb | HTM | q31998.htm |
| -bus. Designed in 0.2 um CMOS technology and housed in a 64 pin TQFP package, the TDA10021HT TDA10021HT TDA10021HT TDA10021HT operates over crystal) Digital downconversion Programmable half Nyquist filter (roll off = 0.15 or 0.13) Two simultaneously I www.datasheetarchive.com/files/philips/pip/tda10021ht_4-v1.html |
Philips | 15/06/2005 | 7.44 Kb | HTML | tda10021ht_4-v1.html |
| -bus. Designed in 0.2 um CMOS technology and housed in a 64 pin TQFP package, the TDA10021HT TDA10021HT TDA10021HT TDA10021HT operates over the downconversion Programmable half Nyquist filter (roll off = 0.15 or 0.13) Two Pulse Width Modulated (PWM) AGC CMOS 0.2 um technology. Applications Cable set-top boxes Cable modems MMDS (ETS www.datasheetarchive.com/files/philips/pip/tda10021ht_4.html |
Philips | 23/04/2003 | 5.63 Kb | HTML | tda10021ht_4.html |